This source file includes following definitions.
- intel_dp_mst_compute_link_config
- intel_dp_mst_compute_config
- intel_dp_mst_atomic_check
- intel_mst_disable_dp
- intel_mst_post_disable_dp
- intel_mst_pre_pll_enable_dp
- intel_mst_post_pll_disable_dp
- intel_mst_pre_enable_dp
- intel_mst_enable_dp
- intel_dp_mst_enc_get_hw_state
- intel_dp_mst_enc_get_config
- intel_dp_mst_get_ddc_modes
- intel_dp_mst_detect
- intel_dp_mst_get_modes
- intel_dp_mst_mode_valid
- intel_mst_atomic_best_encoder
- intel_dp_mst_encoder_destroy
- intel_dp_mst_get_hw_state
- intel_dp_add_mst_connector
- intel_dp_register_mst_connector
- intel_dp_destroy_mst_connector
- intel_dp_create_fake_mst_encoder
- intel_dp_create_fake_mst_encoders
- intel_dp_mst_encoder_active_links
- intel_dp_mst_encoder_init
- intel_dp_mst_encoder_cleanup
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26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_edid.h>
28 #include <drm/drm_probe_helper.h>
29
30 #include "i915_drv.h"
31 #include "intel_atomic.h"
32 #include "intel_audio.h"
33 #include "intel_connector.h"
34 #include "intel_ddi.h"
35 #include "intel_display_types.h"
36 #include "intel_dp.h"
37 #include "intel_dp_mst.h"
38 #include "intel_dpio_phy.h"
39
40 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
41 struct intel_crtc_state *crtc_state,
42 struct drm_connector_state *conn_state,
43 struct link_config_limits *limits)
44 {
45 struct drm_atomic_state *state = crtc_state->base.state;
46 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
47 struct intel_dp *intel_dp = &intel_mst->primary->dp;
48 struct intel_connector *connector =
49 to_intel_connector(conn_state->connector);
50 const struct drm_display_mode *adjusted_mode =
51 &crtc_state->base.adjusted_mode;
52 void *port = connector->port;
53 bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
54 DP_DPCD_QUIRK_CONSTANT_N);
55 int bpp, slots = -EINVAL;
56
57 crtc_state->lane_count = limits->max_lane_count;
58 crtc_state->port_clock = limits->max_clock;
59
60 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
61 crtc_state->pipe_bpp = bpp;
62
63 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
64 crtc_state->pipe_bpp);
65
66 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
67 port, crtc_state->pbn);
68 if (slots == -EDEADLK)
69 return slots;
70 if (slots >= 0)
71 break;
72 }
73
74 if (slots < 0) {
75 DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
76 return slots;
77 }
78
79 intel_link_compute_m_n(crtc_state->pipe_bpp,
80 crtc_state->lane_count,
81 adjusted_mode->crtc_clock,
82 crtc_state->port_clock,
83 &crtc_state->dp_m_n,
84 constant_n, crtc_state->fec_enable);
85 crtc_state->dp_m_n.tu = slots;
86
87 return 0;
88 }
89
90 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
91 struct intel_crtc_state *pipe_config,
92 struct drm_connector_state *conn_state)
93 {
94 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
95 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
96 struct intel_dp *intel_dp = &intel_mst->primary->dp;
97 struct intel_connector *connector =
98 to_intel_connector(conn_state->connector);
99 struct intel_digital_connector_state *intel_conn_state =
100 to_intel_digital_connector_state(conn_state);
101 const struct drm_display_mode *adjusted_mode =
102 &pipe_config->base.adjusted_mode;
103 void *port = connector->port;
104 struct link_config_limits limits;
105 int ret;
106
107 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
108 return -EINVAL;
109
110 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
111 pipe_config->has_pch_encoder = false;
112
113 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
114 pipe_config->has_audio =
115 drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
116 else
117 pipe_config->has_audio =
118 intel_conn_state->force_audio == HDMI_AUDIO_ON;
119
120
121
122
123
124 limits.min_clock =
125 limits.max_clock = intel_dp_max_link_rate(intel_dp);
126
127 limits.min_lane_count =
128 limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
129
130 limits.min_bpp = intel_dp_min_bpp(pipe_config);
131
132
133
134
135
136
137
138
139 limits.max_bpp = min(pipe_config->pipe_bpp, 24);
140
141 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
142
143 ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
144 conn_state, &limits);
145 if (ret)
146 return ret;
147
148 pipe_config->limited_color_range =
149 intel_dp_limited_color_range(pipe_config, conn_state);
150
151 if (IS_GEN9_LP(dev_priv))
152 pipe_config->lane_lat_optim_mask =
153 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
154
155 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
156
157 return 0;
158 }
159
160 static int
161 intel_dp_mst_atomic_check(struct drm_connector *connector,
162 struct drm_atomic_state *state)
163 {
164 struct drm_connector_state *new_conn_state =
165 drm_atomic_get_new_connector_state(state, connector);
166 struct drm_connector_state *old_conn_state =
167 drm_atomic_get_old_connector_state(state, connector);
168 struct intel_connector *intel_connector =
169 to_intel_connector(connector);
170 struct drm_crtc *new_crtc = new_conn_state->crtc;
171 struct drm_crtc_state *crtc_state;
172 struct drm_dp_mst_topology_mgr *mgr;
173 int ret;
174
175 ret = intel_digital_connector_atomic_check(connector, state);
176 if (ret)
177 return ret;
178
179 if (!old_conn_state->crtc)
180 return 0;
181
182
183
184
185 if (new_crtc) {
186 crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);
187
188 if (!crtc_state ||
189 !drm_atomic_crtc_needs_modeset(crtc_state) ||
190 crtc_state->enable)
191 return 0;
192 }
193
194 mgr = &enc_to_mst(old_conn_state->best_encoder)->primary->dp.mst_mgr;
195 ret = drm_dp_atomic_release_vcpi_slots(state, mgr,
196 intel_connector->port);
197
198 return ret;
199 }
200
201 static void intel_mst_disable_dp(struct intel_encoder *encoder,
202 const struct intel_crtc_state *old_crtc_state,
203 const struct drm_connector_state *old_conn_state)
204 {
205 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
206 struct intel_digital_port *intel_dig_port = intel_mst->primary;
207 struct intel_dp *intel_dp = &intel_dig_port->dp;
208 struct intel_connector *connector =
209 to_intel_connector(old_conn_state->connector);
210 int ret;
211
212 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
213
214 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
215
216 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
217 if (ret) {
218 DRM_ERROR("failed to update payload %d\n", ret);
219 }
220 if (old_crtc_state->has_audio)
221 intel_audio_codec_disable(encoder,
222 old_crtc_state, old_conn_state);
223 }
224
225 static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
226 const struct intel_crtc_state *old_crtc_state,
227 const struct drm_connector_state *old_conn_state)
228 {
229 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
230 struct intel_digital_port *intel_dig_port = intel_mst->primary;
231 struct intel_dp *intel_dp = &intel_dig_port->dp;
232 struct intel_connector *connector =
233 to_intel_connector(old_conn_state->connector);
234
235 intel_ddi_disable_pipe_clock(old_crtc_state);
236
237
238 drm_dp_check_act_status(&intel_dp->mst_mgr);
239
240 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
241
242 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
243
244
245
246
247
248 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
249 false);
250
251 intel_dp->active_mst_links--;
252
253 intel_mst->connector = NULL;
254 if (intel_dp->active_mst_links == 0) {
255 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
256 intel_dig_port->base.post_disable(&intel_dig_port->base,
257 old_crtc_state, NULL);
258 }
259
260 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
261 }
262
263 static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
264 const struct intel_crtc_state *pipe_config,
265 const struct drm_connector_state *conn_state)
266 {
267 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
268 struct intel_digital_port *intel_dig_port = intel_mst->primary;
269 struct intel_dp *intel_dp = &intel_dig_port->dp;
270
271 if (intel_dp->active_mst_links == 0)
272 intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
273 pipe_config, NULL);
274 }
275
276 static void intel_mst_post_pll_disable_dp(struct intel_encoder *encoder,
277 const struct intel_crtc_state *old_crtc_state,
278 const struct drm_connector_state *old_conn_state)
279 {
280 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
281 struct intel_digital_port *intel_dig_port = intel_mst->primary;
282 struct intel_dp *intel_dp = &intel_dig_port->dp;
283
284 if (intel_dp->active_mst_links == 0)
285 intel_dig_port->base.post_pll_disable(&intel_dig_port->base,
286 old_crtc_state,
287 old_conn_state);
288 }
289
290 static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
291 const struct intel_crtc_state *pipe_config,
292 const struct drm_connector_state *conn_state)
293 {
294 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
295 struct intel_digital_port *intel_dig_port = intel_mst->primary;
296 struct intel_dp *intel_dp = &intel_dig_port->dp;
297 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
298 enum port port = intel_dig_port->base.port;
299 struct intel_connector *connector =
300 to_intel_connector(conn_state->connector);
301 int ret;
302 u32 temp;
303
304
305
306
307 connector->encoder = encoder;
308 intel_mst->connector = connector;
309
310 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
311
312 if (intel_dp->active_mst_links == 0)
313 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
314
315 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
316
317 if (intel_dp->active_mst_links == 0)
318 intel_dig_port->base.pre_enable(&intel_dig_port->base,
319 pipe_config, NULL);
320
321 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
322 connector->port,
323 pipe_config->pbn,
324 pipe_config->dp_m_n.tu);
325 if (!ret)
326 DRM_ERROR("failed to allocate vcpi\n");
327
328 intel_dp->active_mst_links++;
329 temp = I915_READ(DP_TP_STATUS(port));
330 I915_WRITE(DP_TP_STATUS(port), temp);
331
332 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
333
334 intel_ddi_enable_pipe_clock(pipe_config);
335 }
336
337 static void intel_mst_enable_dp(struct intel_encoder *encoder,
338 const struct intel_crtc_state *pipe_config,
339 const struct drm_connector_state *conn_state)
340 {
341 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
342 struct intel_digital_port *intel_dig_port = intel_mst->primary;
343 struct intel_dp *intel_dp = &intel_dig_port->dp;
344 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
345 enum port port = intel_dig_port->base.port;
346
347 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
348
349 if (intel_de_wait_for_set(dev_priv, DP_TP_STATUS(port),
350 DP_TP_STATUS_ACT_SENT, 1))
351 DRM_ERROR("Timed out waiting for ACT sent\n");
352
353 drm_dp_check_act_status(&intel_dp->mst_mgr);
354
355 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
356 if (pipe_config->has_audio)
357 intel_audio_codec_enable(encoder, pipe_config, conn_state);
358 }
359
360 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
361 enum pipe *pipe)
362 {
363 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
364 *pipe = intel_mst->pipe;
365 if (intel_mst->connector)
366 return true;
367 return false;
368 }
369
370 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
371 struct intel_crtc_state *pipe_config)
372 {
373 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
374 struct intel_digital_port *intel_dig_port = intel_mst->primary;
375
376 intel_ddi_get_config(&intel_dig_port->base, pipe_config);
377 }
378
379 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
380 {
381 struct intel_connector *intel_connector = to_intel_connector(connector);
382 struct intel_dp *intel_dp = intel_connector->mst_port;
383 struct edid *edid;
384 int ret;
385
386 if (drm_connector_is_unregistered(connector))
387 return intel_connector_update_modes(connector, NULL);
388
389 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
390 ret = intel_connector_update_modes(connector, edid);
391 kfree(edid);
392
393 return ret;
394 }
395
396 static enum drm_connector_status
397 intel_dp_mst_detect(struct drm_connector *connector, bool force)
398 {
399 struct intel_connector *intel_connector = to_intel_connector(connector);
400 struct intel_dp *intel_dp = intel_connector->mst_port;
401
402 if (drm_connector_is_unregistered(connector))
403 return connector_status_disconnected;
404 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr,
405 intel_connector->port);
406 }
407
408 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
409 .detect = intel_dp_mst_detect,
410 .fill_modes = drm_helper_probe_single_connector_modes,
411 .atomic_get_property = intel_digital_connector_atomic_get_property,
412 .atomic_set_property = intel_digital_connector_atomic_set_property,
413 .late_register = intel_connector_register,
414 .early_unregister = intel_connector_unregister,
415 .destroy = intel_connector_destroy,
416 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
417 .atomic_duplicate_state = intel_digital_connector_duplicate_state,
418 };
419
420 static int intel_dp_mst_get_modes(struct drm_connector *connector)
421 {
422 return intel_dp_mst_get_ddc_modes(connector);
423 }
424
425 static enum drm_mode_status
426 intel_dp_mst_mode_valid(struct drm_connector *connector,
427 struct drm_display_mode *mode)
428 {
429 struct intel_connector *intel_connector = to_intel_connector(connector);
430 struct intel_dp *intel_dp = intel_connector->mst_port;
431 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
432 int max_rate, mode_rate, max_lanes, max_link_clock;
433
434 if (drm_connector_is_unregistered(connector))
435 return MODE_ERROR;
436
437 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
438 return MODE_NO_DBLESCAN;
439
440 max_link_clock = intel_dp_max_link_rate(intel_dp);
441 max_lanes = intel_dp_max_lane_count(intel_dp);
442
443 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
444 mode_rate = intel_dp_link_required(mode->clock, 18);
445
446
447 if (mode->clock < 10000)
448 return MODE_CLOCK_LOW;
449
450 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
451 return MODE_H_ILLEGAL;
452
453 if (mode_rate > max_rate || mode->clock > max_dotclk)
454 return MODE_CLOCK_HIGH;
455
456 return MODE_OK;
457 }
458
459 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
460 struct drm_connector_state *state)
461 {
462 struct intel_connector *intel_connector = to_intel_connector(connector);
463 struct intel_dp *intel_dp = intel_connector->mst_port;
464 struct intel_crtc *crtc = to_intel_crtc(state->crtc);
465
466 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
467 }
468
469 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
470 .get_modes = intel_dp_mst_get_modes,
471 .mode_valid = intel_dp_mst_mode_valid,
472 .atomic_best_encoder = intel_mst_atomic_best_encoder,
473 .atomic_check = intel_dp_mst_atomic_check,
474 };
475
476 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
477 {
478 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
479
480 drm_encoder_cleanup(encoder);
481 kfree(intel_mst);
482 }
483
484 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
485 .destroy = intel_dp_mst_encoder_destroy,
486 };
487
488 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
489 {
490 if (connector->encoder && connector->base.state->crtc) {
491 enum pipe pipe;
492 if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
493 return false;
494 return true;
495 }
496 return false;
497 }
498
499 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
500 {
501 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
502 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
503 struct drm_device *dev = intel_dig_port->base.base.dev;
504 struct drm_i915_private *dev_priv = to_i915(dev);
505 struct intel_connector *intel_connector;
506 struct drm_connector *connector;
507 enum pipe pipe;
508 int ret;
509
510 intel_connector = intel_connector_alloc();
511 if (!intel_connector)
512 return NULL;
513
514 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
515 intel_connector->mst_port = intel_dp;
516 intel_connector->port = port;
517 drm_dp_mst_get_port_malloc(port);
518
519 connector = &intel_connector->base;
520 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
521 DRM_MODE_CONNECTOR_DisplayPort);
522 if (ret) {
523 intel_connector_free(intel_connector);
524 return NULL;
525 }
526
527 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
528
529 for_each_pipe(dev_priv, pipe) {
530 struct drm_encoder *enc =
531 &intel_dp->mst_encoders[pipe]->base.base;
532
533 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
534 if (ret)
535 goto err;
536 }
537
538 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
539 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
540
541 ret = drm_connector_set_path_property(connector, pathprop);
542 if (ret)
543 goto err;
544
545 intel_attach_force_audio_property(connector);
546 intel_attach_broadcast_rgb_property(connector);
547
548
549
550
551
552 connector->max_bpc_property =
553 intel_dp->attached_connector->base.max_bpc_property;
554 if (connector->max_bpc_property)
555 drm_connector_attach_max_bpc_property(connector, 6, 12);
556
557 return connector;
558
559 err:
560 drm_connector_cleanup(connector);
561 return NULL;
562 }
563
564 static void intel_dp_register_mst_connector(struct drm_connector *connector)
565 {
566 struct drm_i915_private *dev_priv = to_i915(connector->dev);
567
568 if (dev_priv->fbdev)
569 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
570 connector);
571
572 drm_connector_register(connector);
573 }
574
575 static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
576 struct drm_connector *connector)
577 {
578 struct drm_i915_private *dev_priv = to_i915(connector->dev);
579
580 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name);
581 drm_connector_unregister(connector);
582
583 if (dev_priv->fbdev)
584 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
585 connector);
586
587 drm_connector_put(connector);
588 }
589
590 static const struct drm_dp_mst_topology_cbs mst_cbs = {
591 .add_connector = intel_dp_add_mst_connector,
592 .register_connector = intel_dp_register_mst_connector,
593 .destroy_connector = intel_dp_destroy_mst_connector,
594 };
595
596 static struct intel_dp_mst_encoder *
597 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
598 {
599 struct intel_dp_mst_encoder *intel_mst;
600 struct intel_encoder *intel_encoder;
601 struct drm_device *dev = intel_dig_port->base.base.dev;
602
603 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
604
605 if (!intel_mst)
606 return NULL;
607
608 intel_mst->pipe = pipe;
609 intel_encoder = &intel_mst->base;
610 intel_mst->primary = intel_dig_port;
611
612 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
613 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
614
615 intel_encoder->type = INTEL_OUTPUT_DP_MST;
616 intel_encoder->power_domain = intel_dig_port->base.power_domain;
617 intel_encoder->port = intel_dig_port->base.port;
618 intel_encoder->crtc_mask = 0x7;
619 intel_encoder->cloneable = 0;
620
621 intel_encoder->compute_config = intel_dp_mst_compute_config;
622 intel_encoder->disable = intel_mst_disable_dp;
623 intel_encoder->post_disable = intel_mst_post_disable_dp;
624 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
625 intel_encoder->post_pll_disable = intel_mst_post_pll_disable_dp;
626 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
627 intel_encoder->enable = intel_mst_enable_dp;
628 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
629 intel_encoder->get_config = intel_dp_mst_enc_get_config;
630
631 return intel_mst;
632
633 }
634
635 static bool
636 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
637 {
638 struct intel_dp *intel_dp = &intel_dig_port->dp;
639 struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
640 enum pipe pipe;
641
642 for_each_pipe(dev_priv, pipe)
643 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
644 return true;
645 }
646
647 int
648 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
649 {
650 return intel_dig_port->dp.active_mst_links;
651 }
652
653 int
654 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
655 {
656 struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
657 struct intel_dp *intel_dp = &intel_dig_port->dp;
658 enum port port = intel_dig_port->base.port;
659 int ret;
660
661 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
662 return 0;
663
664 if (INTEL_GEN(i915) < 12 && port == PORT_A)
665 return 0;
666
667 if (INTEL_GEN(i915) < 11 && port == PORT_E)
668 return 0;
669
670 intel_dp->mst_mgr.cbs = &mst_cbs;
671
672
673 intel_dp_create_fake_mst_encoders(intel_dig_port);
674 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
675 &intel_dp->aux, 16, 3, conn_base_id);
676 if (ret)
677 return ret;
678
679 intel_dp->can_mst = true;
680
681 return 0;
682 }
683
684 void
685 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
686 {
687 struct intel_dp *intel_dp = &intel_dig_port->dp;
688
689 if (!intel_dp->can_mst)
690 return;
691
692 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
693
694 }