root/drivers/gpu/drm/i915/display/intel_dp.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. intel_dp_unused_lane_mask

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5 
   6 #ifndef __INTEL_DP_H__
   7 #define __INTEL_DP_H__
   8 
   9 #include <linux/types.h>
  10 
  11 #include <drm/i915_drm.h>
  12 
  13 #include "i915_reg.h"
  14 
  15 enum pipe;
  16 struct drm_connector_state;
  17 struct drm_encoder;
  18 struct drm_i915_private;
  19 struct drm_modeset_acquire_ctx;
  20 struct intel_connector;
  21 struct intel_crtc_state;
  22 struct intel_digital_port;
  23 struct intel_dp;
  24 struct intel_encoder;
  25 
  26 struct link_config_limits {
  27         int min_clock, max_clock;
  28         int min_lane_count, max_lane_count;
  29         int min_bpp, max_bpp;
  30 };
  31 
  32 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
  33                                        struct intel_crtc_state *pipe_config,
  34                                        struct link_config_limits *limits);
  35 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
  36                                   const struct drm_connector_state *conn_state);
  37 int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
  38 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
  39                            i915_reg_t dp_reg, enum port port,
  40                            enum pipe *pipe);
  41 bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
  42                    enum port port);
  43 bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
  44                              struct intel_connector *intel_connector);
  45 void intel_dp_set_link_params(struct intel_dp *intel_dp,
  46                               int link_rate, u8 lane_count,
  47                               bool link_mst);
  48 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
  49                                             int link_rate, u8 lane_count);
  50 int intel_dp_retrain_link(struct intel_encoder *encoder,
  51                           struct drm_modeset_acquire_ctx *ctx);
  52 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
  53 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
  54                                            const struct intel_crtc_state *crtc_state,
  55                                            bool enable);
  56 void intel_dp_encoder_reset(struct drm_encoder *encoder);
  57 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
  58 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
  59 int intel_dp_compute_config(struct intel_encoder *encoder,
  60                             struct intel_crtc_state *pipe_config,
  61                             struct drm_connector_state *conn_state);
  62 bool intel_dp_is_edp(struct intel_dp *intel_dp);
  63 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
  64 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port,
  65                                   bool long_hpd);
  66 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
  67                             const struct drm_connector_state *conn_state);
  68 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
  69 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp);
  70 void intel_edp_panel_on(struct intel_dp *intel_dp);
  71 void intel_edp_panel_off(struct intel_dp *intel_dp);
  72 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
  73 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
  74 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
  75 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
  76 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
  77 void intel_power_sequencer_reset(struct drm_i915_private *dev_priv);
  78 u32 intel_dp_pack_aux(const u8 *src, int src_bytes);
  79 
  80 void intel_edp_drrs_enable(struct intel_dp *intel_dp,
  81                            const struct intel_crtc_state *crtc_state);
  82 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
  83                             const struct intel_crtc_state *crtc_state);
  84 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
  85                                unsigned int frontbuffer_bits);
  86 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
  87                           unsigned int frontbuffer_bits);
  88 
  89 void
  90 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
  91                                        u8 dp_train_pat);
  92 void
  93 intel_dp_set_signal_levels(struct intel_dp *intel_dp);
  94 void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
  95 u8
  96 intel_dp_voltage_max(struct intel_dp *intel_dp);
  97 u8
  98 intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, u8 voltage_swing);
  99 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
 100                            u8 *link_bw, u8 *rate_select);
 101 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
 102 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
 103 bool
 104 intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status);
 105 
 106 bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
 107 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 108 int intel_dp_link_required(int pixel_clock, int bpp);
 109 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
 110 bool intel_digital_port_connected(struct intel_encoder *encoder);
 111 
 112 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 113 {
 114         return ~((1 << lane_count) - 1) & 0xf;
 115 }
 116 
 117 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
 118 
 119 #endif /* __INTEL_DP_H__ */

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