This source file includes following definitions.
- rcar_rst_enable_wdt_reset
- rcar_rst_init
- rcar_rst_read_mode_pins
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8 #include <linux/err.h>
9 #include <linux/io.h>
10 #include <linux/of_address.h>
11 #include <linux/soc/renesas/rcar-rst.h>
12
13 #define WDTRSTCR_RESET 0xA55A0002
14 #define WDTRSTCR 0x0054
15
16 static int rcar_rst_enable_wdt_reset(void __iomem *base)
17 {
18 iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
19 return 0;
20 }
21
22 struct rst_config {
23 unsigned int modemr;
24 int (*configure)(void *base);
25 };
26
27 static const struct rst_config rcar_rst_gen1 __initconst = {
28 .modemr = 0x20,
29 };
30
31 static const struct rst_config rcar_rst_gen2 __initconst = {
32 .modemr = 0x60,
33 .configure = rcar_rst_enable_wdt_reset,
34 };
35
36 static const struct rst_config rcar_rst_gen3 __initconst = {
37 .modemr = 0x60,
38 };
39
40 static const struct of_device_id rcar_rst_matches[] __initconst = {
41
42 { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
43 { .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
44 { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
45 { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
46
47 { .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
48 { .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
49
50 { .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
51 { .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
52
53 { .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
54 { .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
55 { .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
56 { .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
57 { .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
58
59 { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
60 { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
61 { .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
62 { .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
63 { .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
64 { .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
65 { .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
66 { }
67 };
68
69 static void __iomem *rcar_rst_base __initdata;
70 static u32 saved_mode __initdata;
71
72 static int __init rcar_rst_init(void)
73 {
74 const struct of_device_id *match;
75 const struct rst_config *cfg;
76 struct device_node *np;
77 void __iomem *base;
78 int error = 0;
79
80 np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
81 if (!np)
82 return -ENODEV;
83
84 base = of_iomap(np, 0);
85 if (!base) {
86 pr_warn("%pOF: Cannot map regs\n", np);
87 error = -ENOMEM;
88 goto out_put;
89 }
90
91 rcar_rst_base = base;
92 cfg = match->data;
93 saved_mode = ioread32(base + cfg->modemr);
94 if (cfg->configure) {
95 error = cfg->configure(base);
96 if (error) {
97 pr_warn("%pOF: Cannot run SoC specific configuration\n",
98 np);
99 goto out_put;
100 }
101 }
102
103 pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
104
105 out_put:
106 of_node_put(np);
107 return error;
108 }
109
110 int __init rcar_rst_read_mode_pins(u32 *mode)
111 {
112 int error;
113
114 if (!rcar_rst_base) {
115 error = rcar_rst_init();
116 if (error)
117 return error;
118 }
119
120 *mode = saved_mode;
121 return 0;
122 }