root/drivers/soc/fsl/qe/usb.c

DEFINITIONS

1. qe_usb_clock_set

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * QE USB routines
   4  *
   5  * Copyright 2006 Freescale Semiconductor, Inc.
   6  *               Shlomi Gridish <gridish@freescale.com>
   7  *               Jerry Huang <Chang-Ming.Huang@freescale.com>
   8  * Copyright (c) MontaVista Software, Inc. 2008.
   9  *               Anton Vorontsov <avorontsov@ru.mvista.com>
  10  */
  11 
  12 #include <linux/kernel.h>
  13 #include <linux/errno.h>
  14 #include <linux/export.h>
  15 #include <linux/io.h>
  16 #include <soc/fsl/qe/immap_qe.h>
  17 #include <soc/fsl/qe/qe.h>
  18 
  19 int qe_usb_clock_set(enum qe_clock clk, int rate)
  20 {
  21         struct qe_mux __iomem *mux = &qe_immr->qmx;
  22         unsigned long flags;
  23         u32 val;
  24 
  25         switch (clk) {
  26         case QE_CLK3:  val = QE_CMXGCR_USBCS_CLK3;  break;
  27         case QE_CLK5:  val = QE_CMXGCR_USBCS_CLK5;  break;
  28         case QE_CLK7:  val = QE_CMXGCR_USBCS_CLK7;  break;
  29         case QE_CLK9:  val = QE_CMXGCR_USBCS_CLK9;  break;
  30         case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
  31         case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
  32         case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
  33         case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
  34         case QE_BRG9:  val = QE_CMXGCR_USBCS_BRG9;  break;
  35         case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
  36         default:
  37                 pr_err("%s: requested unknown clock %d\n", __func__, clk);
  38                 return -EINVAL;
  39         }
  40 
  41         if (qe_clock_is_brg(clk))
  42                 qe_setbrg(clk, rate, 1);
  43 
  44         spin_lock_irqsave(&cmxgcr_lock, flags);
  45 
  46         clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
  47 
  48         spin_unlock_irqrestore(&cmxgcr_lock, flags);
  49 
  50         return 0;
  51 }
  52 EXPORT_SYMBOL(qe_usb_clock_set);