root/drivers/video/fbdev/omap2/omapfb/dss/dss_features.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * linux/drivers/video/omap2/dss/dss_features.h
   4  *
   5  * Copyright (C) 2010 Texas Instruments
   6  * Author: Archit Taneja <archit@ti.com>
   7  */
   8 
   9 #ifndef __OMAP2_DSS_FEATURES_H
  10 #define __OMAP2_DSS_FEATURES_H
  11 
  12 #define MAX_DSS_MANAGERS        4
  13 #define MAX_DSS_OVERLAYS        4
  14 #define MAX_DSS_LCD_MANAGERS    3
  15 #define MAX_NUM_DSI             2
  16 
  17 /* DSS has feature id */
  18 enum dss_feat_id {
  19         FEAT_LCDENABLEPOL,
  20         FEAT_LCDENABLESIGNAL,
  21         FEAT_PCKFREEENABLE,
  22         FEAT_FUNCGATED,
  23         FEAT_MGR_LCD2,
  24         FEAT_MGR_LCD3,
  25         FEAT_LINEBUFFERSPLIT,
  26         FEAT_ROWREPEATENABLE,
  27         FEAT_RESIZECONF,
  28         /* Independent core clk divider */
  29         FEAT_CORE_CLK_DIV,
  30         FEAT_LCD_CLK_SRC,
  31         /* DSI-PLL power command 0x3 is not working */
  32         FEAT_DSI_PLL_PWR_BUG,
  33         FEAT_DSI_DCS_CMD_CONFIG_VC,
  34         FEAT_DSI_VC_OCP_WIDTH,
  35         FEAT_DSI_REVERSE_TXCLKESC,
  36         FEAT_DSI_GNQ,
  37         FEAT_DPI_USES_VDDS_DSI,
  38         FEAT_HDMI_CTS_SWMODE,
  39         FEAT_HDMI_AUDIO_USE_MCLK,
  40         FEAT_HANDLE_UV_SEPARATE,
  41         FEAT_ATTR2,
  42         FEAT_VENC_REQUIRES_TV_DAC_CLK,
  43         FEAT_CPR,
  44         FEAT_PRELOAD,
  45         FEAT_FIR_COEF_V,
  46         FEAT_ALPHA_FIXED_ZORDER,
  47         FEAT_ALPHA_FREE_ZORDER,
  48         FEAT_FIFO_MERGE,
  49         /* An unknown HW bug causing the normal FIFO thresholds not to work */
  50         FEAT_OMAP3_DSI_FIFO_BUG,
  51         FEAT_BURST_2D,
  52         FEAT_DSI_PHY_DCC,
  53         FEAT_MFLAG,
  54 };
  55 
  56 /* DSS register field id */
  57 enum dss_feat_reg_field {
  58         FEAT_REG_FIRHINC,
  59         FEAT_REG_FIRVINC,
  60         FEAT_REG_FIFOHIGHTHRESHOLD,
  61         FEAT_REG_FIFOLOWTHRESHOLD,
  62         FEAT_REG_FIFOSIZE,
  63         FEAT_REG_HORIZONTALACCU,
  64         FEAT_REG_VERTICALACCU,
  65         FEAT_REG_DISPC_CLK_SWITCH,
  66 };
  67 
  68 enum dss_range_param {
  69         FEAT_PARAM_DSS_FCK,
  70         FEAT_PARAM_DSS_PCD,
  71         FEAT_PARAM_DSIPLL_LPDIV,
  72         FEAT_PARAM_DSI_FCK,
  73         FEAT_PARAM_DOWNSCALE,
  74         FEAT_PARAM_LINEWIDTH,
  75 };
  76 
  77 /* DSS Feature Functions */
  78 unsigned long dss_feat_get_param_min(enum dss_range_param param);
  79 unsigned long dss_feat_get_param_max(enum dss_range_param param);
  80 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
  81 bool dss_feat_color_mode_supported(enum omap_plane plane,
  82                 enum omap_color_mode color_mode);
  83 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
  84 
  85 u32 dss_feat_get_buffer_size_unit(void);        /* in bytes */
  86 u32 dss_feat_get_burst_size_unit(void);         /* in bytes */
  87 
  88 bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
  89 
  90 bool dss_has_feature(enum dss_feat_id id);
  91 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
  92 void dss_features_init(enum omapdss_version version);
  93 
  94 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
  95 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
  96 
  97 #endif