root/drivers/video/fbdev/riva/nvreg.h

INCLUDED FROM

   1 /* $XConsortium: nvreg.h /main/2 1996/10/28 05:13:41 kaleb $ */
   2 /*
   3  * Copyright 1996-1997  David J. McKay
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  19  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  20  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  */
  23 
  24 /* $XFree86: xc/programs/Xserver/hw/xfree86/vga256/drivers/nv/nvreg.h,v 3.2.2.1 1998/01/18 10:35:36 hohndel Exp $ */
  25 
  26 #ifndef __NVREG_H_
  27 #define __NVREG_H_
  28 
  29 /* Little macro to construct bitmask for contiguous ranges of bits */
  30 #define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1)  << (b))
  31 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
  32 
  33 /* Macro to set specific bitfields (mask has to be a macro x:y) ! */
  34 #define SetBF(mask,value) ((value) << (0?mask))
  35 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
  36 
  37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \
  38                                              | SetBF(mask,value)))
  39 
  40 #define DEVICE_BASE(device) (0?NV##_##device)
  41 #define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1)
  42 
  43 /* This is where we will have to have conditional compilation */
  44 #define DEVICE_ACCESS(device,reg) \
  45   nvCONTROL[(NV_##device##_##reg)/4]
  46 
  47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value)
  48 #define DEVICE_READ(device,reg)        DEVICE_ACCESS(device,reg)
  49 #define DEVICE_PRINT(device,reg) \
  50   ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg))
  51 #define DEVICE_DEF(device,mask,value) \
  52   SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
  53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value)
  54 #define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask)
  55 
  56 #define PDAC_Write(reg,value)           DEVICE_WRITE(PDAC,reg,value)
  57 #define PDAC_Read(reg)                  DEVICE_READ(PDAC,reg)
  58 #define PDAC_Print(reg)                 DEVICE_PRINT(PDAC,reg)
  59 #define PDAC_Def(mask,value)            DEVICE_DEF(PDAC,mask,value)
  60 #define PDAC_Val(mask,value)            DEVICE_VALUE(PDAC,mask,value)
  61 #define PDAC_Mask(mask)                 DEVICE_MASK(PDAC,mask)
  62 
  63 #define PFB_Write(reg,value)            DEVICE_WRITE(PFB,reg,value)
  64 #define PFB_Read(reg)                   DEVICE_READ(PFB,reg)
  65 #define PFB_Print(reg)                  DEVICE_PRINT(PFB,reg)
  66 #define PFB_Def(mask,value)             DEVICE_DEF(PFB,mask,value)
  67 #define PFB_Val(mask,value)             DEVICE_VALUE(PFB,mask,value)
  68 #define PFB_Mask(mask)                  DEVICE_MASK(PFB,mask)
  69 
  70 #define PRM_Write(reg,value)            DEVICE_WRITE(PRM,reg,value)
  71 #define PRM_Read(reg)                   DEVICE_READ(PRM,reg)
  72 #define PRM_Print(reg)                  DEVICE_PRINT(PRM,reg)
  73 #define PRM_Def(mask,value)             DEVICE_DEF(PRM,mask,value)
  74 #define PRM_Val(mask,value)             DEVICE_VALUE(PRM,mask,value)
  75 #define PRM_Mask(mask)                  DEVICE_MASK(PRM,mask)
  76 
  77 #define PGRAPH_Write(reg,value)         DEVICE_WRITE(PGRAPH,reg,value)
  78 #define PGRAPH_Read(reg)                DEVICE_READ(PGRAPH,reg)
  79 #define PGRAPH_Print(reg)               DEVICE_PRINT(PGRAPH,reg)
  80 #define PGRAPH_Def(mask,value)          DEVICE_DEF(PGRAPH,mask,value)
  81 #define PGRAPH_Val(mask,value)          DEVICE_VALUE(PGRAPH,mask,value)
  82 #define PGRAPH_Mask(mask)               DEVICE_MASK(PGRAPH,mask)
  83 
  84 #define PDMA_Write(reg,value)           DEVICE_WRITE(PDMA,reg,value)
  85 #define PDMA_Read(reg)                  DEVICE_READ(PDMA,reg)
  86 #define PDMA_Print(reg)                 DEVICE_PRINT(PDMA,reg)
  87 #define PDMA_Def(mask,value)            DEVICE_DEF(PDMA,mask,value)
  88 #define PDMA_Val(mask,value)            DEVICE_VALUE(PDMA,mask,value)
  89 #define PDMA_Mask(mask)                 DEVICE_MASK(PDMA,mask)
  90 
  91 #define PTIMER_Write(reg,value)         DEVICE_WRITE(PTIMER,reg,value)
  92 #define PTIMER_Read(reg)                DEVICE_READ(PTIMER,reg)
  93 #define PTIMER_Print(reg)               DEVICE_PRINT(PTIMER,reg)
  94 #define PTIMER_Def(mask,value)          DEVICE_DEF(PTIMER,mask,value)
  95 #define PTIMER_Val(mask,value)          DEVICE_VALUE(PTIEMR,mask,value)
  96 #define PTIMER_Mask(mask)               DEVICE_MASK(PTIMER,mask)
  97 
  98 #define PEXTDEV_Write(reg,value)         DEVICE_WRITE(PEXTDEV,reg,value)
  99 #define PEXTDEV_Read(reg)                DEVICE_READ(PEXTDEV,reg)
 100 #define PEXTDEV_Print(reg)               DEVICE_PRINT(PEXTDEV,reg)
 101 #define PEXTDEV_Def(mask,value)          DEVICE_DEF(PEXTDEV,mask,value)
 102 #define PEXTDEV_Val(mask,value)          DEVICE_VALUE(PEXTDEV,mask,value)
 103 #define PEXTDEV_Mask(mask)               DEVICE_MASK(PEXTDEV,mask)
 104 
 105 #define PFIFO_Write(reg,value)          DEVICE_WRITE(PFIFO,reg,value)
 106 #define PFIFO_Read(reg)                 DEVICE_READ(PFIFO,reg)
 107 #define PFIFO_Print(reg)                DEVICE_PRINT(PFIFO,reg)
 108 #define PFIFO_Def(mask,value)           DEVICE_DEF(PFIFO,mask,value)
 109 #define PFIFO_Val(mask,value)           DEVICE_VALUE(PFIFO,mask,value)
 110 #define PFIFO_Mask(mask)                DEVICE_MASK(PFIFO,mask)
 111 
 112 #define PRAM_Write(reg,value)           DEVICE_WRITE(PRAM,reg,value)
 113 #define PRAM_Read(reg)                  DEVICE_READ(PRAM,reg)
 114 #define PRAM_Print(reg)                 DEVICE_PRINT(PRAM,reg)
 115 #define PRAM_Def(mask,value)            DEVICE_DEF(PRAM,mask,value)
 116 #define PRAM_Val(mask,value)            DEVICE_VALUE(PRAM,mask,value)
 117 #define PRAM_Mask(mask)                 DEVICE_MASK(PRAM,mask)
 118 
 119 #define PRAMFC_Write(reg,value)         DEVICE_WRITE(PRAMFC,reg,value)
 120 #define PRAMFC_Read(reg)                DEVICE_READ(PRAMFC,reg)
 121 #define PRAMFC_Print(reg)               DEVICE_PRINT(PRAMFC,reg)
 122 #define PRAMFC_Def(mask,value)          DEVICE_DEF(PRAMFC,mask,value)
 123 #define PRAMFC_Val(mask,value)          DEVICE_VALUE(PRAMFC,mask,value)
 124 #define PRAMFC_Mask(mask)               DEVICE_MASK(PRAMFC,mask)
 125 
 126 #define PMC_Write(reg,value)            DEVICE_WRITE(PMC,reg,value)
 127 #define PMC_Read(reg)                   DEVICE_READ(PMC,reg)
 128 #define PMC_Print(reg)                  DEVICE_PRINT(PMC,reg)
 129 #define PMC_Def(mask,value)             DEVICE_DEF(PMC,mask,value)
 130 #define PMC_Val(mask,value)             DEVICE_VALUE(PMC,mask,value)
 131 #define PMC_Mask(mask)                  DEVICE_MASK(PMC,mask)
 132 
 133 #define PMC_Write(reg,value)            DEVICE_WRITE(PMC,reg,value)
 134 #define PMC_Read(reg)                   DEVICE_READ(PMC,reg)
 135 #define PMC_Print(reg)                  DEVICE_PRINT(PMC,reg)
 136 #define PMC_Def(mask,value)             DEVICE_DEF(PMC,mask,value)
 137 #define PMC_Val(mask,value)             DEVICE_VALUE(PMC,mask,value)
 138 #define PMC_Mask(mask)                  DEVICE_MASK(PMC,mask)
 139 
 140 
 141 #define PBUS_Write(reg,value)         DEVICE_WRITE(PBUS,reg,value)
 142 #define PBUS_Read(reg)                DEVICE_READ(PBUS,reg)
 143 #define PBUS_Print(reg)               DEVICE_PRINT(PBUS,reg)
 144 #define PBUS_Def(mask,value)          DEVICE_DEF(PBUS,mask,value)
 145 #define PBUS_Val(mask,value)          DEVICE_VALUE(PBUS,mask,value)
 146 #define PBUS_Mask(mask)               DEVICE_MASK(PBUS,mask)
 147 
 148 
 149 #define PRAMDAC_Write(reg,value)         DEVICE_WRITE(PRAMDAC,reg,value)
 150 #define PRAMDAC_Read(reg)                DEVICE_READ(PRAMDAC,reg)
 151 #define PRAMDAC_Print(reg)               DEVICE_PRINT(PRAMDAC,reg)
 152 #define PRAMDAC_Def(mask,value)          DEVICE_DEF(PRAMDAC,mask,value)
 153 #define PRAMDAC_Val(mask,value)          DEVICE_VALUE(PRAMDAC,mask,value)
 154 #define PRAMDAC_Mask(mask)               DEVICE_MASK(PRAMDAC,mask)
 155 
 156 
 157 #define PDAC_ReadExt(reg) \
 158   ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
 159   (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
 160   (PDAC_Read(INDEX_DATA)))
 161 
 162 #define PDAC_WriteExt(reg,value)\
 163   ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
 164   (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
 165   (PDAC_Write(INDEX_DATA,(value))))
 166 
 167 #define CRTC_Write(index,value) outb((index), 0x3d4); outb(value, 0x3d5)
 168 #define CRTC_Read(index) (outb(index, 0x3d4),inb(0x3d5))
 169 
 170 #define PCRTC_Write(index,value) CRTC_Write(NV_PCRTC_##index,value)
 171 #define PCRTC_Read(index) CRTC_Read(NV_PCRTC_##index)
 172 
 173 #define PCRTC_Def(mask,value)          DEVICE_DEF(PCRTC,mask,value)
 174 #define PCRTC_Val(mask,value)          DEVICE_VALUE(PCRTC,mask,value)
 175 #define PCRTC_Mask(mask)               DEVICE_MASK(PCRTC,mask)
 176 
 177 #define SR_Write(index,value) outb(0x3c4,(index));outb(0x3c5,value)
 178 #define SR_Read(index) (outb(0x3c4,index),inb(0x3c5))
 179 
 180 extern volatile unsigned  *nvCONTROL;
 181 
 182 typedef enum {NV1,NV3,NV4,NumNVChips} NVChipType;
 183 
 184 NVChipType GetChipType(void);
 185 
 186 #endif
 187 
 188