This source file includes following definitions.
- pci_vc_save_restore_dwords
- pci_vc_load_arb_table
- pci_vc_load_port_arb_table
- pci_vc_enable
- pci_vc_do_save_buffer
- pci_save_vc_state
- pci_restore_vc_state
- pci_allocate_vc_save_buffers
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9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/pci_regs.h>
14 #include <linux/types.h>
15
16 #include "pci.h"
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25
26 static void pci_vc_save_restore_dwords(struct pci_dev *dev, int pos,
27 u32 *buf, int dwords, bool save)
28 {
29 int i;
30
31 for (i = 0; i < dwords; i++, buf++) {
32 if (save)
33 pci_read_config_dword(dev, pos + (i * 4), buf);
34 else
35 pci_write_config_dword(dev, pos + (i * 4), *buf);
36 }
37 }
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46
47
48 static void pci_vc_load_arb_table(struct pci_dev *dev, int pos)
49 {
50 u16 ctrl;
51
52 pci_read_config_word(dev, pos + PCI_VC_PORT_CTRL, &ctrl);
53 pci_write_config_word(dev, pos + PCI_VC_PORT_CTRL,
54 ctrl | PCI_VC_PORT_CTRL_LOAD_TABLE);
55 if (pci_wait_for_pending(dev, pos + PCI_VC_PORT_STATUS,
56 PCI_VC_PORT_STATUS_TABLE))
57 return;
58
59 pci_err(dev, "VC arbitration table failed to load\n");
60 }
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71
72 static void pci_vc_load_port_arb_table(struct pci_dev *dev, int pos, int res)
73 {
74 int ctrl_pos, status_pos;
75 u32 ctrl;
76
77 ctrl_pos = pos + PCI_VC_RES_CTRL + (res * PCI_CAP_VC_PER_VC_SIZEOF);
78 status_pos = pos + PCI_VC_RES_STATUS + (res * PCI_CAP_VC_PER_VC_SIZEOF);
79
80 pci_read_config_dword(dev, ctrl_pos, &ctrl);
81 pci_write_config_dword(dev, ctrl_pos,
82 ctrl | PCI_VC_RES_CTRL_LOAD_TABLE);
83
84 if (pci_wait_for_pending(dev, status_pos, PCI_VC_RES_STATUS_TABLE))
85 return;
86
87 pci_err(dev, "VC%d port arbitration table failed to load\n", res);
88 }
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103 static void pci_vc_enable(struct pci_dev *dev, int pos, int res)
104 {
105 int ctrl_pos, status_pos, id, pos2, evcc, i, ctrl_pos2, status_pos2;
106 u32 ctrl, header, cap1, ctrl2;
107 struct pci_dev *link = NULL;
108
109
110 if (!pci_is_pcie(dev) || !pcie_downstream_port(dev))
111 return;
112
113 ctrl_pos = pos + PCI_VC_RES_CTRL + (res * PCI_CAP_VC_PER_VC_SIZEOF);
114 status_pos = pos + PCI_VC_RES_STATUS + (res * PCI_CAP_VC_PER_VC_SIZEOF);
115
116 pci_read_config_dword(dev, ctrl_pos, &ctrl);
117 id = ctrl & PCI_VC_RES_CTRL_ID;
118
119 pci_read_config_dword(dev, pos, &header);
120
121
122 if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_VC9 ||
123 pci_is_root_bus(dev->bus))
124 goto enable;
125
126 pos2 = pci_find_ext_capability(dev->bus->self, PCI_EXT_CAP_ID_VC);
127 if (!pos2)
128 goto enable;
129
130 pci_read_config_dword(dev->bus->self, pos2 + PCI_VC_PORT_CAP1, &cap1);
131 evcc = cap1 & PCI_VC_CAP1_EVCC;
132
133
134 for (i = 1; i < evcc + 1; i++) {
135 ctrl_pos2 = pos2 + PCI_VC_RES_CTRL +
136 (i * PCI_CAP_VC_PER_VC_SIZEOF);
137 status_pos2 = pos2 + PCI_VC_RES_STATUS +
138 (i * PCI_CAP_VC_PER_VC_SIZEOF);
139 pci_read_config_dword(dev->bus->self, ctrl_pos2, &ctrl2);
140 if ((ctrl2 & PCI_VC_RES_CTRL_ID) == id) {
141 link = dev->bus->self;
142 break;
143 }
144 }
145
146 if (!link)
147 goto enable;
148
149
150 if (ctrl2 & PCI_VC_RES_CTRL_ENABLE) {
151 ctrl2 &= ~PCI_VC_RES_CTRL_ENABLE;
152 pci_write_config_dword(link, ctrl_pos2, ctrl2);
153 }
154
155
156 ctrl2 |= PCI_VC_RES_CTRL_ENABLE;
157 pci_write_config_dword(link, ctrl_pos2, ctrl2);
158 enable:
159 ctrl |= PCI_VC_RES_CTRL_ENABLE;
160 pci_write_config_dword(dev, ctrl_pos, ctrl);
161
162 if (!pci_wait_for_pending(dev, status_pos, PCI_VC_RES_STATUS_NEGO))
163 pci_err(dev, "VC%d negotiation stuck pending\n", id);
164
165 if (link && !pci_wait_for_pending(link, status_pos2,
166 PCI_VC_RES_STATUS_NEGO))
167 pci_err(link, "VC%d negotiation stuck pending\n", id);
168 }
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184
185 static int pci_vc_do_save_buffer(struct pci_dev *dev, int pos,
186 struct pci_cap_saved_state *save_state,
187 bool save)
188 {
189 u32 cap1;
190 char evcc, lpevcc, parb_size;
191 int i, len = 0;
192 u8 *buf = save_state ? (u8 *)save_state->cap.data : NULL;
193
194
195 if (buf && save_state->cap.size !=
196 pci_vc_do_save_buffer(dev, pos, NULL, save)) {
197 pci_err(dev, "VC save buffer size does not match @0x%x\n", pos);
198 return -ENOMEM;
199 }
200
201 pci_read_config_dword(dev, pos + PCI_VC_PORT_CAP1, &cap1);
202
203 evcc = cap1 & PCI_VC_CAP1_EVCC;
204
205 lpevcc = (cap1 & PCI_VC_CAP1_LPEVCC) >> 4;
206
207 parb_size = 1 << ((cap1 & PCI_VC_CAP1_ARB_SIZE) >> 10);
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214
215 if (buf) {
216 if (save)
217 pci_read_config_word(dev, pos + PCI_VC_PORT_CTRL,
218 (u16 *)buf);
219 else
220 pci_write_config_word(dev, pos + PCI_VC_PORT_CTRL,
221 *(u16 *)buf);
222 buf += 4;
223 }
224 len += 4;
225
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228
229
230 if (lpevcc) {
231 u32 cap2;
232 int vcarb_offset;
233
234 pci_read_config_dword(dev, pos + PCI_VC_PORT_CAP2, &cap2);
235 vcarb_offset = ((cap2 & PCI_VC_CAP2_ARB_OFF) >> 24) * 16;
236
237 if (vcarb_offset) {
238 int size, vcarb_phases = 0;
239
240 if (cap2 & PCI_VC_CAP2_128_PHASE)
241 vcarb_phases = 128;
242 else if (cap2 & PCI_VC_CAP2_64_PHASE)
243 vcarb_phases = 64;
244 else if (cap2 & PCI_VC_CAP2_32_PHASE)
245 vcarb_phases = 32;
246
247
248 size = ((lpevcc + 1) * vcarb_phases * 4) / 8;
249
250 if (size && buf) {
251 pci_vc_save_restore_dwords(dev,
252 pos + vcarb_offset,
253 (u32 *)buf,
254 size / 4, save);
255
256
257
258
259 if (!save)
260 pci_vc_load_arb_table(dev, pos);
261
262 buf += size;
263 }
264 len += size;
265 }
266 }
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274
275 for (i = 0; i < evcc + 1; i++) {
276 u32 cap;
277 int parb_offset;
278
279 pci_read_config_dword(dev, pos + PCI_VC_RES_CAP +
280 (i * PCI_CAP_VC_PER_VC_SIZEOF), &cap);
281 parb_offset = ((cap & PCI_VC_RES_CAP_ARB_OFF) >> 24) * 16;
282 if (parb_offset) {
283 int size, parb_phases = 0;
284
285 if (cap & PCI_VC_RES_CAP_256_PHASE)
286 parb_phases = 256;
287 else if (cap & (PCI_VC_RES_CAP_128_PHASE |
288 PCI_VC_RES_CAP_128_PHASE_TB))
289 parb_phases = 128;
290 else if (cap & PCI_VC_RES_CAP_64_PHASE)
291 parb_phases = 64;
292 else if (cap & PCI_VC_RES_CAP_32_PHASE)
293 parb_phases = 32;
294
295 size = (parb_size * parb_phases) / 8;
296
297 if (size && buf) {
298 pci_vc_save_restore_dwords(dev,
299 pos + parb_offset,
300 (u32 *)buf,
301 size / 4, save);
302 buf += size;
303 }
304 len += size;
305 }
306
307
308 if (buf) {
309 int ctrl_pos = pos + PCI_VC_RES_CTRL +
310 (i * PCI_CAP_VC_PER_VC_SIZEOF);
311 if (save)
312 pci_read_config_dword(dev, ctrl_pos,
313 (u32 *)buf);
314 else {
315 u32 tmp, ctrl = *(u32 *)buf;
316
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319
320 pci_read_config_dword(dev, ctrl_pos, &tmp);
321 tmp &= PCI_VC_RES_CTRL_ENABLE;
322 tmp |= ctrl & ~PCI_VC_RES_CTRL_ENABLE;
323 pci_write_config_dword(dev, ctrl_pos, tmp);
324
325 if (ctrl & PCI_VC_RES_CTRL_ARB_SELECT)
326 pci_vc_load_port_arb_table(dev, pos, i);
327
328 if ((ctrl ^ tmp) & PCI_VC_RES_CTRL_ENABLE)
329 pci_vc_enable(dev, pos, i);
330 }
331 buf += 4;
332 }
333 len += 4;
334 }
335
336 return buf ? 0 : len;
337 }
338
339 static struct {
340 u16 id;
341 const char *name;
342 } vc_caps[] = { { PCI_EXT_CAP_ID_MFVC, "MFVC" },
343 { PCI_EXT_CAP_ID_VC, "VC" },
344 { PCI_EXT_CAP_ID_VC9, "VC9" } };
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353 int pci_save_vc_state(struct pci_dev *dev)
354 {
355 int i;
356
357 for (i = 0; i < ARRAY_SIZE(vc_caps); i++) {
358 int pos, ret;
359 struct pci_cap_saved_state *save_state;
360
361 pos = pci_find_ext_capability(dev, vc_caps[i].id);
362 if (!pos)
363 continue;
364
365 save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id);
366 if (!save_state) {
367 pci_err(dev, "%s buffer not found in %s\n",
368 vc_caps[i].name, __func__);
369 return -ENOMEM;
370 }
371
372 ret = pci_vc_do_save_buffer(dev, pos, save_state, true);
373 if (ret) {
374 pci_err(dev, "%s save unsuccessful %s\n",
375 vc_caps[i].name, __func__);
376 return ret;
377 }
378 }
379
380 return 0;
381 }
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389
390 void pci_restore_vc_state(struct pci_dev *dev)
391 {
392 int i;
393
394 for (i = 0; i < ARRAY_SIZE(vc_caps); i++) {
395 int pos;
396 struct pci_cap_saved_state *save_state;
397
398 pos = pci_find_ext_capability(dev, vc_caps[i].id);
399 save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id);
400 if (!save_state || !pos)
401 continue;
402
403 pci_vc_do_save_buffer(dev, pos, save_state, false);
404 }
405 }
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411
412
413
414 void pci_allocate_vc_save_buffers(struct pci_dev *dev)
415 {
416 int i;
417
418 for (i = 0; i < ARRAY_SIZE(vc_caps); i++) {
419 int len, pos = pci_find_ext_capability(dev, vc_caps[i].id);
420
421 if (!pos)
422 continue;
423
424 len = pci_vc_do_save_buffer(dev, pos, NULL, false);
425 if (pci_add_ext_cap_save_buffer(dev, vc_caps[i].id, len))
426 pci_err(dev, "unable to preallocate %s save buffer\n",
427 vc_caps[i].name);
428 }
429 }