This source file includes following definitions.
- mid_pci_power_manageable
- mid_pci_set_power_state
- mid_pci_get_power_state
- mid_pci_choose_state
- mid_pci_wakeup
- mid_pci_need_resume
- mid_pci_init
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10 #include <linux/init.h>
11 #include <linux/pci.h>
12
13 #include <asm/cpu_device_id.h>
14 #include <asm/intel-family.h>
15 #include <asm/intel-mid.h>
16
17 #include "pci.h"
18
19 static bool mid_pci_power_manageable(struct pci_dev *dev)
20 {
21 return true;
22 }
23
24 static int mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state)
25 {
26 return intel_mid_pci_set_power_state(pdev, state);
27 }
28
29 static pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
30 {
31 return intel_mid_pci_get_power_state(pdev);
32 }
33
34 static pci_power_t mid_pci_choose_state(struct pci_dev *pdev)
35 {
36 return PCI_D3hot;
37 }
38
39 static int mid_pci_wakeup(struct pci_dev *dev, bool enable)
40 {
41 return 0;
42 }
43
44 static bool mid_pci_need_resume(struct pci_dev *dev)
45 {
46 return false;
47 }
48
49 static const struct pci_platform_pm_ops mid_pci_platform_pm = {
50 .is_manageable = mid_pci_power_manageable,
51 .set_state = mid_pci_set_power_state,
52 .get_state = mid_pci_get_power_state,
53 .choose_state = mid_pci_choose_state,
54 .set_wakeup = mid_pci_wakeup,
55 .need_resume = mid_pci_need_resume,
56 };
57
58 #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
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64 static const struct x86_cpu_id lpss_cpu_ids[] = {
65 ICPU(INTEL_FAM6_ATOM_SALTWELL_MID),
66 ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID),
67 {}
68 };
69
70 static int __init mid_pci_init(void)
71 {
72 const struct x86_cpu_id *id;
73
74 id = x86_match_cpu(lpss_cpu_ids);
75 if (id)
76 pci_set_platform_pm(&mid_pci_platform_pm);
77 return 0;
78 }
79 arch_initcall(mid_pci_init);