drivers/pci/hotplug/cpqphp

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This source file includes following definitions.
is_slot64bit
is_slot66mhz
detect_SMBIOS_pointer
init_SERR
init_cpqhp_routing_table
pci_print_IRQ_route
get_subsequent_smbios_entry
get_SMBIOS_entry
ctrl_slot_cleanup
get_slot_mapping
cpqhp_set_attention_status
set_attention_status
process_SI
process_SS
hardware_test
get_power_status
get_attention_status
get_latch_status
get_adapter_status
ctrl_slot_setup
one_time_init
cpqhpc_probe
unload_cpqphpd
cpqhpc_init
cpqhpc_cleanup
   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Compaq Hot Plug Controller Driver
   4  *
   5  * Copyright (C) 1995,2001 Compaq Computer Corporation
   6  * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
   7  * Copyright (C) 2001 IBM Corp.
   8  *
   9  * All rights reserved.
  10  *
  11  * Send feedback to <greg@kroah.com>
  12  *
  13  * Jan 12, 2003 -       Added 66/100/133MHz PCI-X support,
  14  *                      Torben Mathiasen <torben.mathiasen@hp.com>
  15  */
  16 
  17 #include <linux/module.h>
  18 #include <linux/moduleparam.h>
  19 #include <linux/kernel.h>
  20 #include <linux/types.h>
  21 #include <linux/proc_fs.h>
  22 #include <linux/slab.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/pci.h>
  25 #include <linux/pci_hotplug.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 
  29 #include <linux/uaccess.h>
  30 
  31 #include "cpqphp.h"
  32 #include "cpqphp_nvram.h"
  33 
  34 
  35 /* Global variables */
  36 int cpqhp_debug;
  37 int cpqhp_legacy_mode;
  38 struct controller *cpqhp_ctrl_list;     /* = NULL */
  39 struct pci_func *cpqhp_slot_list[256];
  40 struct irq_routing_table *cpqhp_routing_table;
  41 
  42 /* local variables */
  43 static void __iomem *smbios_table;
  44 static void __iomem *smbios_start;
  45 static void __iomem *cpqhp_rom_start;
  46 static bool power_mode;
  47 static bool debug;
  48 static int initialized;
  49 
  50 #define DRIVER_VERSION  "0.9.8"
  51 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  52 #define DRIVER_DESC     "Compaq Hot Plug PCI Controller Driver"
  53 
  54 MODULE_AUTHOR(DRIVER_AUTHOR);
  55 MODULE_DESCRIPTION(DRIVER_DESC);
  56 MODULE_LICENSE("GPL");
  57 
  58 module_param(power_mode, bool, 0644);
  59 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  60 
  61 module_param(debug, bool, 0644);
  62 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  63 
  64 #define CPQHPC_MODULE_MINOR 208
  65 
  66 static inline int is_slot64bit(struct slot *slot)
  67 {
  68         return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  69 }
  70 
  71 static inline int is_slot66mhz(struct slot *slot)
  72 {
  73         return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  74 }
  75 
  76 /**
  77  * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  78  * @begin: begin pointer for region to be scanned.
  79  * @end: end pointer for region to be scanned.
  80  *
  81  * Returns pointer to the head of the SMBIOS tables (or %NULL).
  82  */
  83 static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  84 {
  85         void __iomem *fp;
  86         void __iomem *endp;
  87         u8 temp1, temp2, temp3, temp4;
  88         int status = 0;
  89 
  90         endp = (end - sizeof(u32) + 1);
  91 
  92         for (fp = begin; fp <= endp; fp += 16) {
  93                 temp1 = readb(fp);
  94                 temp2 = readb(fp+1);
  95                 temp3 = readb(fp+2);
  96                 temp4 = readb(fp+3);
  97                 if (temp1 == '_' &&
  98                     temp2 == 'S' &&
  99                     temp3 == 'M' &&
 100                     temp4 == '_') {
 101                         status = 1;
 102                         break;
 103                 }
 104         }
 105 
 106         if (!status)
 107                 fp = NULL;
 108 
 109         dbg("Discovered SMBIOS Entry point at %p\n", fp);
 110 
 111         return fp;
 112 }
 113 
 114 /**
 115  * init_SERR - Initializes the per slot SERR generation.
 116  * @ctrl: controller to use
 117  *
 118  * For unexpected switch opens
 119  */
 120 static int init_SERR(struct controller *ctrl)
 121 {
 122         u32 tempdword;
 123         u32 number_of_slots;
 124 
 125         if (!ctrl)
 126                 return 1;
 127 
 128         tempdword = ctrl->first_slot;
 129 
 130         number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
 131         /* Loop through slots */
 132         while (number_of_slots) {
 133                 writeb(0, ctrl->hpc_reg + SLOT_SERR);
 134                 tempdword++;
 135                 number_of_slots--;
 136         }
 137 
 138         return 0;
 139 }
 140 
 141 static int init_cpqhp_routing_table(void)
 142 {
 143         int len;
 144 
 145         cpqhp_routing_table = pcibios_get_irq_routing_table();
 146         if (cpqhp_routing_table == NULL)
 147                 return -ENOMEM;
 148 
 149         len = cpqhp_routing_table_length();
 150         if (len == 0) {
 151                 kfree(cpqhp_routing_table);
 152                 cpqhp_routing_table = NULL;
 153                 return -1;
 154         }
 155 
 156         return 0;
 157 }
 158 
 159 /* nice debugging output */
 160 static void pci_print_IRQ_route(void)
 161 {
 162         int len;
 163         int loop;
 164         u8 tbus, tdevice, tslot;
 165 
 166         len = cpqhp_routing_table_length();
 167 
 168         dbg("bus dev func slot\n");
 169         for (loop = 0; loop < len; ++loop) {
 170                 tbus = cpqhp_routing_table->slots[loop].bus;
 171                 tdevice = cpqhp_routing_table->slots[loop].devfn;
 172                 tslot = cpqhp_routing_table->slots[loop].slot;
 173                 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
 174 
 175         }
 176 }
 177 
 178 
 179 /**
 180  * get_subsequent_smbios_entry: get the next entry from bios table.
 181  * @smbios_start: where to start in the SMBIOS table
 182  * @smbios_table: location of the SMBIOS table
 183  * @curr: %NULL or pointer to previously returned structure
 184  *
 185  * Gets the first entry if previous == NULL;
 186  * otherwise, returns the next entry.
 187  * Uses global SMBIOS Table pointer.
 188  *
 189  * Returns a pointer to an SMBIOS structure or NULL if none found.
 190  */
 191 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
 192                                                 void __iomem *smbios_table,
 193                                                 void __iomem *curr)
 194 {
 195         u8 bail = 0;
 196         u8 previous_byte = 1;
 197         void __iomem *p_temp;
 198         void __iomem *p_max;
 199 
 200         if (!smbios_table || !curr)
 201                 return NULL;
 202 
 203         /* set p_max to the end of the table */
 204         p_max = smbios_start + readw(smbios_table + ST_LENGTH);
 205 
 206         p_temp = curr;
 207         p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
 208 
 209         while ((p_temp < p_max) && !bail) {
 210                 /* Look for the double NULL terminator
 211                  * The first condition is the previous byte
 212                  * and the second is the curr
 213                  */
 214                 if (!previous_byte && !(readb(p_temp)))
 215                         bail = 1;
 216 
 217                 previous_byte = readb(p_temp);
 218                 p_temp++;
 219         }
 220 
 221         if (p_temp < p_max)
 222                 return p_temp;
 223         else
 224                 return NULL;
 225 }
 226 
 227 
 228 /**
 229  * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
 230  * @smbios_start: where to start in the SMBIOS table
 231  * @smbios_table: location of the SMBIOS table
 232  * @type: SMBIOS structure type to be returned
 233  * @previous: %NULL or pointer to previously returned structure
 234  *
 235  * Gets the first entry of the specified type if previous == %NULL;
 236  * Otherwise, returns the next entry of the given type.
 237  * Uses global SMBIOS Table pointer.
 238  * Uses get_subsequent_smbios_entry.
 239  *
 240  * Returns a pointer to an SMBIOS structure or %NULL if none found.
 241  */
 242 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
 243                                         void __iomem *smbios_table,
 244                                         u8 type,
 245                                         void __iomem *previous)
 246 {
 247         if (!smbios_table)
 248                 return NULL;
 249 
 250         if (!previous)
 251                 previous = smbios_start;
 252         else
 253                 previous = get_subsequent_smbios_entry(smbios_start,
 254                                         smbios_table, previous);
 255 
 256         while (previous)
 257                 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
 258                         previous = get_subsequent_smbios_entry(smbios_start,
 259                                                 smbios_table, previous);
 260                 else
 261                         break;
 262 
 263         return previous;
 264 }
 265 
 266 static int ctrl_slot_cleanup(struct controller *ctrl)
 267 {
 268         struct slot *old_slot, *next_slot;
 269 
 270         old_slot = ctrl->slot;
 271         ctrl->slot = NULL;
 272 
 273         while (old_slot) {
 274                 next_slot = old_slot->next;
 275                 pci_hp_deregister(&old_slot->hotplug_slot);
 276                 kfree(old_slot);
 277                 old_slot = next_slot;
 278         }
 279 
 280         cpqhp_remove_debugfs_files(ctrl);
 281 
 282         /* Free IRQ associated with hot plug device */
 283         free_irq(ctrl->interrupt, ctrl);
 284         /* Unmap the memory */
 285         iounmap(ctrl->hpc_reg);
 286         /* Finally reclaim PCI mem */
 287         release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
 288                            pci_resource_len(ctrl->pci_dev, 0));
 289 
 290         return 0;
 291 }
 292 
 293 
 294 /**
 295  * get_slot_mapping - determine logical slot mapping for PCI device
 296  *
 297  * Won't work for more than one PCI-PCI bridge in a slot.
 298  *
 299  * @bus_num - bus number of PCI device
 300  * @dev_num - device number of PCI device
 301  * @slot - Pointer to u8 where slot number will be returned
 302  *
 303  * Output:      SUCCESS or FAILURE
 304  */
 305 static int
 306 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
 307 {
 308         u32 work;
 309         long len;
 310         long loop;
 311 
 312         u8 tbus, tdevice, tslot, bridgeSlot;
 313 
 314         dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
 315 
 316         bridgeSlot = 0xFF;
 317 
 318         len = cpqhp_routing_table_length();
 319         for (loop = 0; loop < len; ++loop) {
 320                 tbus = cpqhp_routing_table->slots[loop].bus;
 321                 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
 322                 tslot = cpqhp_routing_table->slots[loop].slot;
 323 
 324                 if ((tbus == bus_num) && (tdevice == dev_num)) {
 325                         *slot = tslot;
 326                         return 0;
 327                 } else {
 328                         /* Did not get a match on the target PCI device. Check
 329                          * if the current IRQ table entry is a PCI-to-PCI
 330                          * bridge device.  If so, and it's secondary bus
 331                          * matches the bus number for the target device, I need
 332                          * to save the bridge's slot number.  If I can not find
 333                          * an entry for the target device, I will have to
 334                          * assume it's on the other side of the bridge, and
 335                          * assign it the bridge's slot.
 336                          */
 337                         bus->number = tbus;
 338                         pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
 339                                                 PCI_CLASS_REVISION, &work);
 340 
 341                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 342                                 pci_bus_read_config_dword(bus,
 343                                                         PCI_DEVFN(tdevice, 0),
 344                                                         PCI_PRIMARY_BUS, &work);
 345                                 // See if bridge's secondary bus matches target bus.
 346                                 if (((work >> 8) & 0x000000FF) == (long) bus_num)
 347                                         bridgeSlot = tslot;
 348                         }
 349                 }
 350 
 351         }
 352 
 353         /* If we got here, we didn't find an entry in the IRQ mapping table for
 354          * the target PCI device.  If we did determine that the target device
 355          * is on the other side of a PCI-to-PCI bridge, return the slot number
 356          * for the bridge.
 357          */
 358         if (bridgeSlot != 0xFF) {
 359                 *slot = bridgeSlot;
 360                 return 0;
 361         }
 362         /* Couldn't find an entry in the routing table for this PCI device */
 363         return -1;
 364 }
 365 
 366 
 367 /**
 368  * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
 369  * @ctrl: struct controller to use
 370  * @func: PCI device/function info
 371  * @status: LED control flag: 1 = LED on, 0 = LED off
 372  */
 373 static int
 374 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
 375                                 u32 status)
 376 {
 377         u8 hp_slot;
 378 
 379         if (func == NULL)
 380                 return 1;
 381 
 382         hp_slot = func->device - ctrl->slot_device_offset;
 383 
 384         /* Wait for exclusive access to hardware */
 385         mutex_lock(&ctrl->crit_sect);
 386 
 387         if (status == 1)
 388                 amber_LED_on(ctrl, hp_slot);
 389         else if (status == 0)
 390                 amber_LED_off(ctrl, hp_slot);
 391         else {
 392                 /* Done with exclusive hardware access */
 393                 mutex_unlock(&ctrl->crit_sect);
 394                 return 1;
 395         }
 396 
 397         set_SOGO(ctrl);
 398 
 399         /* Wait for SOBS to be unset */
 400         wait_for_ctrl_irq(ctrl);
 401 
 402         /* Done with exclusive hardware access */
 403         mutex_unlock(&ctrl->crit_sect);
 404 
 405         return 0;
 406 }
 407 
 408 
 409 /**
 410  * set_attention_status - Turns the Amber LED for a slot on or off
 411  * @hotplug_slot: slot to change LED on
 412  * @status: LED control flag
 413  */
 414 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
 415 {
 416         struct pci_func *slot_func;
 417         struct slot *slot = to_slot(hotplug_slot);
 418         struct controller *ctrl = slot->ctrl;
 419         u8 bus;
 420         u8 devfn;
 421         u8 device;
 422         u8 function;
 423 
 424         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 425 
 426         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
 427                 return -ENODEV;
 428 
 429         device = devfn >> 3;
 430         function = devfn & 0x7;
 431         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
 432 
 433         slot_func = cpqhp_slot_find(bus, device, function);
 434         if (!slot_func)
 435                 return -ENODEV;
 436 
 437         return cpqhp_set_attention_status(ctrl, slot_func, status);
 438 }
 439 
 440 
 441 static int process_SI(struct hotplug_slot *hotplug_slot)
 442 {
 443         struct pci_func *slot_func;
 444         struct slot *slot = to_slot(hotplug_slot);
 445         struct controller *ctrl = slot->ctrl;
 446         u8 bus;
 447         u8 devfn;
 448         u8 device;
 449         u8 function;
 450 
 451         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 452 
 453         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
 454                 return -ENODEV;
 455 
 456         device = devfn >> 3;
 457         function = devfn & 0x7;
 458         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
 459 
 460         slot_func = cpqhp_slot_find(bus, device, function);
 461         if (!slot_func)
 462                 return -ENODEV;
 463 
 464         slot_func->bus = bus;
 465         slot_func->device = device;
 466         slot_func->function = function;
 467         slot_func->configured = 0;
 468         dbg("board_added(%p, %p)\n", slot_func, ctrl);
 469         return cpqhp_process_SI(ctrl, slot_func);
 470 }
 471 
 472 
 473 static int process_SS(struct hotplug_slot *hotplug_slot)
 474 {
 475         struct pci_func *slot_func;
 476         struct slot *slot = to_slot(hotplug_slot);
 477         struct controller *ctrl = slot->ctrl;
 478         u8 bus;
 479         u8 devfn;
 480         u8 device;
 481         u8 function;
 482 
 483         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 484 
 485         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
 486                 return -ENODEV;
 487 
 488         device = devfn >> 3;
 489         function = devfn & 0x7;
 490         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
 491 
 492         slot_func = cpqhp_slot_find(bus, device, function);
 493         if (!slot_func)
 494                 return -ENODEV;
 495 
 496         dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
 497         return cpqhp_process_SS(ctrl, slot_func);
 498 }
 499 
 500 
 501 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
 502 {
 503         struct slot *slot = to_slot(hotplug_slot);
 504         struct controller *ctrl = slot->ctrl;
 505 
 506         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 507 
 508         return cpqhp_hardware_test(ctrl, value);
 509 }
 510 
 511 
 512 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
 513 {
 514         struct slot *slot = to_slot(hotplug_slot);
 515         struct controller *ctrl = slot->ctrl;
 516 
 517         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 518 
 519         *value = get_slot_enabled(ctrl, slot);
 520         return 0;
 521 }
 522 
 523 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
 524 {
 525         struct slot *slot = to_slot(hotplug_slot);
 526         struct controller *ctrl = slot->ctrl;
 527 
 528         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 529 
 530         *value = cpq_get_attention_status(ctrl, slot);
 531         return 0;
 532 }
 533 
 534 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
 535 {
 536         struct slot *slot = to_slot(hotplug_slot);
 537         struct controller *ctrl = slot->ctrl;
 538 
 539         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 540 
 541         *value = cpq_get_latch_status(ctrl, slot);
 542 
 543         return 0;
 544 }
 545 
 546 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
 547 {
 548         struct slot *slot = to_slot(hotplug_slot);
 549         struct controller *ctrl = slot->ctrl;
 550 
 551         dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
 552 
 553         *value = get_presence_status(ctrl, slot);
 554 
 555         return 0;
 556 }
 557 
 558 static const struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
 559         .set_attention_status = set_attention_status,
 560         .enable_slot =          process_SI,
 561         .disable_slot =         process_SS,
 562         .hardware_test =        hardware_test,
 563         .get_power_status =     get_power_status,
 564         .get_attention_status = get_attention_status,
 565         .get_latch_status =     get_latch_status,
 566         .get_adapter_status =   get_adapter_status,
 567 };
 568 
 569 #define SLOT_NAME_SIZE 10
 570 
 571 static int ctrl_slot_setup(struct controller *ctrl,
 572                         void __iomem *smbios_start,
 573                         void __iomem *smbios_table)
 574 {
 575         struct slot *slot;
 576         struct pci_bus *bus = ctrl->pci_bus;
 577         u8 number_of_slots;
 578         u8 slot_device;
 579         u8 slot_number;
 580         u8 ctrl_slot;
 581         u32 tempdword;
 582         char name[SLOT_NAME_SIZE];
 583         void __iomem *slot_entry = NULL;
 584         int result;
 585 
 586         dbg("%s\n", __func__);
 587 
 588         tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
 589 
 590         number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
 591         slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
 592         slot_number = ctrl->first_slot;
 593 
 594         while (number_of_slots) {
 595                 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
 596                 if (!slot) {
 597                         result = -ENOMEM;
 598                         goto error;
 599                 }
 600 
 601                 slot->ctrl = ctrl;
 602                 slot->bus = ctrl->bus;
 603                 slot->device = slot_device;
 604                 slot->number = slot_number;
 605                 dbg("slot->number = %u\n", slot->number);
 606 
 607                 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
 608                                         slot_entry);
 609 
 610                 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
 611                                 slot->number)) {
 612                         slot_entry = get_SMBIOS_entry(smbios_start,
 613                                                 smbios_table, 9, slot_entry);
 614                 }
 615 
 616                 slot->p_sm_slot = slot_entry;
 617 
 618                 timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
 619                 slot->task_event.expires = jiffies + 5 * HZ;
 620 
 621                 /*FIXME: these capabilities aren't used but if they are
 622                  *       they need to be correctly implemented
 623                  */
 624                 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
 625                 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
 626 
 627                 if (is_slot64bit(slot))
 628                         slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
 629                 if (is_slot66mhz(slot))
 630                         slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
 631                 if (bus->cur_bus_speed == PCI_SPEED_66MHz)
 632                         slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
 633 
 634                 ctrl_slot =
 635                         slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
 636 
 637                 /* Check presence */
 638                 slot->capabilities |=
 639                         ((((~tempdword) >> 23) |
 640                          ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
 641                 /* Check the switch state */
 642                 slot->capabilities |=
 643                         ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
 644                 /* Check the slot enable */
 645                 slot->capabilities |=
 646                         ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
 647 
 648                 /* register this slot with the hotplug pci core */
 649                 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
 650                 slot->hotplug_slot.ops = &cpqphp_hotplug_slot_ops;
 651 
 652                 dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
 653                                 slot->bus, slot->device,
 654                                 slot->number, ctrl->slot_device_offset,
 655                                 slot_number);
 656                 result = pci_hp_register(&slot->hotplug_slot,
 657                                          ctrl->pci_dev->bus,
 658                                          slot->device,
 659                                          name);
 660                 if (result) {
 661                         err("pci_hp_register failed with error %d\n", result);
 662                         goto error_slot;
 663                 }
 664 
 665                 slot->next = ctrl->slot;
 666                 ctrl->slot = slot;
 667 
 668                 number_of_slots--;
 669                 slot_device++;
 670                 slot_number++;
 671         }
 672 
 673         return 0;
 674 error_slot:
 675         kfree(slot);
 676 error:
 677         return result;
 678 }
 679 
 680 static int one_time_init(void)
 681 {
 682         int loop;
 683         int retval = 0;
 684 
 685         if (initialized)
 686                 return 0;
 687 
 688         power_mode = 0;
 689 
 690         retval = init_cpqhp_routing_table();
 691         if (retval)
 692                 goto error;
 693 
 694         if (cpqhp_debug)
 695                 pci_print_IRQ_route();
 696 
 697         dbg("Initialize + Start the notification mechanism\n");
 698 
 699         retval = cpqhp_event_start_thread();
 700         if (retval)
 701                 goto error;
 702 
 703         dbg("Initialize slot lists\n");
 704         for (loop = 0; loop < 256; loop++)
 705                 cpqhp_slot_list[loop] = NULL;
 706 
 707         /* FIXME: We also need to hook the NMI handler eventually.
 708          * this also needs to be worked with Christoph
 709          * register_NMI_handler();
 710          */
 711         /* Map rom address */
 712         cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
 713         if (!cpqhp_rom_start) {
 714                 err("Could not ioremap memory region for ROM\n");
 715                 retval = -EIO;
 716                 goto error;
 717         }
 718 
 719         /* Now, map the int15 entry point if we are on compaq specific
 720          * hardware
 721          */
 722         compaq_nvram_init(cpqhp_rom_start);
 723 
 724         /* Map smbios table entry point structure */
 725         smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
 726                                         cpqhp_rom_start + ROM_PHY_LEN);
 727         if (!smbios_table) {
 728                 err("Could not find the SMBIOS pointer in memory\n");
 729                 retval = -EIO;
 730                 goto error_rom_start;
 731         }
 732 
 733         smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
 734                                         readw(smbios_table + ST_LENGTH));
 735         if (!smbios_start) {
 736                 err("Could not ioremap memory region taken from SMBIOS values\n");
 737                 retval = -EIO;
 738                 goto error_smbios_start;
 739         }
 740 
 741         initialized = 1;
 742 
 743         return retval;
 744 
 745 error_smbios_start:
 746         iounmap(smbios_start);
 747 error_rom_start:
 748         iounmap(cpqhp_rom_start);
 749 error:
 750         return retval;
 751 }
 752 
 753 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 754 {
 755         u8 num_of_slots = 0;
 756         u8 hp_slot = 0;
 757         u8 device;
 758         u8 bus_cap;
 759         u16 temp_word;
 760         u16 vendor_id;
 761         u16 subsystem_vid;
 762         u16 subsystem_deviceid;
 763         u32 rc;
 764         struct controller *ctrl;
 765         struct pci_func *func;
 766         struct pci_bus *bus;
 767         int err;
 768 
 769         err = pci_enable_device(pdev);
 770         if (err) {
 771                 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
 772                         pci_name(pdev), err);
 773                 return err;
 774         }
 775 
 776         bus = pdev->subordinate;
 777         if (!bus) {
 778                 pci_notice(pdev, "the device is not a bridge, skipping\n");
 779                 rc = -ENODEV;
 780                 goto err_disable_device;
 781         }
 782 
 783         /* Need to read VID early b/c it's used to differentiate CPQ and INTC
 784          * discovery
 785          */
 786         vendor_id = pdev->vendor;
 787         if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
 788             (vendor_id != PCI_VENDOR_ID_INTEL)) {
 789                 err(msg_HPC_non_compaq_or_intel);
 790                 rc = -ENODEV;
 791                 goto err_disable_device;
 792         }
 793         dbg("Vendor ID: %x\n", vendor_id);
 794 
 795         dbg("revision: %d\n", pdev->revision);
 796         if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
 797                 err(msg_HPC_rev_error);
 798                 rc = -ENODEV;
 799                 goto err_disable_device;
 800         }
 801 
 802         /* Check for the proper subsystem IDs
 803          * Intel uses a different SSID programming model than Compaq.
 804          * For Intel, each SSID bit identifies a PHP capability.
 805          * Also Intel HPCs may have RID=0.
 806          */
 807         if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
 808                 err(msg_HPC_not_supported);
 809                 rc = -ENODEV;
 810                 goto err_disable_device;
 811         }
 812 
 813         /* TODO: This code can be made to support non-Compaq or Intel
 814          * subsystem IDs
 815          */
 816         subsystem_vid = pdev->subsystem_vendor;
 817         dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
 818         if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
 819                 err(msg_HPC_non_compaq_or_intel);
 820                 rc = -ENODEV;
 821                 goto err_disable_device;
 822         }
 823 
 824         ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
 825         if (!ctrl) {
 826                 rc = -ENOMEM;
 827                 goto err_disable_device;
 828         }
 829 
 830         subsystem_deviceid = pdev->subsystem_device;
 831 
 832         info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
 833 
 834         /* Set Vendor ID, so it can be accessed later from other
 835          * functions
 836          */
 837         ctrl->vendor_id = vendor_id;
 838 
 839         switch (subsystem_vid) {
 840         case PCI_VENDOR_ID_COMPAQ:
 841                 if (pdev->revision >= 0x13) { /* CIOBX */
 842                         ctrl->push_flag = 1;
 843                         ctrl->slot_switch_type = 1;
 844                         ctrl->push_button = 1;
 845                         ctrl->pci_config_space = 1;
 846                         ctrl->defeature_PHP = 1;
 847                         ctrl->pcix_support = 1;
 848                         ctrl->pcix_speed_capability = 1;
 849                         pci_read_config_byte(pdev, 0x41, &bus_cap);
 850                         if (bus_cap & 0x80) {
 851                                 dbg("bus max supports 133MHz PCI-X\n");
 852                                 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
 853                                 break;
 854                         }
 855                         if (bus_cap & 0x40) {
 856                                 dbg("bus max supports 100MHz PCI-X\n");
 857                                 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
 858                                 break;
 859                         }
 860                         if (bus_cap & 0x20) {
 861                                 dbg("bus max supports 66MHz PCI-X\n");
 862                                 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
 863                                 break;
 864                         }
 865                         if (bus_cap & 0x10) {
 866                                 dbg("bus max supports 66MHz PCI\n");
 867                                 bus->max_bus_speed = PCI_SPEED_66MHz;
 868                                 break;
 869                         }
 870 
 871                         break;
 872                 }
 873 
 874                 switch (subsystem_deviceid) {
 875                 case PCI_SUB_HPC_ID:
 876                         /* Original 6500/7000 implementation */
 877                         ctrl->slot_switch_type = 1;
 878                         bus->max_bus_speed = PCI_SPEED_33MHz;
 879                         ctrl->push_button = 0;
 880                         ctrl->pci_config_space = 1;
 881                         ctrl->defeature_PHP = 1;
 882                         ctrl->pcix_support = 0;
 883                         ctrl->pcix_speed_capability = 0;
 884                         break;
 885                 case PCI_SUB_HPC_ID2:
 886                         /* First Pushbutton implementation */
 887                         ctrl->push_flag = 1;
 888                         ctrl->slot_switch_type = 1;
 889                         bus->max_bus_speed = PCI_SPEED_33MHz;
 890                         ctrl->push_button = 1;
 891                         ctrl->pci_config_space = 1;
 892                         ctrl->defeature_PHP = 1;
 893                         ctrl->pcix_support = 0;
 894                         ctrl->pcix_speed_capability = 0;
 895                         break;
 896                 case PCI_SUB_HPC_ID_INTC:
 897                         /* Third party (6500/7000) */
 898                         ctrl->slot_switch_type = 1;
 899                         bus->max_bus_speed = PCI_SPEED_33MHz;
 900                         ctrl->push_button = 0;
 901                         ctrl->pci_config_space = 1;
 902                         ctrl->defeature_PHP = 1;
 903                         ctrl->pcix_support = 0;
 904                         ctrl->pcix_speed_capability = 0;
 905                         break;
 906                 case PCI_SUB_HPC_ID3:
 907                         /* First 66 Mhz implementation */
 908                         ctrl->push_flag = 1;
 909                         ctrl->slot_switch_type = 1;
 910                         bus->max_bus_speed = PCI_SPEED_66MHz;
 911                         ctrl->push_button = 1;
 912                         ctrl->pci_config_space = 1;
 913                         ctrl->defeature_PHP = 1;
 914                         ctrl->pcix_support = 0;
 915                         ctrl->pcix_speed_capability = 0;
 916                         break;
 917                 case PCI_SUB_HPC_ID4:
 918                         /* First PCI-X implementation, 100MHz */
 919                         ctrl->push_flag = 1;
 920                         ctrl->slot_switch_type = 1;
 921                         bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
 922                         ctrl->push_button = 1;
 923                         ctrl->pci_config_space = 1;
 924                         ctrl->defeature_PHP = 1;
 925                         ctrl->pcix_support = 1;
 926                         ctrl->pcix_speed_capability = 0;
 927                         break;
 928                 default:
 929                         err(msg_HPC_not_supported);
 930                         rc = -ENODEV;
 931                         goto err_free_ctrl;
 932                 }
 933                 break;
 934 
 935         case PCI_VENDOR_ID_INTEL:
 936                 /* Check for speed capability (0=33, 1=66) */
 937                 if (subsystem_deviceid & 0x0001)
 938                         bus->max_bus_speed = PCI_SPEED_66MHz;
 939                 else
 940                         bus->max_bus_speed = PCI_SPEED_33MHz;
 941 
 942                 /* Check for push button */
 943                 if (subsystem_deviceid & 0x0002)
 944                         ctrl->push_button = 0;
 945                 else
 946                         ctrl->push_button = 1;
 947 
 948                 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
 949                 if (subsystem_deviceid & 0x0004)
 950                         ctrl->slot_switch_type = 0;
 951                 else
 952                         ctrl->slot_switch_type = 1;
 953 
 954                 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
 955                 if (subsystem_deviceid & 0x0008)
 956                         ctrl->defeature_PHP = 1;        /* PHP supported */
 957                 else
 958                         ctrl->defeature_PHP = 0;        /* PHP not supported */
 959 
 960                 /* Alternate Base Address Register Interface
 961                  * (0=not supported, 1=supported)
 962                  */
 963                 if (subsystem_deviceid & 0x0010)
 964                         ctrl->alternate_base_address = 1;
 965                 else
 966                         ctrl->alternate_base_address = 0;
 967 
 968                 /* PCI Config Space Index (0=not supported, 1=supported) */
 969                 if (subsystem_deviceid & 0x0020)
 970                         ctrl->pci_config_space = 1;
 971                 else
 972                         ctrl->pci_config_space = 0;
 973 
 974                 /* PCI-X support */
 975                 if (subsystem_deviceid & 0x0080) {
 976                         ctrl->pcix_support = 1;
 977                         if (subsystem_deviceid & 0x0040)
 978                                 /* 133MHz PCI-X if bit 7 is 1 */
 979                                 ctrl->pcix_speed_capability = 1;
 980                         else
 981                                 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
 982                                 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
 983                                 ctrl->pcix_speed_capability = 0;
 984                 } else {
 985                         /* Conventional PCI */
 986                         ctrl->pcix_support = 0;
 987                         ctrl->pcix_speed_capability = 0;
 988                 }
 989                 break;
 990 
 991         default:
 992                 err(msg_HPC_not_supported);
 993                 rc = -ENODEV;
 994                 goto err_free_ctrl;
 995         }
 996 
 997         /* Tell the user that we found one. */
 998         info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
 999                                         pdev->bus->number);
1000 
1001         dbg("Hotplug controller capabilities:\n");
1002         dbg("    speed_capability       %d\n", bus->max_bus_speed);
1003         dbg("    slot_switch_type       %s\n", ctrl->slot_switch_type ?
1004                                         "switch present" : "no switch");
1005         dbg("    defeature_PHP          %s\n", ctrl->defeature_PHP ?
1006                                         "PHP supported" : "PHP not supported");
1007         dbg("    alternate_base_address %s\n", ctrl->alternate_base_address ?
1008                                         "supported" : "not supported");
1009         dbg("    pci_config_space       %s\n", ctrl->pci_config_space ?
1010                                         "supported" : "not supported");
1011         dbg("    pcix_speed_capability  %s\n", ctrl->pcix_speed_capability ?
1012                                         "supported" : "not supported");
1013         dbg("    pcix_support           %s\n", ctrl->pcix_support ?
1014                                         "supported" : "not supported");
1015 
1016         ctrl->pci_dev = pdev;
1017         pci_set_drvdata(pdev, ctrl);
1018 
1019         /* make our own copy of the pci bus structure,
1020          * as we like tweaking it a lot */
1021         ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1022         if (!ctrl->pci_bus) {
1023                 err("out of memory\n");
1024                 rc = -ENOMEM;
1025                 goto err_free_ctrl;
1026         }
1027 
1028         ctrl->bus = pdev->bus->number;
1029         ctrl->rev = pdev->revision;
1030         dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1031                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1032 
1033         mutex_init(&ctrl->crit_sect);
1034         init_waitqueue_head(&ctrl->queue);
1035 
1036         /* initialize our threads if they haven't already been started up */
1037         rc = one_time_init();
1038         if (rc)
1039                 goto err_free_bus;
1040 
1041         dbg("pdev = %p\n", pdev);
1042         dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1043         dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1044 
1045         if (!request_mem_region(pci_resource_start(pdev, 0),
1046                                 pci_resource_len(pdev, 0), MY_NAME)) {
1047                 err("cannot reserve MMIO region\n");
1048                 rc = -ENOMEM;
1049                 goto err_free_bus;
1050         }
1051 
1052         ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1053                                         pci_resource_len(pdev, 0));
1054         if (!ctrl->hpc_reg) {
1055                 err("cannot remap MMIO region %llx @ %llx\n",
1056                     (unsigned long long)pci_resource_len(pdev, 0),
1057                     (unsigned long long)pci_resource_start(pdev, 0));
1058                 rc = -ENODEV;
1059                 goto err_free_mem_region;
1060         }
1061 
1062         /* Check for 66Mhz operation */
1063         bus->cur_bus_speed = get_controller_speed(ctrl);
1064 
1065 
1066         /********************************************************
1067          *
1068          *              Save configuration headers for this and
1069          *              subordinate PCI buses
1070          *
1071          ********************************************************/
1072 
1073         /* find the physical slot number of the first hot plug slot */
1074 
1075         /* Get slot won't work for devices behind bridges, but
1076          * in this case it will always be called for the "base"
1077          * bus/dev/func of a slot.
1078          * CS: this is leveraging the PCIIRQ routing code from the kernel
1079          * (pci-pc.c: get_irq_routing_table) */
1080         rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1081                                 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1082                                 &(ctrl->first_slot));
1083         dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1084                                 ctrl->first_slot, rc);
1085         if (rc) {
1086                 err(msg_initialization_err, rc);
1087                 goto err_iounmap;
1088         }
1089 
1090         /* Store PCI Config Space for all devices on this bus */
1091         rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1092         if (rc) {
1093                 err("%s: unable to save PCI configuration data, error %d\n",
1094                                 __func__, rc);
1095                 goto err_iounmap;
1096         }
1097 
1098         /*
1099          * Get IO, memory, and IRQ resources for new devices
1100          */
1101         /* The next line is required for cpqhp_find_available_resources */
1102         ctrl->interrupt = pdev->irq;
1103         if (ctrl->interrupt < 0x10) {
1104                 cpqhp_legacy_mode = 1;
1105                 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1106         }
1107 
1108         ctrl->cfgspc_irq = 0;
1109         pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1110 
1111         rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1112         ctrl->add_support = !rc;
1113         if (rc) {
1114                 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1115                 err("unable to locate PCI configuration resources for hot plug add.\n");
1116                 goto err_iounmap;
1117         }
1118 
1119         /*
1120          * Finish setting up the hot plug ctrl device
1121          */
1122         ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1123         dbg("NumSlots %d\n", ctrl->slot_device_offset);
1124 
1125         ctrl->next_event = 0;
1126 
1127         /* Setup the slot information structures */
1128         rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1129         if (rc) {
1130                 err(msg_initialization_err, 6);
1131                 err("%s: unable to save PCI configuration data, error %d\n",
1132                         __func__, rc);
1133                 goto err_iounmap;
1134         }
1135 
1136         /* Mask all general input interrupts */
1137         writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1138 
1139         /* set up the interrupt */
1140         dbg("HPC interrupt = %d\n", ctrl->interrupt);
1141         if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1142                         IRQF_SHARED, MY_NAME, ctrl)) {
1143                 err("Can't get irq %d for the hotplug pci controller\n",
1144                         ctrl->interrupt);
1145                 rc = -ENODEV;
1146                 goto err_iounmap;
1147         }
1148 
1149         /* Enable Shift Out interrupt and clear it, also enable SERR on power
1150          * fault
1151          */
1152         temp_word = readw(ctrl->hpc_reg + MISC);
1153         temp_word |= 0x4006;
1154         writew(temp_word, ctrl->hpc_reg + MISC);
1155 
1156         /* Changed 05/05/97 to clear all interrupts at start */
1157         writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1158 
1159         ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1160 
1161         writel(0x0L, ctrl->hpc_reg + INT_MASK);
1162 
1163         if (!cpqhp_ctrl_list) {
1164                 cpqhp_ctrl_list = ctrl;
1165                 ctrl->next = NULL;
1166         } else {
1167                 ctrl->next = cpqhp_ctrl_list;
1168                 cpqhp_ctrl_list = ctrl;
1169         }
1170 
1171         /* turn off empty slots here unless command line option "ON" set
1172          * Wait for exclusive access to hardware
1173          */
1174         mutex_lock(&ctrl->crit_sect);
1175 
1176         num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1177 
1178         /* find first device number for the ctrl */
1179         device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1180 
1181         while (num_of_slots) {
1182                 dbg("num_of_slots: %d\n", num_of_slots);
1183                 func = cpqhp_slot_find(ctrl->bus, device, 0);
1184                 if (!func)
1185                         break;
1186 
1187                 hp_slot = func->device - ctrl->slot_device_offset;
1188                 dbg("hp_slot: %d\n", hp_slot);
1189 
1190                 /* We have to save the presence info for these slots */
1191                 temp_word = ctrl->ctrl_int_comp >> 16;
1192                 func->presence_save = (temp_word >> hp_slot) & 0x01;
1193                 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1194 
1195                 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1196                         func->switch_save = 0;
1197                 else
1198                         func->switch_save = 0x10;
1199 
1200                 if (!power_mode)
1201                         if (!func->is_a_board) {
1202                                 green_LED_off(ctrl, hp_slot);
1203                                 slot_disable(ctrl, hp_slot);
1204                         }
1205 
1206                 device++;
1207                 num_of_slots--;
1208         }
1209 
1210         if (!power_mode) {
1211                 set_SOGO(ctrl);
1212                 /* Wait for SOBS to be unset */
1213                 wait_for_ctrl_irq(ctrl);
1214         }
1215 
1216         rc = init_SERR(ctrl);
1217         if (rc) {
1218                 err("init_SERR failed\n");
1219                 mutex_unlock(&ctrl->crit_sect);
1220                 goto err_free_irq;
1221         }
1222 
1223         /* Done with exclusive hardware access */
1224         mutex_unlock(&ctrl->crit_sect);
1225 
1226         cpqhp_create_debugfs_files(ctrl);
1227 
1228         return 0;
1229 
1230 err_free_irq:
1231         free_irq(ctrl->interrupt, ctrl);
1232 err_iounmap:
1233         iounmap(ctrl->hpc_reg);
1234 err_free_mem_region:
1235         release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1236 err_free_bus:
1237         kfree(ctrl->pci_bus);
1238 err_free_ctrl:
1239         kfree(ctrl);
1240 err_disable_device:
1241         pci_disable_device(pdev);
1242         return rc;
1243 }
1244 
1245 static void __exit unload_cpqphpd(void)
1246 {
1247         struct pci_func *next;
1248         struct pci_func *TempSlot;
1249         int loop;
1250         u32 rc;
1251         struct controller *ctrl;
1252         struct controller *tctrl;
1253         struct pci_resource *res;
1254         struct pci_resource *tres;
1255 
1256         rc = compaq_nvram_store(cpqhp_rom_start);
1257 
1258         ctrl = cpqhp_ctrl_list;
1259 
1260         while (ctrl) {
1261                 if (ctrl->hpc_reg) {
1262                         u16 misc;
1263                         rc = read_slot_enable(ctrl);
1264 
1265                         writeb(0, ctrl->hpc_reg + SLOT_SERR);
1266                         writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1267 
1268                         misc = readw(ctrl->hpc_reg + MISC);
1269                         misc &= 0xFFFD;
1270                         writew(misc, ctrl->hpc_reg + MISC);
1271                 }
1272 
1273                 ctrl_slot_cleanup(ctrl);
1274 
1275                 res = ctrl->io_head;
1276                 while (res) {
1277                         tres = res;
1278                         res = res->next;
1279                         kfree(tres);
1280                 }
1281 
1282                 res = ctrl->mem_head;
1283                 while (res) {
1284                         tres = res;
1285                         res = res->next;
1286                         kfree(tres);
1287                 }
1288 
1289                 res = ctrl->p_mem_head;
1290                 while (res) {
1291                         tres = res;
1292                         res = res->next;
1293                         kfree(tres);
1294                 }
1295 
1296                 res = ctrl->bus_head;
1297                 while (res) {
1298                         tres = res;
1299                         res = res->next;
1300                         kfree(tres);
1301                 }
1302 
1303                 kfree(ctrl->pci_bus);
1304 
1305                 tctrl = ctrl;
1306                 ctrl = ctrl->next;
1307                 kfree(tctrl);
1308         }
1309 
1310         for (loop = 0; loop < 256; loop++) {
1311                 next = cpqhp_slot_list[loop];
1312                 while (next != NULL) {
1313                         res = next->io_head;
1314                         while (res) {
1315                                 tres = res;
1316                                 res = res->next;
1317                                 kfree(tres);
1318                         }
1319 
1320                         res = next->mem_head;
1321                         while (res) {
1322                                 tres = res;
1323                                 res = res->next;
1324                                 kfree(tres);
1325                         }
1326 
1327                         res = next->p_mem_head;
1328                         while (res) {
1329                                 tres = res;
1330                                 res = res->next;
1331                                 kfree(tres);
1332                         }
1333 
1334                         res = next->bus_head;
1335                         while (res) {
1336                                 tres = res;
1337                                 res = res->next;
1338                                 kfree(tres);
1339                         }
1340 
1341                         TempSlot = next;
1342                         next = next->next;
1343                         kfree(TempSlot);
1344                 }
1345         }
1346 
1347         /* Stop the notification mechanism */
1348         if (initialized)
1349                 cpqhp_event_stop_thread();
1350 
1351         /* unmap the rom address */
1352         if (cpqhp_rom_start)
1353                 iounmap(cpqhp_rom_start);
1354         if (smbios_start)
1355                 iounmap(smbios_start);
1356 }
1357 
1358 static const struct pci_device_id hpcd_pci_tbl[] = {
1359         {
1360         /* handle any PCI Hotplug controller */
1361         .class =        ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1362         .class_mask =   ~0,
1363 
1364         /* no matter who makes it */
1365         .vendor =       PCI_ANY_ID,
1366         .device =       PCI_ANY_ID,
1367         .subvendor =    PCI_ANY_ID,
1368         .subdevice =    PCI_ANY_ID,
1369 
1370         }, { /* end: all zeroes */ }
1371 };
1372 
1373 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1374 
1375 static struct pci_driver cpqhpc_driver = {
1376         .name =         "compaq_pci_hotplug",
1377         .id_table =     hpcd_pci_tbl,
1378         .probe =        cpqhpc_probe,
1379         /* remove:      cpqhpc_remove_one, */
1380 };
1381 
1382 static int __init cpqhpc_init(void)
1383 {
1384         int result;
1385 
1386         cpqhp_debug = debug;
1387 
1388         info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
1389         cpqhp_initialize_debugfs();
1390         result = pci_register_driver(&cpqhpc_driver);
1391         dbg("pci_register_driver = %d\n", result);
1392         return result;
1393 }
1394 
1395 static void __exit cpqhpc_cleanup(void)
1396 {
1397         dbg("unload_cpqphpd()\n");
1398         unload_cpqphpd();
1399 
1400         dbg("pci_unregister_driver\n");
1401         pci_unregister_driver(&cpqhpc_driver);
1402         cpqhp_shutdown_debugfs();
1403 }
1404 
1405 module_init(cpqhpc_init);
1406 module_exit(cpqhpc_cleanup);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/pci/hotplug/cpqphp_core.c

DEFINITIONS
