drivers/tty/rocket.c

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This source file includes following definitions.
rocket_paranoia_check
rp_do_receive
rp_do_transmit
rp_handle_port
rp_do_poll
init_r_port
configure_r_port
carrier_raised
dtr_rts
rp_open
rp_close
rp_set_termios
rp_break
sGetChanRI
rp_tiocmget
rp_tiocmset
get_config
set_config
get_ports
reset_rm2
get_version
rp_ioctl
rp_send_xchar
rp_throttle
rp_unthrottle
rp_stop
rp_start
rp_wait_until_sent
rp_hangup
rp_put_char
rp_write
rp_write_room
rp_chars_in_buffer
rp_flush_buffer
rmSpeakerReset
sPCIInitController
register_PCI
init_PCI
init_ISA
rp_init
rp_cleanup_module
sInitController
sReadAiopID
sReadAiopNumChan
sInitChan
sStopRxProcessor
sFlushRxFIFO
sFlushTxFIFO
sWriteTxPrioByte
sEnInterrupts
sDisInterrupts
sSetInterfaceMode
sModemReset
sPCIModemReset
GetLineNumber
SetLineNumber
   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * RocketPort device driver for Linux
   4  *
   5  * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
   6  * 
   7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
   8  */
   9 
  10 /*
  11  * Kernel Synchronization:
  12  *
  13  * This driver has 2 kernel control paths - exception handlers (calls into the driver
  14  * from user mode) and the timer bottom half (tasklet).  This is a polled driver, interrupts
  15  * are not used.
  16  *
  17  * Critical data: 
  18  * -  rp_table[], accessed through passed "info" pointers, is a global (static) array of 
  19  *    serial port state information and the xmit_buf circular buffer.  Protected by 
  20  *    a per port spinlock.
  21  * -  xmit_flags[], an array of ints indexed by line (port) number, indicating that there
  22  *    is data to be transmitted.  Protected by atomic bit operations.
  23  * -  rp_num_ports, int indicating number of open ports, protected by atomic operations.
  24  * 
  25  * rp_write() and rp_write_char() functions use a per port semaphore to protect against
  26  * simultaneous access to the same port by more than one process.
  27  */
  28 
  29 /****** Defines ******/
  30 #define ROCKET_PARANOIA_CHECK
  31 #define ROCKET_DISABLE_SIMUSAGE
  32 
  33 #undef ROCKET_SOFT_FLOW
  34 #undef ROCKET_DEBUG_OPEN
  35 #undef ROCKET_DEBUG_INTR
  36 #undef ROCKET_DEBUG_WRITE
  37 #undef ROCKET_DEBUG_FLOW
  38 #undef ROCKET_DEBUG_THROTTLE
  39 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
  40 #undef ROCKET_DEBUG_RECEIVE
  41 #undef ROCKET_DEBUG_HANGUP
  42 #undef REV_PCI_ORDER
  43 #undef ROCKET_DEBUG_IO
  44 
  45 #define POLL_PERIOD (HZ/100)    /*  Polling period .01 seconds (10ms) */
  46 
  47 /****** Kernel includes ******/
  48 
  49 #include <linux/module.h>
  50 #include <linux/errno.h>
  51 #include <linux/major.h>
  52 #include <linux/kernel.h>
  53 #include <linux/signal.h>
  54 #include <linux/slab.h>
  55 #include <linux/mm.h>
  56 #include <linux/sched.h>
  57 #include <linux/timer.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/tty.h>
  60 #include <linux/tty_driver.h>
  61 #include <linux/tty_flip.h>
  62 #include <linux/serial.h>
  63 #include <linux/string.h>
  64 #include <linux/fcntl.h>
  65 #include <linux/ptrace.h>
  66 #include <linux/mutex.h>
  67 #include <linux/ioport.h>
  68 #include <linux/delay.h>
  69 #include <linux/completion.h>
  70 #include <linux/wait.h>
  71 #include <linux/pci.h>
  72 #include <linux/uaccess.h>
  73 #include <linux/atomic.h>
  74 #include <asm/unaligned.h>
  75 #include <linux/bitops.h>
  76 #include <linux/spinlock.h>
  77 #include <linux/init.h>
  78 
  79 /****** RocketPort includes ******/
  80 
  81 #include "rocket_int.h"
  82 #include "rocket.h"
  83 
  84 #define ROCKET_VERSION "2.09"
  85 #define ROCKET_DATE "12-June-2003"
  86 
  87 /****** RocketPort Local Variables ******/
  88 
  89 static void rp_do_poll(struct timer_list *unused);
  90 
  91 static struct tty_driver *rocket_driver;
  92 
  93 static struct rocket_version driver_version = { 
  94         ROCKET_VERSION, ROCKET_DATE
  95 };
  96 
  97 static struct r_port *rp_table[MAX_RP_PORTS];          /*  The main repository of serial port state information. */
  98 static unsigned int xmit_flags[NUM_BOARDS];            /*  Bit significant, indicates port had data to transmit. */
  99                                                        /*  eg.  Bit 0 indicates port 0 has xmit data, ...        */
 100 static atomic_t rp_num_ports_open;                     /*  Number of serial ports open                           */
 101 static DEFINE_TIMER(rocket_timer, rp_do_poll);
 102 
 103 static unsigned long board1;                           /* ISA addresses, retrieved from rocketport.conf          */
 104 static unsigned long board2;
 105 static unsigned long board3;
 106 static unsigned long board4;
 107 static unsigned long controller;
 108 static bool support_low_speed;
 109 static unsigned long modem1;
 110 static unsigned long modem2;
 111 static unsigned long modem3;
 112 static unsigned long modem4;
 113 static unsigned long pc104_1[8];
 114 static unsigned long pc104_2[8];
 115 static unsigned long pc104_3[8];
 116 static unsigned long pc104_4[8];
 117 static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 };
 118 
 119 static int rp_baud_base[NUM_BOARDS];                   /*  Board config info (Someday make a per-board structure)  */
 120 static unsigned long rcktpt_io_addr[NUM_BOARDS];
 121 static int rcktpt_type[NUM_BOARDS];
 122 static int is_PCI[NUM_BOARDS];
 123 static rocketModel_t rocketModel[NUM_BOARDS];
 124 static int max_board;
 125 static const struct tty_port_operations rocket_port_ops;
 126 
 127 /*
 128  * The following arrays define the interrupt bits corresponding to each AIOP.
 129  * These bits are different between the ISA and regular PCI boards and the
 130  * Universal PCI boards.
 131  */
 132 
 133 static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
 134         AIOP_INTR_BIT_0,
 135         AIOP_INTR_BIT_1,
 136         AIOP_INTR_BIT_2,
 137         AIOP_INTR_BIT_3
 138 };
 139 
 140 #ifdef CONFIG_PCI
 141 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
 142         UPCI_AIOP_INTR_BIT_0,
 143         UPCI_AIOP_INTR_BIT_1,
 144         UPCI_AIOP_INTR_BIT_2,
 145         UPCI_AIOP_INTR_BIT_3
 146 };
 147 #endif
 148 
 149 static Byte_t RData[RDATASIZE] = {
 150         0x00, 0x09, 0xf6, 0x82,
 151         0x02, 0x09, 0x86, 0xfb,
 152         0x04, 0x09, 0x00, 0x0a,
 153         0x06, 0x09, 0x01, 0x0a,
 154         0x08, 0x09, 0x8a, 0x13,
 155         0x0a, 0x09, 0xc5, 0x11,
 156         0x0c, 0x09, 0x86, 0x85,
 157         0x0e, 0x09, 0x20, 0x0a,
 158         0x10, 0x09, 0x21, 0x0a,
 159         0x12, 0x09, 0x41, 0xff,
 160         0x14, 0x09, 0x82, 0x00,
 161         0x16, 0x09, 0x82, 0x7b,
 162         0x18, 0x09, 0x8a, 0x7d,
 163         0x1a, 0x09, 0x88, 0x81,
 164         0x1c, 0x09, 0x86, 0x7a,
 165         0x1e, 0x09, 0x84, 0x81,
 166         0x20, 0x09, 0x82, 0x7c,
 167         0x22, 0x09, 0x0a, 0x0a
 168 };
 169 
 170 static Byte_t RRegData[RREGDATASIZE] = {
 171         0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
 172         0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
 173         0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
 174         0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
 175         0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
 176         0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
 177         0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
 178         0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
 179         0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
 180         0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
 181         0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
 182         0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
 183         0x22, 0x09, 0x0a, 0x0a  /* 30: Rx FIFO Enable */
 184 };
 185 
 186 static CONTROLLER_T sController[CTL_SIZE] = {
 187         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 188          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 189         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 190          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 191         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 192          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 193         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 194          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
 195 };
 196 
 197 static Byte_t sBitMapClrTbl[8] = {
 198         0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
 199 };
 200 
 201 static Byte_t sBitMapSetTbl[8] = {
 202         0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
 203 };
 204 
 205 static int sClockPrescale = 0x14;
 206 
 207 /*
 208  *  Line number is the ttySIx number (x), the Minor number.  We 
 209  *  assign them sequentially, starting at zero.  The following 
 210  *  array keeps track of the line number assigned to a given board/aiop/channel.
 211  */
 212 static unsigned char lineNumbers[MAX_RP_PORTS];
 213 static unsigned long nextLineNumber;
 214 
 215 /*****  RocketPort Static Prototypes   *********/
 216 static int __init init_ISA(int i);
 217 static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
 218 static void rp_flush_buffer(struct tty_struct *tty);
 219 static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
 220 static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
 221 static void rp_start(struct tty_struct *tty);
 222 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
 223                      int ChanNum);
 224 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode);
 225 static void sFlushRxFIFO(CHANNEL_T * ChP);
 226 static void sFlushTxFIFO(CHANNEL_T * ChP);
 227 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags);
 228 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags);
 229 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
 230 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
 231 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
 232 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
 233                            ByteIO_t * AiopIOList, int AiopIOListSize,
 234                            int IRQNum, Byte_t Frequency, int PeriodicOnly);
 235 static int sReadAiopID(ByteIO_t io);
 236 static int sReadAiopNumChan(WordIO_t io);
 237 
 238 MODULE_AUTHOR("Theodore Ts'o");
 239 MODULE_DESCRIPTION("Comtrol RocketPort driver");
 240 module_param_hw(board1, ulong, ioport, 0);
 241 MODULE_PARM_DESC(board1, "I/O port for (ISA) board #1");
 242 module_param_hw(board2, ulong, ioport, 0);
 243 MODULE_PARM_DESC(board2, "I/O port for (ISA) board #2");
 244 module_param_hw(board3, ulong, ioport, 0);
 245 MODULE_PARM_DESC(board3, "I/O port for (ISA) board #3");
 246 module_param_hw(board4, ulong, ioport, 0);
 247 MODULE_PARM_DESC(board4, "I/O port for (ISA) board #4");
 248 module_param_hw(controller, ulong, ioport, 0);
 249 MODULE_PARM_DESC(controller, "I/O port for (ISA) rocketport controller");
 250 module_param(support_low_speed, bool, 0);
 251 MODULE_PARM_DESC(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud");
 252 module_param(modem1, ulong, 0);
 253 MODULE_PARM_DESC(modem1, "1 means (ISA) board #1 is a RocketModem");
 254 module_param(modem2, ulong, 0);
 255 MODULE_PARM_DESC(modem2, "1 means (ISA) board #2 is a RocketModem");
 256 module_param(modem3, ulong, 0);
 257 MODULE_PARM_DESC(modem3, "1 means (ISA) board #3 is a RocketModem");
 258 module_param(modem4, ulong, 0);
 259 MODULE_PARM_DESC(modem4, "1 means (ISA) board #4 is a RocketModem");
 260 module_param_array(pc104_1, ulong, NULL, 0);
 261 MODULE_PARM_DESC(pc104_1, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
 262 module_param_array(pc104_2, ulong, NULL, 0);
 263 MODULE_PARM_DESC(pc104_2, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
 264 module_param_array(pc104_3, ulong, NULL, 0);
 265 MODULE_PARM_DESC(pc104_3, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
 266 module_param_array(pc104_4, ulong, NULL, 0);
 267 MODULE_PARM_DESC(pc104_4, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
 268 
 269 static int __init rp_init(void);
 270 static void rp_cleanup_module(void);
 271 
 272 module_init(rp_init);
 273 module_exit(rp_cleanup_module);
 274 
 275 
 276 MODULE_LICENSE("Dual BSD/GPL");
 277 
 278 /*************************************************************************/
 279 /*                     Module code starts here                           */
 280 
 281 static inline int rocket_paranoia_check(struct r_port *info,
 282                                         const char *routine)
 283 {
 284 #ifdef ROCKET_PARANOIA_CHECK
 285         if (!info)
 286                 return 1;
 287         if (info->magic != RPORT_MAGIC) {
 288                 printk(KERN_WARNING "Warning: bad magic number for rocketport "
 289                                 "struct in %s\n", routine);
 290                 return 1;
 291         }
 292 #endif
 293         return 0;
 294 }
 295 
 296 
 297 /*  Serial port receive data function.  Called (from timer poll) when an AIOPIC signals 
 298  *  that receive data is present on a serial port.  Pulls data from FIFO, moves it into the 
 299  *  tty layer.  
 300  */
 301 static void rp_do_receive(struct r_port *info, CHANNEL_t *cp,
 302                 unsigned int ChanStatus)
 303 {
 304         unsigned int CharNStat;
 305         int ToRecv, wRecv, space;
 306         unsigned char *cbuf;
 307 
 308         ToRecv = sGetRxCnt(cp);
 309 #ifdef ROCKET_DEBUG_INTR
 310         printk(KERN_INFO "rp_do_receive(%d)...\n", ToRecv);
 311 #endif
 312         if (ToRecv == 0)
 313                 return;
 314 
 315         /*
 316          * if status indicates there are errored characters in the
 317          * FIFO, then enter status mode (a word in FIFO holds
 318          * character and status).
 319          */
 320         if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
 321                 if (!(ChanStatus & STATMODE)) {
 322 #ifdef ROCKET_DEBUG_RECEIVE
 323                         printk(KERN_INFO "Entering STATMODE...\n");
 324 #endif
 325                         ChanStatus |= STATMODE;
 326                         sEnRxStatusMode(cp);
 327                 }
 328         }
 329 
 330         /* 
 331          * if we previously entered status mode, then read down the
 332          * FIFO one word at a time, pulling apart the character and
 333          * the status.  Update error counters depending on status
 334          */
 335         if (ChanStatus & STATMODE) {
 336 #ifdef ROCKET_DEBUG_RECEIVE
 337                 printk(KERN_INFO "Ignore %x, read %x...\n",
 338                         info->ignore_status_mask, info->read_status_mask);
 339 #endif
 340                 while (ToRecv) {
 341                         char flag;
 342 
 343                         CharNStat = sInW(sGetTxRxDataIO(cp));
 344 #ifdef ROCKET_DEBUG_RECEIVE
 345                         printk(KERN_INFO "%x...\n", CharNStat);
 346 #endif
 347                         if (CharNStat & STMBREAKH)
 348                                 CharNStat &= ~(STMFRAMEH | STMPARITYH);
 349                         if (CharNStat & info->ignore_status_mask) {
 350                                 ToRecv--;
 351                                 continue;
 352                         }
 353                         CharNStat &= info->read_status_mask;
 354                         if (CharNStat & STMBREAKH)
 355                                 flag = TTY_BREAK;
 356                         else if (CharNStat & STMPARITYH)
 357                                 flag = TTY_PARITY;
 358                         else if (CharNStat & STMFRAMEH)
 359                                 flag = TTY_FRAME;
 360                         else if (CharNStat & STMRCVROVRH)
 361                                 flag = TTY_OVERRUN;
 362                         else
 363                                 flag = TTY_NORMAL;
 364                         tty_insert_flip_char(&info->port, CharNStat & 0xff,
 365                                         flag);
 366                         ToRecv--;
 367                 }
 368 
 369                 /*
 370                  * after we've emptied the FIFO in status mode, turn
 371                  * status mode back off
 372                  */
 373                 if (sGetRxCnt(cp) == 0) {
 374 #ifdef ROCKET_DEBUG_RECEIVE
 375                         printk(KERN_INFO "Status mode off.\n");
 376 #endif
 377                         sDisRxStatusMode(cp);
 378                 }
 379         } else {
 380                 /*
 381                  * we aren't in status mode, so read down the FIFO two
 382                  * characters at time by doing repeated word IO
 383                  * transfer.
 384                  */
 385                 space = tty_prepare_flip_string(&info->port, &cbuf, ToRecv);
 386                 if (space < ToRecv) {
 387 #ifdef ROCKET_DEBUG_RECEIVE
 388                         printk(KERN_INFO "rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv, space);
 389 #endif
 390                         if (space <= 0)
 391                                 return;
 392                         ToRecv = space;
 393                 }
 394                 wRecv = ToRecv >> 1;
 395                 if (wRecv)
 396                         sInStrW(sGetTxRxDataIO(cp), (unsigned short *) cbuf, wRecv);
 397                 if (ToRecv & 1)
 398                         cbuf[ToRecv - 1] = sInB(sGetTxRxDataIO(cp));
 399         }
 400         /*  Push the data up to the tty layer */
 401         tty_flip_buffer_push(&info->port);
 402 }
 403 
 404 /*
 405  *  Serial port transmit data function.  Called from the timer polling loop as a 
 406  *  result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
 407  *  to be sent out the serial port.  Data is buffered in rp_table[line].xmit_buf, it is 
 408  *  moved to the port's xmit FIFO.  *info is critical data, protected by spinlocks.
 409  */
 410 static void rp_do_transmit(struct r_port *info)
 411 {
 412         int c;
 413         CHANNEL_t *cp = &info->channel;
 414         struct tty_struct *tty;
 415         unsigned long flags;
 416 
 417 #ifdef ROCKET_DEBUG_INTR
 418         printk(KERN_DEBUG "%s\n", __func__);
 419 #endif
 420         if (!info)
 421                 return;
 422         tty = tty_port_tty_get(&info->port);
 423 
 424         if (tty == NULL) {
 425                 printk(KERN_WARNING "rp: WARNING %s called with tty==NULL\n", __func__);
 426                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 427                 return;
 428         }
 429 
 430         spin_lock_irqsave(&info->slock, flags);
 431         info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
 432 
 433         /*  Loop sending data to FIFO until done or FIFO full */
 434         while (1) {
 435                 if (tty->stopped)
 436                         break;
 437                 c = min(info->xmit_fifo_room, info->xmit_cnt);
 438                 c = min(c, XMIT_BUF_SIZE - info->xmit_tail);
 439                 if (c <= 0 || info->xmit_fifo_room <= 0)
 440                         break;
 441                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2);
 442                 if (c & 1)
 443                         sOutB(sGetTxRxDataIO(cp), info->xmit_buf[info->xmit_tail + c - 1]);
 444                 info->xmit_tail += c;
 445                 info->xmit_tail &= XMIT_BUF_SIZE - 1;
 446                 info->xmit_cnt -= c;
 447                 info->xmit_fifo_room -= c;
 448 #ifdef ROCKET_DEBUG_INTR
 449                 printk(KERN_INFO "tx %d chars...\n", c);
 450 #endif
 451         }
 452 
 453         if (info->xmit_cnt == 0)
 454                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 455 
 456         if (info->xmit_cnt < WAKEUP_CHARS) {
 457                 tty_wakeup(tty);
 458 #ifdef ROCKETPORT_HAVE_POLL_WAIT
 459                 wake_up_interruptible(&tty->poll_wait);
 460 #endif
 461         }
 462 
 463         spin_unlock_irqrestore(&info->slock, flags);
 464         tty_kref_put(tty);
 465 
 466 #ifdef ROCKET_DEBUG_INTR
 467         printk(KERN_DEBUG "(%d,%d,%d,%d)...\n", info->xmit_cnt, info->xmit_head,
 468                info->xmit_tail, info->xmit_fifo_room);
 469 #endif
 470 }
 471 
 472 /*
 473  *  Called when a serial port signals it has read data in it's RX FIFO.
 474  *  It checks what interrupts are pending and services them, including
 475  *  receiving serial data.  
 476  */
 477 static void rp_handle_port(struct r_port *info)
 478 {
 479         CHANNEL_t *cp;
 480         unsigned int IntMask, ChanStatus;
 481 
 482         if (!info)
 483                 return;
 484 
 485         if (!tty_port_initialized(&info->port)) {
 486                 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
 487                                 "info->flags & NOT_INIT\n");
 488                 return;
 489         }
 490 
 491         cp = &info->channel;
 492 
 493         IntMask = sGetChanIntID(cp) & info->intmask;
 494 #ifdef ROCKET_DEBUG_INTR
 495         printk(KERN_INFO "rp_interrupt %02x...\n", IntMask);
 496 #endif
 497         ChanStatus = sGetChanStatus(cp);
 498         if (IntMask & RXF_TRIG) {       /* Rx FIFO trigger level */
 499                 rp_do_receive(info, cp, ChanStatus);
 500         }
 501         if (IntMask & DELTA_CD) {       /* CD change  */
 502 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
 503                 printk(KERN_INFO "ttyR%d CD now %s...\n", info->line,
 504                        (ChanStatus & CD_ACT) ? "on" : "off");
 505 #endif
 506                 if (!(ChanStatus & CD_ACT) && info->cd_status) {
 507 #ifdef ROCKET_DEBUG_HANGUP
 508                         printk(KERN_INFO "CD drop, calling hangup.\n");
 509 #endif
 510                         tty_port_tty_hangup(&info->port, false);
 511                 }
 512                 info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
 513                 wake_up_interruptible(&info->port.open_wait);
 514         }
 515 #ifdef ROCKET_DEBUG_INTR
 516         if (IntMask & DELTA_CTS) {      /* CTS change */
 517                 printk(KERN_INFO "CTS change...\n");
 518         }
 519         if (IntMask & DELTA_DSR) {      /* DSR change */
 520                 printk(KERN_INFO "DSR change...\n");
 521         }
 522 #endif
 523 }
 524 
 525 /*
 526  *  The top level polling routine.  Repeats every 1/100 HZ (10ms).
 527  */
 528 static void rp_do_poll(struct timer_list *unused)
 529 {
 530         CONTROLLER_t *ctlp;
 531         int ctrl, aiop, ch, line;
 532         unsigned int xmitmask, i;
 533         unsigned int CtlMask;
 534         unsigned char AiopMask;
 535         Word_t bit;
 536 
 537         /*  Walk through all the boards (ctrl's) */
 538         for (ctrl = 0; ctrl < max_board; ctrl++) {
 539                 if (rcktpt_io_addr[ctrl] <= 0)
 540                         continue;
 541 
 542                 /*  Get a ptr to the board's control struct */
 543                 ctlp = sCtlNumToCtlPtr(ctrl);
 544 
 545                 /*  Get the interrupt status from the board */
 546 #ifdef CONFIG_PCI
 547                 if (ctlp->BusType == isPCI)
 548                         CtlMask = sPCIGetControllerIntStatus(ctlp);
 549                 else
 550 #endif
 551                         CtlMask = sGetControllerIntStatus(ctlp);
 552 
 553                 /*  Check if any AIOP read bits are set */
 554                 for (aiop = 0; CtlMask; aiop++) {
 555                         bit = ctlp->AiopIntrBits[aiop];
 556                         if (CtlMask & bit) {
 557                                 CtlMask &= ~bit;
 558                                 AiopMask = sGetAiopIntStatus(ctlp, aiop);
 559 
 560                                 /*  Check if any port read bits are set */
 561                                 for (ch = 0; AiopMask;  AiopMask >>= 1, ch++) {
 562                                         if (AiopMask & 1) {
 563 
 564                                                 /*  Get the line number (/dev/ttyRx number). */
 565                                                 /*  Read the data from the port. */
 566                                                 line = GetLineNumber(ctrl, aiop, ch);
 567                                                 rp_handle_port(rp_table[line]);
 568                                         }
 569                                 }
 570                         }
 571                 }
 572 
 573                 xmitmask = xmit_flags[ctrl];
 574 
 575                 /*
 576                  *  xmit_flags contains bit-significant flags, indicating there is data
 577                  *  to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port 
 578                  *  1, ... (32 total possible).  The variable i has the aiop and ch 
 579                  *  numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
 580                  */
 581                 if (xmitmask) {
 582                         for (i = 0; i < rocketModel[ctrl].numPorts; i++) {
 583                                 if (xmitmask & (1 << i)) {
 584                                         aiop = (i & 0x18) >> 3;
 585                                         ch = i & 0x07;
 586                                         line = GetLineNumber(ctrl, aiop, ch);
 587                                         rp_do_transmit(rp_table[line]);
 588                                 }
 589                         }
 590                 }
 591         }
 592 
 593         /*
 594          * Reset the timer so we get called at the next clock tick (10ms).
 595          */
 596         if (atomic_read(&rp_num_ports_open))
 597                 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 598 }
 599 
 600 /*
 601  *  Initializes the r_port structure for a port, as well as enabling the port on 
 602  *  the board.  
 603  *  Inputs:  board, aiop, chan numbers
 604  */
 605 static void __init
 606 init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
 607 {
 608         unsigned rocketMode;
 609         struct r_port *info;
 610         int line;
 611         CONTROLLER_T *ctlp;
 612 
 613         /*  Get the next available line number */
 614         line = SetLineNumber(board, aiop, chan);
 615 
 616         ctlp = sCtlNumToCtlPtr(board);
 617 
 618         /*  Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
 619         info = kzalloc(sizeof (struct r_port), GFP_KERNEL);
 620         if (!info) {
 621                 printk(KERN_ERR "Couldn't allocate info struct for line #%d\n",
 622                                 line);
 623                 return;
 624         }
 625 
 626         info->magic = RPORT_MAGIC;
 627         info->line = line;
 628         info->ctlp = ctlp;
 629         info->board = board;
 630         info->aiop = aiop;
 631         info->chan = chan;
 632         tty_port_init(&info->port);
 633         info->port.ops = &rocket_port_ops;
 634         info->flags &= ~ROCKET_MODE_MASK;
 635         if (board < ARRAY_SIZE(pc104) && line < ARRAY_SIZE(pc104_1))
 636                 switch (pc104[board][line]) {
 637                 case 422:
 638                         info->flags |= ROCKET_MODE_RS422;
 639                         break;
 640                 case 485:
 641                         info->flags |= ROCKET_MODE_RS485;
 642                         break;
 643                 case 232:
 644                 default:
 645                         info->flags |= ROCKET_MODE_RS232;
 646                         break;
 647                 }
 648         else
 649                 info->flags |= ROCKET_MODE_RS232;
 650 
 651         info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR;
 652         if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
 653                 printk(KERN_ERR "RocketPort sInitChan(%d, %d, %d) failed!\n",
 654                                 board, aiop, chan);
 655                 tty_port_destroy(&info->port);
 656                 kfree(info);
 657                 return;
 658         }
 659 
 660         rocketMode = info->flags & ROCKET_MODE_MASK;
 661 
 662         if ((info->flags & ROCKET_RTS_TOGGLE) || (rocketMode == ROCKET_MODE_RS485))
 663                 sEnRTSToggle(&info->channel);
 664         else
 665                 sDisRTSToggle(&info->channel);
 666 
 667         if (ctlp->boardType == ROCKET_TYPE_PC104) {
 668                 switch (rocketMode) {
 669                 case ROCKET_MODE_RS485:
 670                         sSetInterfaceMode(&info->channel, InterfaceModeRS485);
 671                         break;
 672                 case ROCKET_MODE_RS422:
 673                         sSetInterfaceMode(&info->channel, InterfaceModeRS422);
 674                         break;
 675                 case ROCKET_MODE_RS232:
 676                 default:
 677                         if (info->flags & ROCKET_RTS_TOGGLE)
 678                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232T);
 679                         else
 680                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232);
 681                         break;
 682                 }
 683         }
 684         spin_lock_init(&info->slock);
 685         mutex_init(&info->write_mtx);
 686         rp_table[line] = info;
 687         tty_port_register_device(&info->port, rocket_driver, line,
 688                         pci_dev ? &pci_dev->dev : NULL);
 689 }
 690 
 691 /*
 692  *  Configures a rocketport port according to its termio settings.  Called from 
 693  *  user mode into the driver (exception handler).  *info CD manipulation is spinlock protected.
 694  */
 695 static void configure_r_port(struct tty_struct *tty, struct r_port *info,
 696                              struct ktermios *old_termios)
 697 {
 698         unsigned cflag;
 699         unsigned long flags;
 700         unsigned rocketMode;
 701         int bits, baud, divisor;
 702         CHANNEL_t *cp;
 703         struct ktermios *t = &tty->termios;
 704 
 705         cp = &info->channel;
 706         cflag = t->c_cflag;
 707 
 708         /* Byte size and parity */
 709         if ((cflag & CSIZE) == CS8) {
 710                 sSetData8(cp);
 711                 bits = 10;
 712         } else {
 713                 sSetData7(cp);
 714                 bits = 9;
 715         }
 716         if (cflag & CSTOPB) {
 717                 sSetStop2(cp);
 718                 bits++;
 719         } else {
 720                 sSetStop1(cp);
 721         }
 722 
 723         if (cflag & PARENB) {
 724                 sEnParity(cp);
 725                 bits++;
 726                 if (cflag & PARODD) {
 727                         sSetOddParity(cp);
 728                 } else {
 729                         sSetEvenParity(cp);
 730                 }
 731         } else {
 732                 sDisParity(cp);
 733         }
 734 
 735         /* baud rate */
 736         baud = tty_get_baud_rate(tty);
 737         if (!baud)
 738                 baud = 9600;
 739         divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
 740         if ((divisor >= 8192 || divisor < 0) && old_termios) {
 741                 baud = tty_termios_baud_rate(old_termios);
 742                 if (!baud)
 743                         baud = 9600;
 744                 divisor = (rp_baud_base[info->board] / baud) - 1;
 745         }
 746         if (divisor >= 8192 || divisor < 0) {
 747                 baud = 9600;
 748                 divisor = (rp_baud_base[info->board] / baud) - 1;
 749         }
 750         info->cps = baud / bits;
 751         sSetBaud(cp, divisor);
 752 
 753         /* FIXME: Should really back compute a baud rate from the divisor */
 754         tty_encode_baud_rate(tty, baud, baud);
 755 
 756         if (cflag & CRTSCTS) {
 757                 info->intmask |= DELTA_CTS;
 758                 sEnCTSFlowCtl(cp);
 759         } else {
 760                 info->intmask &= ~DELTA_CTS;
 761                 sDisCTSFlowCtl(cp);
 762         }
 763         if (cflag & CLOCAL) {
 764                 info->intmask &= ~DELTA_CD;
 765         } else {
 766                 spin_lock_irqsave(&info->slock, flags);
 767                 if (sGetChanStatus(cp) & CD_ACT)
 768                         info->cd_status = 1;
 769                 else
 770                         info->cd_status = 0;
 771                 info->intmask |= DELTA_CD;
 772                 spin_unlock_irqrestore(&info->slock, flags);
 773         }
 774 
 775         /*
 776          * Handle software flow control in the board
 777          */
 778 #ifdef ROCKET_SOFT_FLOW
 779         if (I_IXON(tty)) {
 780                 sEnTxSoftFlowCtl(cp);
 781                 if (I_IXANY(tty)) {
 782                         sEnIXANY(cp);
 783                 } else {
 784                         sDisIXANY(cp);
 785                 }
 786                 sSetTxXONChar(cp, START_CHAR(tty));
 787                 sSetTxXOFFChar(cp, STOP_CHAR(tty));
 788         } else {
 789                 sDisTxSoftFlowCtl(cp);
 790                 sDisIXANY(cp);
 791                 sClrTxXOFF(cp);
 792         }
 793 #endif
 794 
 795         /*
 796          * Set up ignore/read mask words
 797          */
 798         info->read_status_mask = STMRCVROVRH | 0xFF;
 799         if (I_INPCK(tty))
 800                 info->read_status_mask |= STMFRAMEH | STMPARITYH;
 801         if (I_BRKINT(tty) || I_PARMRK(tty))
 802                 info->read_status_mask |= STMBREAKH;
 803 
 804         /*
 805          * Characters to ignore
 806          */
 807         info->ignore_status_mask = 0;
 808         if (I_IGNPAR(tty))
 809                 info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
 810         if (I_IGNBRK(tty)) {
 811                 info->ignore_status_mask |= STMBREAKH;
 812                 /*
 813                  * If we're ignoring parity and break indicators,
 814                  * ignore overruns too.  (For real raw support).
 815                  */
 816                 if (I_IGNPAR(tty))
 817                         info->ignore_status_mask |= STMRCVROVRH;
 818         }
 819 
 820         rocketMode = info->flags & ROCKET_MODE_MASK;
 821 
 822         if ((info->flags & ROCKET_RTS_TOGGLE)
 823             || (rocketMode == ROCKET_MODE_RS485))
 824                 sEnRTSToggle(cp);
 825         else
 826                 sDisRTSToggle(cp);
 827 
 828         sSetRTS(&info->channel);
 829 
 830         if (cp->CtlP->boardType == ROCKET_TYPE_PC104) {
 831                 switch (rocketMode) {
 832                 case ROCKET_MODE_RS485:
 833                         sSetInterfaceMode(cp, InterfaceModeRS485);
 834                         break;
 835                 case ROCKET_MODE_RS422:
 836                         sSetInterfaceMode(cp, InterfaceModeRS422);
 837                         break;
 838                 case ROCKET_MODE_RS232:
 839                 default:
 840                         if (info->flags & ROCKET_RTS_TOGGLE)
 841                                 sSetInterfaceMode(cp, InterfaceModeRS232T);
 842                         else
 843                                 sSetInterfaceMode(cp, InterfaceModeRS232);
 844                         break;
 845                 }
 846         }
 847 }
 848 
 849 static int carrier_raised(struct tty_port *port)
 850 {
 851         struct r_port *info = container_of(port, struct r_port, port);
 852         return (sGetChanStatusLo(&info->channel) & CD_ACT) ? 1 : 0;
 853 }
 854 
 855 static void dtr_rts(struct tty_port *port, int on)
 856 {
 857         struct r_port *info = container_of(port, struct r_port, port);
 858         if (on) {
 859                 sSetDTR(&info->channel);
 860                 sSetRTS(&info->channel);
 861         } else {
 862                 sClrDTR(&info->channel);
 863                 sClrRTS(&info->channel);
 864         }
 865 }
 866 
 867 /*
 868  *  Exception handler that opens a serial port.  Creates xmit_buf storage, fills in 
 869  *  port's r_port struct.  Initializes the port hardware.  
 870  */
 871 static int rp_open(struct tty_struct *tty, struct file *filp)
 872 {
 873         struct r_port *info;
 874         struct tty_port *port;
 875         int retval;
 876         CHANNEL_t *cp;
 877         unsigned long page;
 878 
 879         info = rp_table[tty->index];
 880         if (info == NULL)
 881                 return -ENXIO;
 882         port = &info->port;
 883         
 884         page = __get_free_page(GFP_KERNEL);
 885         if (!page)
 886                 return -ENOMEM;
 887 
 888         /*
 889          * We must not sleep from here until the port is marked fully in use.
 890          */
 891         if (info->xmit_buf)
 892                 free_page(page);
 893         else
 894                 info->xmit_buf = (unsigned char *) page;
 895 
 896         tty->driver_data = info;
 897         tty_port_tty_set(port, tty);
 898 
 899         if (port->count++ == 0) {
 900                 atomic_inc(&rp_num_ports_open);
 901 
 902 #ifdef ROCKET_DEBUG_OPEN
 903                 printk(KERN_INFO "rocket mod++ = %d...\n",
 904                                 atomic_read(&rp_num_ports_open));
 905 #endif
 906         }
 907 #ifdef ROCKET_DEBUG_OPEN
 908         printk(KERN_INFO "rp_open ttyR%d, count=%d\n", info->line, info->port.count);
 909 #endif
 910 
 911         /*
 912          * Info->count is now 1; so it's safe to sleep now.
 913          */
 914         if (!tty_port_initialized(port)) {
 915                 cp = &info->channel;
 916                 sSetRxTrigger(cp, TRIG_1);
 917                 if (sGetChanStatus(cp) & CD_ACT)
 918                         info->cd_status = 1;
 919                 else
 920                         info->cd_status = 0;
 921                 sDisRxStatusMode(cp);
 922                 sFlushRxFIFO(cp);
 923                 sFlushTxFIFO(cp);
 924 
 925                 sEnInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 926                 sSetRxTrigger(cp, TRIG_1);
 927 
 928                 sGetChanStatus(cp);
 929                 sDisRxStatusMode(cp);
 930                 sClrTxXOFF(cp);
 931 
 932                 sDisCTSFlowCtl(cp);
 933                 sDisTxSoftFlowCtl(cp);
 934 
 935                 sEnRxFIFO(cp);
 936                 sEnTransmit(cp);
 937 
 938                 tty_port_set_initialized(&info->port, 1);
 939 
 940                 configure_r_port(tty, info, NULL);
 941                 if (C_BAUD(tty)) {
 942                         sSetDTR(cp);
 943                         sSetRTS(cp);
 944                 }
 945         }
 946         /*  Starts (or resets) the maint polling loop */
 947         mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 948 
 949         retval = tty_port_block_til_ready(port, tty, filp);
 950         if (retval) {
 951 #ifdef ROCKET_DEBUG_OPEN
 952                 printk(KERN_INFO "rp_open returning after block_til_ready with %d\n", retval);
 953 #endif
 954                 return retval;
 955         }
 956         return 0;
 957 }
 958 
 959 /*
 960  *  Exception handler that closes a serial port. info->port.count is considered critical.
 961  */
 962 static void rp_close(struct tty_struct *tty, struct file *filp)
 963 {
 964         struct r_port *info = tty->driver_data;
 965         struct tty_port *port = &info->port;
 966         int timeout;
 967         CHANNEL_t *cp;
 968         
 969         if (rocket_paranoia_check(info, "rp_close"))
 970                 return;
 971 
 972 #ifdef ROCKET_DEBUG_OPEN
 973         printk(KERN_INFO "rp_close ttyR%d, count = %d\n", info->line, info->port.count);
 974 #endif
 975 
 976         if (tty_port_close_start(port, tty, filp) == 0)
 977                 return;
 978 
 979         mutex_lock(&port->mutex);
 980         cp = &info->channel;
 981         /*
 982          * Before we drop DTR, make sure the UART transmitter
 983          * has completely drained; this is especially
 984          * important if there is a transmit FIFO!
 985          */
 986         timeout = (sGetTxCnt(cp) + 1) * HZ / info->cps;
 987         if (timeout == 0)
 988                 timeout = 1;
 989         rp_wait_until_sent(tty, timeout);
 990         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 991 
 992         sDisTransmit(cp);
 993         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 994         sDisCTSFlowCtl(cp);
 995         sDisTxSoftFlowCtl(cp);
 996         sClrTxXOFF(cp);
 997         sFlushRxFIFO(cp);
 998         sFlushTxFIFO(cp);
 999         sClrRTS(cp);
1000         if (C_HUPCL(tty))
1001                 sClrDTR(cp);
1002 
1003         rp_flush_buffer(tty);
1004                 
1005         tty_ldisc_flush(tty);
1006 
1007         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1008 
1009         /* We can't yet use tty_port_close_end as the buffer handling in this
1010            driver is a bit different to the usual */
1011 
1012         if (port->blocked_open) {
1013                 if (port->close_delay) {
1014                         msleep_interruptible(jiffies_to_msecs(port->close_delay));
1015                 }
1016                 wake_up_interruptible(&port->open_wait);
1017         } else {
1018                 if (info->xmit_buf) {
1019                         free_page((unsigned long) info->xmit_buf);
1020                         info->xmit_buf = NULL;
1021                 }
1022         }
1023         spin_lock_irq(&port->lock);
1024         tty->closing = 0;
1025         spin_unlock_irq(&port->lock);
1026         tty_port_set_initialized(port, 0);
1027         tty_port_set_active(port, 0);
1028         mutex_unlock(&port->mutex);
1029         tty_port_tty_set(port, NULL);
1030 
1031         atomic_dec(&rp_num_ports_open);
1032 
1033 #ifdef ROCKET_DEBUG_OPEN
1034         printk(KERN_INFO "rocket mod-- = %d...\n",
1035                         atomic_read(&rp_num_ports_open));
1036         printk(KERN_INFO "rp_close ttyR%d complete shutdown\n", info->line);
1037 #endif
1038 
1039 }
1040 
1041 static void rp_set_termios(struct tty_struct *tty,
1042                            struct ktermios *old_termios)
1043 {
1044         struct r_port *info = tty->driver_data;
1045         CHANNEL_t *cp;
1046         unsigned cflag;
1047 
1048         if (rocket_paranoia_check(info, "rp_set_termios"))
1049                 return;
1050 
1051         cflag = tty->termios.c_cflag;
1052 
1053         /*
1054          * This driver doesn't support CS5 or CS6
1055          */
1056         if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1057                 tty->termios.c_cflag =
1058                     ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1059         /* Or CMSPAR */
1060         tty->termios.c_cflag &= ~CMSPAR;
1061 
1062         configure_r_port(tty, info, old_termios);
1063 
1064         cp = &info->channel;
1065 
1066         /* Handle transition to B0 status */
1067         if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
1068                 sClrDTR(cp);
1069                 sClrRTS(cp);
1070         }
1071 
1072         /* Handle transition away from B0 status */
1073         if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
1074                 sSetRTS(cp);
1075                 sSetDTR(cp);
1076         }
1077 
1078         if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty))
1079                 rp_start(tty);
1080 }
1081 
1082 static int rp_break(struct tty_struct *tty, int break_state)
1083 {
1084         struct r_port *info = tty->driver_data;
1085         unsigned long flags;
1086 
1087         if (rocket_paranoia_check(info, "rp_break"))
1088                 return -EINVAL;
1089 
1090         spin_lock_irqsave(&info->slock, flags);
1091         if (break_state == -1)
1092                 sSendBreak(&info->channel);
1093         else
1094                 sClrBreak(&info->channel);
1095         spin_unlock_irqrestore(&info->slock, flags);
1096         return 0;
1097 }
1098 
1099 /*
1100  * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1101  * the UPCI boards was added, it was decided to make this a function because
1102  * the macro was getting too complicated. All cases except the first one
1103  * (UPCIRingInd) are taken directly from the original macro.
1104  */
1105 static int sGetChanRI(CHANNEL_T * ChP)
1106 {
1107         CONTROLLER_t *CtlP = ChP->CtlP;
1108         int ChanNum = ChP->ChanNum;
1109         int RingInd = 0;
1110 
1111         if (CtlP->UPCIRingInd)
1112                 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]);
1113         else if (CtlP->AltChanRingIndicator)
1114                 RingInd = sInB((ByteIO_t) (ChP->ChanStat + 8)) & DSR_ACT;
1115         else if (CtlP->boardType == ROCKET_TYPE_PC104)
1116                 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]);
1117 
1118         return RingInd;
1119 }
1120 
1121 /********************************************************************************************/
1122 /*  Here are the routines used by rp_ioctl.  These are all called from exception handlers.  */
1123 
1124 /*
1125  *  Returns the state of the serial modem control lines.  These next 2 functions 
1126  *  are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1127  */
1128 static int rp_tiocmget(struct tty_struct *tty)
1129 {
1130         struct r_port *info = tty->driver_data;
1131         unsigned int control, result, ChanStatus;
1132 
1133         ChanStatus = sGetChanStatusLo(&info->channel);
1134         control = info->channel.TxControl[3];
1135         result = ((control & SET_RTS) ? TIOCM_RTS : 0) | 
1136                 ((control & SET_DTR) ?  TIOCM_DTR : 0) |
1137                 ((ChanStatus & CD_ACT) ? TIOCM_CAR : 0) |
1138                 (sGetChanRI(&info->channel) ? TIOCM_RNG : 0) |
1139                 ((ChanStatus & DSR_ACT) ? TIOCM_DSR : 0) |
1140                 ((ChanStatus & CTS_ACT) ? TIOCM_CTS : 0);
1141 
1142         return result;
1143 }
1144 
1145 /* 
1146  *  Sets the modem control lines
1147  */
1148 static int rp_tiocmset(struct tty_struct *tty,
1149                                 unsigned int set, unsigned int clear)
1150 {
1151         struct r_port *info = tty->driver_data;
1152 
1153         if (set & TIOCM_RTS)
1154                 info->channel.TxControl[3] |= SET_RTS;
1155         if (set & TIOCM_DTR)
1156                 info->channel.TxControl[3] |= SET_DTR;
1157         if (clear & TIOCM_RTS)
1158                 info->channel.TxControl[3] &= ~SET_RTS;
1159         if (clear & TIOCM_DTR)
1160                 info->channel.TxControl[3] &= ~SET_DTR;
1161 
1162         out32(info->channel.IndexAddr, info->channel.TxControl);
1163         return 0;
1164 }
1165 
1166 static int get_config(struct r_port *info, struct rocket_config __user *retinfo)
1167 {
1168         struct rocket_config tmp;
1169 
1170         memset(&tmp, 0, sizeof (tmp));
1171         mutex_lock(&info->port.mutex);
1172         tmp.line = info->line;
1173         tmp.flags = info->flags;
1174         tmp.close_delay = info->port.close_delay;
1175         tmp.closing_wait = info->port.closing_wait;
1176         tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
1177         mutex_unlock(&info->port.mutex);
1178 
1179         if (copy_to_user(retinfo, &tmp, sizeof (*retinfo)))
1180                 return -EFAULT;
1181         return 0;
1182 }
1183 
1184 static int set_config(struct tty_struct *tty, struct r_port *info,
1185                                         struct rocket_config __user *new_info)
1186 {
1187         struct rocket_config new_serial;
1188 
1189         if (copy_from_user(&new_serial, new_info, sizeof (new_serial)))
1190                 return -EFAULT;
1191 
1192         mutex_lock(&info->port.mutex);
1193         if (!capable(CAP_SYS_ADMIN))
1194         {
1195                 if ((new_serial.flags & ~ROCKET_USR_MASK) != (info->flags & ~ROCKET_USR_MASK)) {
1196                         mutex_unlock(&info->port.mutex);
1197                         return -EPERM;
1198                 }
1199                 info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK));
1200                 mutex_unlock(&info->port.mutex);
1201                 return 0;
1202         }
1203 
1204         if ((new_serial.flags ^ info->flags) & ROCKET_SPD_MASK) {
1205                 /* warn about deprecation, unless clearing */
1206                 if (new_serial.flags & ROCKET_SPD_MASK)
1207                         dev_warn_ratelimited(tty->dev, "use of SPD flags is deprecated\n");
1208         }
1209 
1210         info->flags = ((info->flags & ~ROCKET_FLAGS) | (new_serial.flags & ROCKET_FLAGS));
1211         info->port.close_delay = new_serial.close_delay;
1212         info->port.closing_wait = new_serial.closing_wait;
1213 
1214         mutex_unlock(&info->port.mutex);
1215 
1216         configure_r_port(tty, info, NULL);
1217         return 0;
1218 }
1219 
1220 /*
1221  *  This function fills in a rocket_ports struct with information
1222  *  about what boards/ports are in the system.  This info is passed
1223  *  to user space.  See setrocket.c where the info is used to create
1224  *  the /dev/ttyRx ports.
1225  */
1226 static int get_ports(struct r_port *info, struct rocket_ports __user *retports)
1227 {
1228         struct rocket_ports tmp;
1229         int board;
1230 
1231         memset(&tmp, 0, sizeof (tmp));
1232         tmp.tty_major = rocket_driver->major;
1233 
1234         for (board = 0; board < 4; board++) {
1235                 tmp.rocketModel[board].model = rocketModel[board].model;
1236                 strcpy(tmp.rocketModel[board].modelString, rocketModel[board].modelString);
1237                 tmp.rocketModel[board].numPorts = rocketModel[board].numPorts;
1238                 tmp.rocketModel[board].loadrm2 = rocketModel[board].loadrm2;
1239                 tmp.rocketModel[board].startingPortNumber = rocketModel[board].startingPortNumber;
1240         }
1241         if (copy_to_user(retports, &tmp, sizeof (*retports)))
1242                 return -EFAULT;
1243         return 0;
1244 }
1245 
1246 static int reset_rm2(struct r_port *info, void __user *arg)
1247 {
1248         int reset;
1249 
1250         if (!capable(CAP_SYS_ADMIN))
1251                 return -EPERM;
1252 
1253         if (copy_from_user(&reset, arg, sizeof (int)))
1254                 return -EFAULT;
1255         if (reset)
1256                 reset = 1;
1257 
1258         if (rcktpt_type[info->board] != ROCKET_TYPE_MODEMII &&
1259             rcktpt_type[info->board] != ROCKET_TYPE_MODEMIII)
1260                 return -EINVAL;
1261 
1262         if (info->ctlp->BusType == isISA)
1263                 sModemReset(info->ctlp, info->chan, reset);
1264         else
1265                 sPCIModemReset(info->ctlp, info->chan, reset);
1266 
1267         return 0;
1268 }
1269 
1270 static int get_version(struct r_port *info, struct rocket_version __user *retvers)
1271 {
1272         if (copy_to_user(retvers, &driver_version, sizeof (*retvers)))
1273                 return -EFAULT;
1274         return 0;
1275 }
1276 
1277 /*  IOCTL call handler into the driver */
1278 static int rp_ioctl(struct tty_struct *tty,
1279                     unsigned int cmd, unsigned long arg)
1280 {
1281         struct r_port *info = tty->driver_data;
1282         void __user *argp = (void __user *)arg;
1283         int ret = 0;
1284 
1285         if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl"))
1286                 return -ENXIO;
1287 
1288         switch (cmd) {
1289         case RCKP_GET_CONFIG:
1290                 dev_warn_ratelimited(tty->dev,
1291                                         "RCKP_GET_CONFIG option is deprecated\n");
1292                 ret = get_config(info, argp);
1293                 break;
1294         case RCKP_SET_CONFIG:
1295                 dev_warn_ratelimited(tty->dev,
1296                                         "RCKP_SET_CONFIG option is deprecated\n");
1297                 ret = set_config(tty, info, argp);
1298                 break;
1299         case RCKP_GET_PORTS:
1300                 dev_warn_ratelimited(tty->dev,
1301                                         "RCKP_GET_PORTS option is deprecated\n");
1302                 ret = get_ports(info, argp);
1303                 break;
1304         case RCKP_RESET_RM2:
1305                 dev_warn_ratelimited(tty->dev,
1306                                         "RCKP_RESET_RM2 option is deprecated\n");
1307                 ret = reset_rm2(info, argp);
1308                 break;
1309         case RCKP_GET_VERSION:
1310                 dev_warn_ratelimited(tty->dev,
1311                                         "RCKP_GET_VERSION option is deprecated\n");
1312                 ret = get_version(info, argp);
1313                 break;
1314         default:
1315                 ret = -ENOIOCTLCMD;
1316         }
1317         return ret;
1318 }
1319 
1320 static void rp_send_xchar(struct tty_struct *tty, char ch)
1321 {
1322         struct r_port *info = tty->driver_data;
1323         CHANNEL_t *cp;
1324 
1325         if (rocket_paranoia_check(info, "rp_send_xchar"))
1326                 return;
1327 
1328         cp = &info->channel;
1329         if (sGetTxCnt(cp))
1330                 sWriteTxPrioByte(cp, ch);
1331         else
1332                 sWriteTxByte(sGetTxRxDataIO(cp), ch);
1333 }
1334 
1335 static void rp_throttle(struct tty_struct *tty)
1336 {
1337         struct r_port *info = tty->driver_data;
1338 
1339 #ifdef ROCKET_DEBUG_THROTTLE
1340         printk(KERN_INFO "throttle %s ....\n", tty->name);
1341 #endif
1342 
1343         if (rocket_paranoia_check(info, "rp_throttle"))
1344                 return;
1345 
1346         if (I_IXOFF(tty))
1347                 rp_send_xchar(tty, STOP_CHAR(tty));
1348 
1349         sClrRTS(&info->channel);
1350 }
1351 
1352 static void rp_unthrottle(struct tty_struct *tty)
1353 {
1354         struct r_port *info = tty->driver_data;
1355 #ifdef ROCKET_DEBUG_THROTTLE
1356         printk(KERN_INFO "unthrottle %s ....\n", tty->name);
1357 #endif
1358 
1359         if (rocket_paranoia_check(info, "rp_unthrottle"))
1360                 return;
1361 
1362         if (I_IXOFF(tty))
1363                 rp_send_xchar(tty, START_CHAR(tty));
1364 
1365         sSetRTS(&info->channel);
1366 }
1367 
1368 /*
1369  * ------------------------------------------------------------
1370  * rp_stop() and rp_start()
1371  *
1372  * This routines are called before setting or resetting tty->stopped.
1373  * They enable or disable transmitter interrupts, as necessary.
1374  * ------------------------------------------------------------
1375  */
1376 static void rp_stop(struct tty_struct *tty)
1377 {
1378         struct r_port *info = tty->driver_data;
1379 
1380 #ifdef ROCKET_DEBUG_FLOW
1381         printk(KERN_INFO "stop %s: %d %d....\n", tty->name,
1382                info->xmit_cnt, info->xmit_fifo_room);
1383 #endif
1384 
1385         if (rocket_paranoia_check(info, "rp_stop"))
1386                 return;
1387 
1388         if (sGetTxCnt(&info->channel))
1389                 sDisTransmit(&info->channel);
1390 }
1391 
1392 static void rp_start(struct tty_struct *tty)
1393 {
1394         struct r_port *info = tty->driver_data;
1395 
1396 #ifdef ROCKET_DEBUG_FLOW
1397         printk(KERN_INFO "start %s: %d %d....\n", tty->name,
1398                info->xmit_cnt, info->xmit_fifo_room);
1399 #endif
1400 
1401         if (rocket_paranoia_check(info, "rp_stop"))
1402                 return;
1403 
1404         sEnTransmit(&info->channel);
1405         set_bit((info->aiop * 8) + info->chan,
1406                 (void *) &xmit_flags[info->board]);
1407 }
1408 
1409 /*
1410  * rp_wait_until_sent() --- wait until the transmitter is empty
1411  */
1412 static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
1413 {
1414         struct r_port *info = tty->driver_data;
1415         CHANNEL_t *cp;
1416         unsigned long orig_jiffies;
1417         int check_time, exit_time;
1418         int txcnt;
1419 
1420         if (rocket_paranoia_check(info, "rp_wait_until_sent"))
1421                 return;
1422 
1423         cp = &info->channel;
1424 
1425         orig_jiffies = jiffies;
1426 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1427         printk(KERN_INFO "In %s(%d) (jiff=%lu)...\n", __func__, timeout,
1428                jiffies);
1429         printk(KERN_INFO "cps=%d...\n", info->cps);
1430 #endif
1431         while (1) {
1432                 txcnt = sGetTxCnt(cp);
1433                 if (!txcnt) {
1434                         if (sGetChanStatusLo(cp) & TXSHRMT)
1435                                 break;
1436                         check_time = (HZ / info->cps) / 5;
1437                 } else {
1438                         check_time = HZ * txcnt / info->cps;
1439                 }
1440                 if (timeout) {
1441                         exit_time = orig_jiffies + timeout - jiffies;
1442                         if (exit_time <= 0)
1443                                 break;
1444                         if (exit_time < check_time)
1445                                 check_time = exit_time;
1446                 }
1447                 if (check_time == 0)
1448                         check_time = 1;
1449 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1450                 printk(KERN_INFO "txcnt = %d (jiff=%lu,check=%d)...\n", txcnt,
1451                                 jiffies, check_time);
1452 #endif
1453                 msleep_interruptible(jiffies_to_msecs(check_time));
1454                 if (signal_pending(current))
1455                         break;
1456         }
1457         __set_current_state(TASK_RUNNING);
1458 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1459         printk(KERN_INFO "txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
1460 #endif
1461 }
1462 
1463 /*
1464  * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1465  */
1466 static void rp_hangup(struct tty_struct *tty)
1467 {
1468         CHANNEL_t *cp;
1469         struct r_port *info = tty->driver_data;
1470         unsigned long flags;
1471 
1472         if (rocket_paranoia_check(info, "rp_hangup"))
1473                 return;
1474 
1475 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1476         printk(KERN_INFO "rp_hangup of ttyR%d...\n", info->line);
1477 #endif
1478         rp_flush_buffer(tty);
1479         spin_lock_irqsave(&info->port.lock, flags);
1480         if (info->port.count)
1481                 atomic_dec(&rp_num_ports_open);
1482         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1483         spin_unlock_irqrestore(&info->port.lock, flags);
1484 
1485         tty_port_hangup(&info->port);
1486 
1487         cp = &info->channel;
1488         sDisRxFIFO(cp);
1489         sDisTransmit(cp);
1490         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1491         sDisCTSFlowCtl(cp);
1492         sDisTxSoftFlowCtl(cp);
1493         sClrTxXOFF(cp);
1494         tty_port_set_initialized(&info->port, 0);
1495 
1496         wake_up_interruptible(&info->port.open_wait);
1497 }
1498 
1499 /*
1500  *  Exception handler - write char routine.  The RocketPort driver uses a
1501  *  double-buffering strategy, with the twist that if the in-memory CPU
1502  *  buffer is empty, and there's space in the transmit FIFO, the
1503  *  writing routines will write directly to transmit FIFO.
1504  *  Write buffer and counters protected by spinlocks
1505  */
1506 static int rp_put_char(struct tty_struct *tty, unsigned char ch)
1507 {
1508         struct r_port *info = tty->driver_data;
1509         CHANNEL_t *cp;
1510         unsigned long flags;
1511 
1512         if (rocket_paranoia_check(info, "rp_put_char"))
1513                 return 0;
1514 
1515         /*
1516          * Grab the port write mutex, locking out other processes that try to
1517          * write to this port
1518          */
1519         mutex_lock(&info->write_mtx);
1520 
1521 #ifdef ROCKET_DEBUG_WRITE
1522         printk(KERN_INFO "rp_put_char %c...\n", ch);
1523 #endif
1524 
1525         spin_lock_irqsave(&info->slock, flags);
1526         cp = &info->channel;
1527 
1528         if (!tty->stopped && info->xmit_fifo_room == 0)
1529                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1530 
1531         if (tty->stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
1532                 info->xmit_buf[info->xmit_head++] = ch;
1533                 info->xmit_head &= XMIT_BUF_SIZE - 1;
1534                 info->xmit_cnt++;
1535                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1536         } else {
1537                 sOutB(sGetTxRxDataIO(cp), ch);
1538                 info->xmit_fifo_room--;
1539         }
1540         spin_unlock_irqrestore(&info->slock, flags);
1541         mutex_unlock(&info->write_mtx);
1542         return 1;
1543 }
1544 
1545 /*
1546  *  Exception handler - write routine, called when user app writes to the device.
1547  *  A per port write mutex is used to protect from another process writing to
1548  *  this port at the same time.  This other process could be running on the other CPU
1549  *  or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out). 
1550  *  Spinlocks protect the info xmit members.
1551  */
1552 static int rp_write(struct tty_struct *tty,
1553                     const unsigned char *buf, int count)
1554 {
1555         struct r_port *info = tty->driver_data;
1556         CHANNEL_t *cp;
1557         const unsigned char *b;
1558         int c, retval = 0;
1559         unsigned long flags;
1560 
1561         if (count <= 0 || rocket_paranoia_check(info, "rp_write"))
1562                 return 0;
1563 
1564         if (mutex_lock_interruptible(&info->write_mtx))
1565                 return -ERESTARTSYS;
1566 
1567 #ifdef ROCKET_DEBUG_WRITE
1568         printk(KERN_INFO "rp_write %d chars...\n", count);
1569 #endif
1570         cp = &info->channel;
1571 
1572         if (!tty->stopped && info->xmit_fifo_room < count)
1573                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1574 
1575         /*
1576          *  If the write queue for the port is empty, and there is FIFO space, stuff bytes 
1577          *  into FIFO.  Use the write queue for temp storage.
1578          */
1579         if (!tty->stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) {
1580                 c = min(count, info->xmit_fifo_room);
1581                 b = buf;
1582 
1583                 /*  Push data into FIFO, 2 bytes at a time */
1584                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) b, c / 2);
1585 
1586                 /*  If there is a byte remaining, write it */
1587                 if (c & 1)
1588                         sOutB(sGetTxRxDataIO(cp), b[c - 1]);
1589 
1590                 retval += c;
1591                 buf += c;
1592                 count -= c;
1593 
1594                 spin_lock_irqsave(&info->slock, flags);
1595                 info->xmit_fifo_room -= c;
1596                 spin_unlock_irqrestore(&info->slock, flags);
1597         }
1598 
1599         /* If count is zero, we wrote it all and are done */
1600         if (!count)
1601                 goto end;
1602 
1603         /*  Write remaining data into the port's xmit_buf */
1604         while (1) {
1605                 /* Hung up ? */
1606                 if (!tty_port_active(&info->port))
1607                         goto end;
1608                 c = min(count, XMIT_BUF_SIZE - info->xmit_cnt - 1);
1609                 c = min(c, XMIT_BUF_SIZE - info->xmit_head);
1610                 if (c <= 0)
1611                         break;
1612 
1613                 b = buf;
1614                 memcpy(info->xmit_buf + info->xmit_head, b, c);
1615 
1616                 spin_lock_irqsave(&info->slock, flags);
1617                 info->xmit_head =
1618                     (info->xmit_head + c) & (XMIT_BUF_SIZE - 1);
1619                 info->xmit_cnt += c;
1620                 spin_unlock_irqrestore(&info->slock, flags);
1621 
1622                 buf += c;
1623                 count -= c;
1624                 retval += c;
1625         }
1626 
1627         if ((retval > 0) && !tty->stopped)
1628                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1629         
1630 end:
1631         if (info->xmit_cnt < WAKEUP_CHARS) {
1632                 tty_wakeup(tty);
1633 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1634                 wake_up_interruptible(&tty->poll_wait);
1635 #endif
1636         }
1637         mutex_unlock(&info->write_mtx);
1638         return retval;
1639 }
1640 
1641 /*
1642  * Return the number of characters that can be sent.  We estimate
1643  * only using the in-memory transmit buffer only, and ignore the
1644  * potential space in the transmit FIFO.
1645  */
1646 static int rp_write_room(struct tty_struct *tty)
1647 {
1648         struct r_port *info = tty->driver_data;
1649         int ret;
1650 
1651         if (rocket_paranoia_check(info, "rp_write_room"))
1652                 return 0;
1653 
1654         ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
1655         if (ret < 0)
1656                 ret = 0;
1657 #ifdef ROCKET_DEBUG_WRITE
1658         printk(KERN_INFO "rp_write_room returns %d...\n", ret);
1659 #endif
1660         return ret;
1661 }
1662 
1663 /*
1664  * Return the number of characters in the buffer.  Again, this only
1665  * counts those characters in the in-memory transmit buffer.
1666  */
1667 static int rp_chars_in_buffer(struct tty_struct *tty)
1668 {
1669         struct r_port *info = tty->driver_data;
1670 
1671         if (rocket_paranoia_check(info, "rp_chars_in_buffer"))
1672                 return 0;
1673 
1674 #ifdef ROCKET_DEBUG_WRITE
1675         printk(KERN_INFO "rp_chars_in_buffer returns %d...\n", info->xmit_cnt);
1676 #endif
1677         return info->xmit_cnt;
1678 }
1679 
1680 /*
1681  *  Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1682  *  r_port struct for the port.  Note that spinlock are used to protect info members,
1683  *  do not call this function if the spinlock is already held.
1684  */
1685 static void rp_flush_buffer(struct tty_struct *tty)
1686 {
1687         struct r_port *info = tty->driver_data;
1688         CHANNEL_t *cp;
1689         unsigned long flags;
1690 
1691         if (rocket_paranoia_check(info, "rp_flush_buffer"))
1692                 return;
1693 
1694         spin_lock_irqsave(&info->slock, flags);
1695         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1696         spin_unlock_irqrestore(&info->slock, flags);
1697 
1698 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1699         wake_up_interruptible(&tty->poll_wait);
1700 #endif
1701         tty_wakeup(tty);
1702 
1703         cp = &info->channel;
1704         sFlushTxFIFO(cp);
1705 }
1706 
1707 #ifdef CONFIG_PCI
1708 
1709 static const struct pci_device_id rocket_pci_ids[] = {
1710         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4QUAD) },
1711         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8OCTA) },
1712         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP8OCTA) },
1713         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8INTF) },
1714         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP8INTF) },
1715         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8J) },
1716         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4J) },
1717         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8SNI) },
1718         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16SNI) },
1719         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16INTF) },
1720         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP16INTF) },
1721         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_CRP16INTF) },
1722         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP32INTF) },
1723         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP32INTF) },
1724         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RPP4) },
1725         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RPP8) },
1726         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP2_232) },
1727         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP2_422) },
1728         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP6M) },
1729         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4M) },
1730         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_UPCI_RM3_8PORT) },
1731         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_UPCI_RM3_4PORT) },
1732         { }
1733 };
1734 MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
1735 
1736 /*  Resets the speaker controller on RocketModem II and III devices */
1737 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
1738 {
1739         ByteIO_t addr;
1740 
1741         /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
1742         if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
1743                 addr = CtlP->AiopIO[0] + 0x4F;
1744                 sOutB(addr, 0);
1745         }
1746 
1747         /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
1748         if ((model == MODEL_UPCI_RM3_8PORT)
1749             || (model == MODEL_UPCI_RM3_4PORT)) {
1750                 addr = CtlP->AiopIO[0] + 0x88;
1751                 sOutB(addr, 0);
1752         }
1753 }
1754 
1755 /***************************************************************************
1756 Function: sPCIInitController
1757 Purpose:  Initialization of controller global registers and controller
1758           structure.
1759 Call:     sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
1760                           IRQNum,Frequency,PeriodicOnly)
1761           CONTROLLER_T *CtlP; Ptr to controller structure
1762           int CtlNum; Controller number
1763           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
1764              This list must be in the order the AIOPs will be found on the
1765              controller.  Once an AIOP in the list is not found, it is
1766              assumed that there are no more AIOPs on the controller.
1767           int AiopIOListSize; Number of addresses in AiopIOList
1768           int IRQNum; Interrupt Request number.  Can be any of the following:
1769                          0: Disable global interrupts
1770                          3: IRQ 3
1771                          4: IRQ 4
1772                          5: IRQ 5
1773                          9: IRQ 9
1774                          10: IRQ 10
1775                          11: IRQ 11
1776                          12: IRQ 12
1777                          15: IRQ 15
1778           Byte_t Frequency: A flag identifying the frequency
1779                    of the periodic interrupt, can be any one of the following:
1780                       FREQ_DIS - periodic interrupt disabled
1781                       FREQ_137HZ - 137 Hertz
1782                       FREQ_69HZ - 69 Hertz
1783                       FREQ_34HZ - 34 Hertz
1784                       FREQ_17HZ - 17 Hertz
1785                       FREQ_9HZ - 9 Hertz
1786                       FREQ_4HZ - 4 Hertz
1787                    If IRQNum is set to 0 the Frequency parameter is
1788                    overidden, it is forced to a value of FREQ_DIS.
1789           int PeriodicOnly: 1 if all interrupts except the periodic
1790                                interrupt are to be blocked.
1791                             0 is both the periodic interrupt and
1792                                other channel interrupts are allowed.
1793                             If IRQNum is set to 0 the PeriodicOnly parameter is
1794                                overidden, it is forced to a value of 0.
1795 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
1796                initialization failed.
1797 
1798 Comments:
1799           If periodic interrupts are to be disabled but AIOP interrupts
1800           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
1801 
1802           If interrupts are to be completely disabled set IRQNum to 0.
1803 
1804           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
1805           invalid combination.
1806 
1807           This function performs initialization of global interrupt modes,
1808           but it does not actually enable global interrupts.  To enable
1809           and disable global interrupts use functions sEnGlobalInt() and
1810           sDisGlobalInt().  Enabling of global interrupts is normally not
1811           done until all other initializations are complete.
1812 
1813           Even if interrupts are globally enabled, they must also be
1814           individually enabled for each channel that is to generate
1815           interrupts.
1816 
1817 Warnings: No range checking on any of the parameters is done.
1818 
1819           No context switches are allowed while executing this function.
1820 
1821           After this function all AIOPs on the controller are disabled,
1822           they can be enabled with sEnAiop().
1823 */
1824 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
1825                               ByteIO_t * AiopIOList, int AiopIOListSize,
1826                               WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
1827                               int PeriodicOnly, int altChanRingIndicator,
1828                               int UPCIRingInd)
1829 {
1830         int i;
1831         ByteIO_t io;
1832 
1833         CtlP->AltChanRingIndicator = altChanRingIndicator;
1834         CtlP->UPCIRingInd = UPCIRingInd;
1835         CtlP->CtlNum = CtlNum;
1836         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
1837         CtlP->BusType = isPCI;  /* controller release 1 */
1838 
1839         if (ConfigIO) {
1840                 CtlP->isUPCI = 1;
1841                 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
1842                 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
1843                 CtlP->AiopIntrBits = upci_aiop_intr_bits;
1844         } else {
1845                 CtlP->isUPCI = 0;
1846                 CtlP->PCIIO =
1847                     (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
1848                 CtlP->AiopIntrBits = aiop_intr_bits;
1849         }
1850 
1851         sPCIControllerEOI(CtlP);        /* clear EOI if warm init */
1852         /* Init AIOPs */
1853         CtlP->NumAiop = 0;
1854         for (i = 0; i < AiopIOListSize; i++) {
1855                 io = AiopIOList[i];
1856                 CtlP->AiopIO[i] = (WordIO_t) io;
1857                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
1858 
1859                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
1860                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
1861                         break;  /* done looking for AIOPs */
1862 
1863                 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
1864                 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
1865                 sOutB(io + _INDX_DATA, sClockPrescale);
1866                 CtlP->NumAiop++;        /* bump count of AIOPs */
1867         }
1868 
1869         if (CtlP->NumAiop == 0)
1870                 return (-1);
1871         else
1872                 return (CtlP->NumAiop);
1873 }
1874 
1875 /*
1876  *  Called when a PCI card is found.  Retrieves and stores model information,
1877  *  init's aiopic and serial port hardware.
1878  *  Inputs:  i is the board number (0-n)
1879  */
1880 static __init int register_PCI(int i, struct pci_dev *dev)
1881 {
1882         int num_aiops, aiop, max_num_aiops, num_chan, chan;
1883         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
1884         CONTROLLER_t *ctlp;
1885 
1886         int fast_clock = 0;
1887         int altChanRingIndicator = 0;
1888         int ports_per_aiop = 8;
1889         WordIO_t ConfigIO = 0;
1890         ByteIO_t UPCIRingInd = 0;
1891 
1892         if (!dev || !pci_match_id(rocket_pci_ids, dev) ||
1893             pci_enable_device(dev) || i >= NUM_BOARDS)
1894                 return 0;
1895 
1896         rcktpt_io_addr[i] = pci_resource_start(dev, 0);
1897 
1898         rcktpt_type[i] = ROCKET_TYPE_NORMAL;
1899         rocketModel[i].loadrm2 = 0;
1900         rocketModel[i].startingPortNumber = nextLineNumber;
1901 
1902         /*  Depending on the model, set up some config variables */
1903         switch (dev->device) {
1904         case PCI_DEVICE_ID_RP4QUAD:
1905                 max_num_aiops = 1;
1906                 ports_per_aiop = 4;
1907                 rocketModel[i].model = MODEL_RP4QUAD;
1908                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/quad cable");
1909                 rocketModel[i].numPorts = 4;
1910                 break;
1911         case PCI_DEVICE_ID_RP8OCTA:
1912                 max_num_aiops = 1;
1913                 rocketModel[i].model = MODEL_RP8OCTA;
1914                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/octa cable");
1915                 rocketModel[i].numPorts = 8;
1916                 break;
1917         case PCI_DEVICE_ID_URP8OCTA:
1918                 max_num_aiops = 1;
1919                 rocketModel[i].model = MODEL_UPCI_RP8OCTA;
1920                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/octa cable");
1921                 rocketModel[i].numPorts = 8;
1922                 break;
1923         case PCI_DEVICE_ID_RP8INTF:
1924                 max_num_aiops = 1;
1925                 rocketModel[i].model = MODEL_RP8INTF;
1926                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/external I/F");
1927                 rocketModel[i].numPorts = 8;
1928                 break;
1929         case PCI_DEVICE_ID_URP8INTF:
1930                 max_num_aiops = 1;
1931                 rocketModel[i].model = MODEL_UPCI_RP8INTF;
1932                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/external I/F");
1933                 rocketModel[i].numPorts = 8;
1934                 break;
1935         case PCI_DEVICE_ID_RP8J:
1936                 max_num_aiops = 1;
1937                 rocketModel[i].model = MODEL_RP8J;
1938                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/RJ11 connectors");
1939                 rocketModel[i].numPorts = 8;
1940                 break;
1941         case PCI_DEVICE_ID_RP4J:
1942                 max_num_aiops = 1;
1943                 ports_per_aiop = 4;
1944                 rocketModel[i].model = MODEL_RP4J;
1945                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/RJ45 connectors");
1946                 rocketModel[i].numPorts = 4;
1947                 break;
1948         case PCI_DEVICE_ID_RP8SNI:
1949                 max_num_aiops = 1;
1950                 rocketModel[i].model = MODEL_RP8SNI;
1951                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/ custom DB78");
1952                 rocketModel[i].numPorts = 8;
1953                 break;
1954         case PCI_DEVICE_ID_RP16SNI:
1955                 max_num_aiops = 2;
1956                 rocketModel[i].model = MODEL_RP16SNI;
1957                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/ custom DB78");
1958                 rocketModel[i].numPorts = 16;
1959                 break;
1960         case PCI_DEVICE_ID_RP16INTF:
1961                 max_num_aiops = 2;
1962                 rocketModel[i].model = MODEL_RP16INTF;
1963                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/external I/F");
1964                 rocketModel[i].numPorts = 16;
1965                 break;
1966         case PCI_DEVICE_ID_URP16INTF:
1967                 max_num_aiops = 2;
1968                 rocketModel[i].model = MODEL_UPCI_RP16INTF;
1969                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 16 port w/external I/F");
1970                 rocketModel[i].numPorts = 16;
1971                 break;
1972         case PCI_DEVICE_ID_CRP16INTF:
1973                 max_num_aiops = 2;
1974                 rocketModel[i].model = MODEL_CPCI_RP16INTF;
1975                 strcpy(rocketModel[i].modelString, "RocketPort Compact PCI 16 port w/external I/F");
1976                 rocketModel[i].numPorts = 16;
1977                 break;
1978         case PCI_DEVICE_ID_RP32INTF:
1979                 max_num_aiops = 4;
1980                 rocketModel[i].model = MODEL_RP32INTF;
1981                 strcpy(rocketModel[i].modelString, "RocketPort 32 port w/external I/F");
1982                 rocketModel[i].numPorts = 32;
1983                 break;
1984         case PCI_DEVICE_ID_URP32INTF:
1985                 max_num_aiops = 4;
1986                 rocketModel[i].model = MODEL_UPCI_RP32INTF;
1987                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 32 port w/external I/F");
1988                 rocketModel[i].numPorts = 32;
1989                 break;
1990         case PCI_DEVICE_ID_RPP4:
1991                 max_num_aiops = 1;
1992                 ports_per_aiop = 4;
1993                 altChanRingIndicator++;
1994                 fast_clock++;
1995                 rocketModel[i].model = MODEL_RPP4;
1996                 strcpy(rocketModel[i].modelString, "RocketPort Plus 4 port");
1997                 rocketModel[i].numPorts = 4;
1998                 break;
1999         case PCI_DEVICE_ID_RPP8:
2000                 max_num_aiops = 2;
2001                 ports_per_aiop = 4;
2002                 altChanRingIndicator++;
2003                 fast_clock++;
2004                 rocketModel[i].model = MODEL_RPP8;
2005                 strcpy(rocketModel[i].modelString, "RocketPort Plus 8 port");
2006                 rocketModel[i].numPorts = 8;
2007                 break;
2008         case PCI_DEVICE_ID_RP2_232:
2009                 max_num_aiops = 1;
2010                 ports_per_aiop = 2;
2011                 altChanRingIndicator++;
2012                 fast_clock++;
2013                 rocketModel[i].model = MODEL_RP2_232;
2014                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS232");
2015                 rocketModel[i].numPorts = 2;
2016                 break;
2017         case PCI_DEVICE_ID_RP2_422:
2018                 max_num_aiops = 1;
2019                 ports_per_aiop = 2;
2020                 altChanRingIndicator++;
2021                 fast_clock++;
2022                 rocketModel[i].model = MODEL_RP2_422;
2023                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS422");
2024                 rocketModel[i].numPorts = 2;
2025                 break;
2026         case PCI_DEVICE_ID_RP6M:
2027 
2028                 max_num_aiops = 1;
2029                 ports_per_aiop = 6;
2030 
2031                 /*  If revision is 1, the rocketmodem flash must be loaded.
2032                  *  If it is 2 it is a "socketed" version. */
2033                 if (dev->revision == 1) {
2034                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2035                         rocketModel[i].loadrm2 = 1;
2036                 } else {
2037                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2038                 }
2039 
2040                 rocketModel[i].model = MODEL_RP6M;
2041                 strcpy(rocketModel[i].modelString, "RocketModem 6 port");
2042                 rocketModel[i].numPorts = 6;
2043                 break;
2044         case PCI_DEVICE_ID_RP4M:
2045                 max_num_aiops = 1;
2046                 ports_per_aiop = 4;
2047                 if (dev->revision == 1) {
2048                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2049                         rocketModel[i].loadrm2 = 1;
2050                 } else {
2051                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2052                 }
2053 
2054                 rocketModel[i].model = MODEL_RP4M;
2055                 strcpy(rocketModel[i].modelString, "RocketModem 4 port");
2056                 rocketModel[i].numPorts = 4;
2057                 break;
2058         default:
2059                 max_num_aiops = 0;
2060                 break;
2061         }
2062 
2063         /*
2064          * Check for UPCI boards.
2065          */
2066 
2067         switch (dev->device) {
2068         case PCI_DEVICE_ID_URP32INTF:
2069         case PCI_DEVICE_ID_URP8INTF:
2070         case PCI_DEVICE_ID_URP16INTF:
2071         case PCI_DEVICE_ID_CRP16INTF:
2072         case PCI_DEVICE_ID_URP8OCTA:
2073                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2074                 ConfigIO = pci_resource_start(dev, 1);
2075                 if (dev->device == PCI_DEVICE_ID_URP8OCTA) {
2076                         UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2077 
2078                         /*
2079                          * Check for octa or quad cable.
2080                          */
2081                         if (!
2082                             (sInW(ConfigIO + _PCI_9030_GPIO_CTRL) &
2083                              PCI_GPIO_CTRL_8PORT)) {
2084                                 ports_per_aiop = 4;
2085                                 rocketModel[i].numPorts = 4;
2086                         }
2087                 }
2088                 break;
2089         case PCI_DEVICE_ID_UPCI_RM3_8PORT:
2090                 max_num_aiops = 1;
2091                 rocketModel[i].model = MODEL_UPCI_RM3_8PORT;
2092                 strcpy(rocketModel[i].modelString, "RocketModem III 8 port");
2093                 rocketModel[i].numPorts = 8;
2094                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2095                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2096                 ConfigIO = pci_resource_start(dev, 1);
2097                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2098                 break;
2099         case PCI_DEVICE_ID_UPCI_RM3_4PORT:
2100                 max_num_aiops = 1;
2101                 rocketModel[i].model = MODEL_UPCI_RM3_4PORT;
2102                 strcpy(rocketModel[i].modelString, "RocketModem III 4 port");
2103                 rocketModel[i].numPorts = 4;
2104                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2105                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2106                 ConfigIO = pci_resource_start(dev, 1);
2107                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2108                 break;
2109         default:
2110                 break;
2111         }
2112 
2113         if (fast_clock) {
2114                 sClockPrescale = 0x12;  /* mod 2 (divide by 3) */
2115                 rp_baud_base[i] = 921600;
2116         } else {
2117                 /*
2118                  * If support_low_speed is set, use the slow clock
2119                  * prescale, which supports 50 bps
2120                  */
2121                 if (support_low_speed) {
2122                         /* mod 9 (divide by 10) prescale */
2123                         sClockPrescale = 0x19;
2124                         rp_baud_base[i] = 230400;
2125                 } else {
2126                         /* mod 4 (divide by 5) prescale */
2127                         sClockPrescale = 0x14;
2128                         rp_baud_base[i] = 460800;
2129                 }
2130         }
2131 
2132         for (aiop = 0; aiop < max_num_aiops; aiop++)
2133                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
2134         ctlp = sCtlNumToCtlPtr(i);
2135         num_aiops = sPCIInitController(ctlp, i, aiopio, max_num_aiops, ConfigIO, 0, FREQ_DIS, 0, altChanRingIndicator, UPCIRingInd);
2136         for (aiop = 0; aiop < max_num_aiops; aiop++)
2137                 ctlp->AiopNumChan[aiop] = ports_per_aiop;
2138 
2139         dev_info(&dev->dev, "comtrol PCI controller #%d found at "
2140                 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2141                 i, rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString,
2142                 rocketModel[i].startingPortNumber,
2143                 rocketModel[i].startingPortNumber + rocketModel[i].numPorts-1);
2144 
2145         if (num_aiops <= 0) {
2146                 rcktpt_io_addr[i] = 0;
2147                 return (0);
2148         }
2149         is_PCI[i] = 1;
2150 
2151         /*  Reset the AIOPIC, init the serial ports */
2152         for (aiop = 0; aiop < num_aiops; aiop++) {
2153                 sResetAiopByNum(ctlp, aiop);
2154                 num_chan = ports_per_aiop;
2155                 for (chan = 0; chan < num_chan; chan++)
2156                         init_r_port(i, aiop, chan, dev);
2157         }
2158 
2159         /*  Rocket modems must be reset */
2160         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) ||
2161             (rcktpt_type[i] == ROCKET_TYPE_MODEMII) ||
2162             (rcktpt_type[i] == ROCKET_TYPE_MODEMIII)) {
2163                 num_chan = ports_per_aiop;
2164                 for (chan = 0; chan < num_chan; chan++)
2165                         sPCIModemReset(ctlp, chan, 1);
2166                 msleep(500);
2167                 for (chan = 0; chan < num_chan; chan++)
2168                         sPCIModemReset(ctlp, chan, 0);
2169                 msleep(500);
2170                 rmSpeakerReset(ctlp, rocketModel[i].model);
2171         }
2172         return (1);
2173 }
2174 
2175 /*
2176  *  Probes for PCI cards, inits them if found
2177  *  Input:   board_found = number of ISA boards already found, or the
2178  *           starting board number
2179  *  Returns: Number of PCI boards found
2180  */
2181 static int __init init_PCI(int boards_found)
2182 {
2183         struct pci_dev *dev = NULL;
2184         int count = 0;
2185 
2186         /*  Work through the PCI device list, pulling out ours */
2187         while ((dev = pci_get_device(PCI_VENDOR_ID_RP, PCI_ANY_ID, dev))) {
2188                 if (register_PCI(count + boards_found, dev))
2189                         count++;
2190         }
2191         return (count);
2192 }
2193 
2194 #endif                          /* CONFIG_PCI */
2195 
2196 /*
2197  *  Probes for ISA cards
2198  *  Input:   i = the board number to look for
2199  *  Returns: 1 if board found, 0 else
2200  */
2201 static int __init init_ISA(int i)
2202 {
2203         int num_aiops, num_chan = 0, total_num_chan = 0;
2204         int aiop, chan;
2205         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
2206         CONTROLLER_t *ctlp;
2207         char *type_string;
2208 
2209         /*  If io_addr is zero, no board configured */
2210         if (rcktpt_io_addr[i] == 0)
2211                 return (0);
2212 
2213         /*  Reserve the IO region */
2214         if (!request_region(rcktpt_io_addr[i], 64, "Comtrol RocketPort")) {
2215                 printk(KERN_ERR "Unable to reserve IO region for configured "
2216                                 "ISA RocketPort at address 0x%lx, board not "
2217                                 "installed...\n", rcktpt_io_addr[i]);
2218                 rcktpt_io_addr[i] = 0;
2219                 return (0);
2220         }
2221 
2222         ctlp = sCtlNumToCtlPtr(i);
2223 
2224         ctlp->boardType = rcktpt_type[i];
2225 
2226         switch (rcktpt_type[i]) {
2227         case ROCKET_TYPE_PC104:
2228                 type_string = "(PC104)";
2229                 break;
2230         case ROCKET_TYPE_MODEM:
2231                 type_string = "(RocketModem)";
2232                 break;
2233         case ROCKET_TYPE_MODEMII:
2234                 type_string = "(RocketModem II)";
2235                 break;
2236         default:
2237                 type_string = "";
2238                 break;
2239         }
2240 
2241         /*
2242          * If support_low_speed is set, use the slow clock prescale,
2243          * which supports 50 bps
2244          */
2245         if (support_low_speed) {
2246                 sClockPrescale = 0x19;  /* mod 9 (divide by 10) prescale */
2247                 rp_baud_base[i] = 230400;
2248         } else {
2249                 sClockPrescale = 0x14;  /* mod 4 (divide by 5) prescale */
2250                 rp_baud_base[i] = 460800;
2251         }
2252 
2253         for (aiop = 0; aiop < MAX_AIOPS_PER_BOARD; aiop++)
2254                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400);
2255 
2256         num_aiops = sInitController(ctlp, i, controller + (i * 0x400), aiopio,  MAX_AIOPS_PER_BOARD, 0, FREQ_DIS, 0);
2257 
2258         if (ctlp->boardType == ROCKET_TYPE_PC104) {
2259                 sEnAiop(ctlp, 2);       /* only one AIOPIC, but these */
2260                 sEnAiop(ctlp, 3);       /* CSels used for other stuff */
2261         }
2262 
2263         /*  If something went wrong initing the AIOP's release the ISA IO memory */
2264         if (num_aiops <= 0) {
2265                 release_region(rcktpt_io_addr[i], 64);
2266                 rcktpt_io_addr[i] = 0;
2267                 return (0);
2268         }
2269   
2270         rocketModel[i].startingPortNumber = nextLineNumber;
2271 
2272         for (aiop = 0; aiop < num_aiops; aiop++) {
2273                 sResetAiopByNum(ctlp, aiop);
2274                 sEnAiop(ctlp, aiop);
2275                 num_chan = sGetAiopNumChan(ctlp, aiop);
2276                 total_num_chan += num_chan;
2277                 for (chan = 0; chan < num_chan; chan++)
2278                         init_r_port(i, aiop, chan, NULL);
2279         }
2280         is_PCI[i] = 0;
2281         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) || (rcktpt_type[i] == ROCKET_TYPE_MODEMII)) {
2282                 num_chan = sGetAiopNumChan(ctlp, 0);
2283                 total_num_chan = num_chan;
2284                 for (chan = 0; chan < num_chan; chan++)
2285                         sModemReset(ctlp, chan, 1);
2286                 msleep(500);
2287                 for (chan = 0; chan < num_chan; chan++)
2288                         sModemReset(ctlp, chan, 0);
2289                 msleep(500);
2290                 strcpy(rocketModel[i].modelString, "RocketModem ISA");
2291         } else {
2292                 strcpy(rocketModel[i].modelString, "RocketPort ISA");
2293         }
2294         rocketModel[i].numPorts = total_num_chan;
2295         rocketModel[i].model = MODEL_ISA;
2296 
2297         printk(KERN_INFO "RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n", 
2298                i, rcktpt_io_addr[i], num_aiops, type_string);
2299 
2300         printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2301                rocketModel[i].modelString,
2302                rocketModel[i].startingPortNumber,
2303                rocketModel[i].startingPortNumber +
2304                rocketModel[i].numPorts - 1);
2305 
2306         return (1);
2307 }
2308 
2309 static const struct tty_operations rocket_ops = {
2310         .open = rp_open,
2311         .close = rp_close,
2312         .write = rp_write,
2313         .put_char = rp_put_char,
2314         .write_room = rp_write_room,
2315         .chars_in_buffer = rp_chars_in_buffer,
2316         .flush_buffer = rp_flush_buffer,
2317         .ioctl = rp_ioctl,
2318         .throttle = rp_throttle,
2319         .unthrottle = rp_unthrottle,
2320         .set_termios = rp_set_termios,
2321         .stop = rp_stop,
2322         .start = rp_start,
2323         .hangup = rp_hangup,
2324         .break_ctl = rp_break,
2325         .send_xchar = rp_send_xchar,
2326         .wait_until_sent = rp_wait_until_sent,
2327         .tiocmget = rp_tiocmget,
2328         .tiocmset = rp_tiocmset,
2329 };
2330 
2331 static const struct tty_port_operations rocket_port_ops = {
2332         .carrier_raised = carrier_raised,
2333         .dtr_rts = dtr_rts,
2334 };
2335 
2336 /*
2337  * The module "startup" routine; it's run when the module is loaded.
2338  */
2339 static int __init rp_init(void)
2340 {
2341         int ret = -ENOMEM, pci_boards_found, isa_boards_found, i;
2342 
2343         printk(KERN_INFO "RocketPort device driver module, version %s, %s\n",
2344                ROCKET_VERSION, ROCKET_DATE);
2345 
2346         rocket_driver = alloc_tty_driver(MAX_RP_PORTS);
2347         if (!rocket_driver)
2348                 goto err;
2349 
2350         /*
2351          *  If board 1 is non-zero, there is at least one ISA configured.  If controller is 
2352          *  zero, use the default controller IO address of board1 + 0x40.
2353          */
2354         if (board1) {
2355                 if (controller == 0)
2356                         controller = board1 + 0x40;
2357         } else {
2358                 controller = 0;  /*  Used as a flag, meaning no ISA boards */
2359         }
2360 
2361         /*  If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2362         if (controller && (!request_region(controller, 4, "Comtrol RocketPort"))) {
2363                 printk(KERN_ERR "Unable to reserve IO region for first "
2364                         "configured ISA RocketPort controller 0x%lx.  "
2365                         "Driver exiting\n", controller);
2366                 ret = -EBUSY;
2367                 goto err_tty;
2368         }
2369 
2370         /*  Store ISA variable retrieved from command line or .conf file. */
2371         rcktpt_io_addr[0] = board1;
2372         rcktpt_io_addr[1] = board2;
2373         rcktpt_io_addr[2] = board3;
2374         rcktpt_io_addr[3] = board4;
2375 
2376         rcktpt_type[0] = modem1 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2377         rcktpt_type[0] = pc104_1[0] ? ROCKET_TYPE_PC104 : rcktpt_type[0];
2378         rcktpt_type[1] = modem2 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2379         rcktpt_type[1] = pc104_2[0] ? ROCKET_TYPE_PC104 : rcktpt_type[1];
2380         rcktpt_type[2] = modem3 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2381         rcktpt_type[2] = pc104_3[0] ? ROCKET_TYPE_PC104 : rcktpt_type[2];
2382         rcktpt_type[3] = modem4 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2383         rcktpt_type[3] = pc104_4[0] ? ROCKET_TYPE_PC104 : rcktpt_type[3];
2384 
2385         /*
2386          * Set up the tty driver structure and then register this
2387          * driver with the tty layer.
2388          */
2389 
2390         rocket_driver->flags = TTY_DRIVER_DYNAMIC_DEV;
2391         rocket_driver->name = "ttyR";
2392         rocket_driver->driver_name = "Comtrol RocketPort";
2393         rocket_driver->major = TTY_ROCKET_MAJOR;
2394         rocket_driver->minor_start = 0;
2395         rocket_driver->type = TTY_DRIVER_TYPE_SERIAL;
2396         rocket_driver->subtype = SERIAL_TYPE_NORMAL;
2397         rocket_driver->init_termios = tty_std_termios;
2398         rocket_driver->init_termios.c_cflag =
2399             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2400         rocket_driver->init_termios.c_ispeed = 9600;
2401         rocket_driver->init_termios.c_ospeed = 9600;
2402 #ifdef ROCKET_SOFT_FLOW
2403         rocket_driver->flags |= TTY_DRIVER_REAL_RAW;
2404 #endif
2405         tty_set_operations(rocket_driver, &rocket_ops);
2406 
2407         ret = tty_register_driver(rocket_driver);
2408         if (ret < 0) {
2409                 printk(KERN_ERR "Couldn't install tty RocketPort driver\n");
2410                 goto err_controller;
2411         }
2412 
2413 #ifdef ROCKET_DEBUG_OPEN
2414         printk(KERN_INFO "RocketPort driver is major %d\n", rocket_driver.major);
2415 #endif
2416 
2417         /*
2418          *  OK, let's probe each of the controllers looking for boards.  Any boards found
2419          *  will be initialized here.
2420          */
2421         isa_boards_found = 0;
2422         pci_boards_found = 0;
2423 
2424         for (i = 0; i < NUM_BOARDS; i++) {
2425                 if (init_ISA(i))
2426                         isa_boards_found++;
2427         }
2428 
2429 #ifdef CONFIG_PCI
2430         if (isa_boards_found < NUM_BOARDS)
2431                 pci_boards_found = init_PCI(isa_boards_found);
2432 #endif
2433 
2434         max_board = pci_boards_found + isa_boards_found;
2435 
2436         if (max_board == 0) {
2437                 printk(KERN_ERR "No rocketport ports found; unloading driver\n");
2438                 ret = -ENXIO;
2439                 goto err_ttyu;
2440         }
2441 
2442         return 0;
2443 err_ttyu:
2444         tty_unregister_driver(rocket_driver);
2445 err_controller:
2446         if (controller)
2447                 release_region(controller, 4);
2448 err_tty:
2449         put_tty_driver(rocket_driver);
2450 err:
2451         return ret;
2452 }
2453 
2454 
2455 static void rp_cleanup_module(void)
2456 {
2457         int retval;
2458         int i;
2459 
2460         del_timer_sync(&rocket_timer);
2461 
2462         retval = tty_unregister_driver(rocket_driver);
2463         if (retval)
2464                 printk(KERN_ERR "Error %d while trying to unregister "
2465                        "rocketport driver\n", -retval);
2466 
2467         for (i = 0; i < MAX_RP_PORTS; i++)
2468                 if (rp_table[i]) {
2469                         tty_unregister_device(rocket_driver, i);
2470                         tty_port_destroy(&rp_table[i]->port);
2471                         kfree(rp_table[i]);
2472                 }
2473 
2474         put_tty_driver(rocket_driver);
2475 
2476         for (i = 0; i < NUM_BOARDS; i++) {
2477                 if (rcktpt_io_addr[i] <= 0 || is_PCI[i])
2478                         continue;
2479                 release_region(rcktpt_io_addr[i], 64);
2480         }
2481         if (controller)
2482                 release_region(controller, 4);
2483 }
2484 
2485 /***************************************************************************
2486 Function: sInitController
2487 Purpose:  Initialization of controller global registers and controller
2488           structure.
2489 Call:     sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2490                           IRQNum,Frequency,PeriodicOnly)
2491           CONTROLLER_T *CtlP; Ptr to controller structure
2492           int CtlNum; Controller number
2493           ByteIO_t MudbacIO; Mudbac base I/O address.
2494           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2495              This list must be in the order the AIOPs will be found on the
2496              controller.  Once an AIOP in the list is not found, it is
2497              assumed that there are no more AIOPs on the controller.
2498           int AiopIOListSize; Number of addresses in AiopIOList
2499           int IRQNum; Interrupt Request number.  Can be any of the following:
2500                          0: Disable global interrupts
2501                          3: IRQ 3
2502                          4: IRQ 4
2503                          5: IRQ 5
2504                          9: IRQ 9
2505                          10: IRQ 10
2506                          11: IRQ 11
2507                          12: IRQ 12
2508                          15: IRQ 15
2509           Byte_t Frequency: A flag identifying the frequency
2510                    of the periodic interrupt, can be any one of the following:
2511                       FREQ_DIS - periodic interrupt disabled
2512                       FREQ_137HZ - 137 Hertz
2513                       FREQ_69HZ - 69 Hertz
2514                       FREQ_34HZ - 34 Hertz
2515                       FREQ_17HZ - 17 Hertz
2516                       FREQ_9HZ - 9 Hertz
2517                       FREQ_4HZ - 4 Hertz
2518                    If IRQNum is set to 0 the Frequency parameter is
2519                    overidden, it is forced to a value of FREQ_DIS.
2520           int PeriodicOnly: 1 if all interrupts except the periodic
2521                                interrupt are to be blocked.
2522                             0 is both the periodic interrupt and
2523                                other channel interrupts are allowed.
2524                             If IRQNum is set to 0 the PeriodicOnly parameter is
2525                                overidden, it is forced to a value of 0.
2526 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2527                initialization failed.
2528 
2529 Comments:
2530           If periodic interrupts are to be disabled but AIOP interrupts
2531           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2532 
2533           If interrupts are to be completely disabled set IRQNum to 0.
2534 
2535           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2536           invalid combination.
2537 
2538           This function performs initialization of global interrupt modes,
2539           but it does not actually enable global interrupts.  To enable
2540           and disable global interrupts use functions sEnGlobalInt() and
2541           sDisGlobalInt().  Enabling of global interrupts is normally not
2542           done until all other initializations are complete.
2543 
2544           Even if interrupts are globally enabled, they must also be
2545           individually enabled for each channel that is to generate
2546           interrupts.
2547 
2548 Warnings: No range checking on any of the parameters is done.
2549 
2550           No context switches are allowed while executing this function.
2551 
2552           After this function all AIOPs on the controller are disabled,
2553           they can be enabled with sEnAiop().
2554 */
2555 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
2556                            ByteIO_t * AiopIOList, int AiopIOListSize,
2557                            int IRQNum, Byte_t Frequency, int PeriodicOnly)
2558 {
2559         int i;
2560         ByteIO_t io;
2561         int done;
2562 
2563         CtlP->AiopIntrBits = aiop_intr_bits;
2564         CtlP->AltChanRingIndicator = 0;
2565         CtlP->CtlNum = CtlNum;
2566         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2567         CtlP->BusType = isISA;
2568         CtlP->MBaseIO = MudbacIO;
2569         CtlP->MReg1IO = MudbacIO + 1;
2570         CtlP->MReg2IO = MudbacIO + 2;
2571         CtlP->MReg3IO = MudbacIO + 3;
2572 #if 1
2573         CtlP->MReg2 = 0;        /* interrupt disable */
2574         CtlP->MReg3 = 0;        /* no periodic interrupts */
2575 #else
2576         if (sIRQMap[IRQNum] == 0) {     /* interrupts globally disabled */
2577                 CtlP->MReg2 = 0;        /* interrupt disable */
2578                 CtlP->MReg3 = 0;        /* no periodic interrupts */
2579         } else {
2580                 CtlP->MReg2 = sIRQMap[IRQNum];  /* set IRQ number */
2581                 CtlP->MReg3 = Frequency;        /* set frequency */
2582                 if (PeriodicOnly) {     /* periodic interrupt only */
2583                         CtlP->MReg3 |= PERIODIC_ONLY;
2584                 }
2585         }
2586 #endif
2587         sOutB(CtlP->MReg2IO, CtlP->MReg2);
2588         sOutB(CtlP->MReg3IO, CtlP->MReg3);
2589         sControllerEOI(CtlP);   /* clear EOI if warm init */
2590         /* Init AIOPs */
2591         CtlP->NumAiop = 0;
2592         for (i = done = 0; i < AiopIOListSize; i++) {
2593                 io = AiopIOList[i];
2594                 CtlP->AiopIO[i] = (WordIO_t) io;
2595                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2596                 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */
2597                 sOutB(MudbacIO, (Byte_t) (io >> 6));    /* set up AIOP I/O in MUDBAC */
2598                 if (done)
2599                         continue;
2600                 sEnAiop(CtlP, i);       /* enable the AIOP */
2601                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2602                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2603                         done = 1;       /* done looking for AIOPs */
2604                 else {
2605                         CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2606                         sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2607                         sOutB(io + _INDX_DATA, sClockPrescale);
2608                         CtlP->NumAiop++;        /* bump count of AIOPs */
2609                 }
2610                 sDisAiop(CtlP, i);      /* disable AIOP */
2611         }
2612 
2613         if (CtlP->NumAiop == 0)
2614                 return (-1);
2615         else
2616                 return (CtlP->NumAiop);
2617 }
2618 
2619 /***************************************************************************
2620 Function: sReadAiopID
2621 Purpose:  Read the AIOP idenfication number directly from an AIOP.
2622 Call:     sReadAiopID(io)
2623           ByteIO_t io: AIOP base I/O address
2624 Return:   int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2625                  is replace by an identifying number.
2626           Flag AIOPID_NULL if no valid AIOP is found
2627 Warnings: No context switches are allowed while executing this function.
2628 
2629 */
2630 static int sReadAiopID(ByteIO_t io)
2631 {
2632         Byte_t AiopID;          /* ID byte from AIOP */
2633 
2634         sOutB(io + _CMD_REG, RESET_ALL);        /* reset AIOP */
2635         sOutB(io + _CMD_REG, 0x0);
2636         AiopID = sInW(io + _CHN_STAT0) & 0x07;
2637         if (AiopID == 0x06)
2638                 return (1);
2639         else                    /* AIOP does not exist */
2640                 return (-1);
2641 }
2642 
2643 /***************************************************************************
2644 Function: sReadAiopNumChan
2645 Purpose:  Read the number of channels available in an AIOP directly from
2646           an AIOP.
2647 Call:     sReadAiopNumChan(io)
2648           WordIO_t io: AIOP base I/O address
2649 Return:   int: The number of channels available
2650 Comments: The number of channels is determined by write/reads from identical
2651           offsets within the SRAM address spaces for channels 0 and 4.
2652           If the channel 4 space is mirrored to channel 0 it is a 4 channel
2653           AIOP, otherwise it is an 8 channel.
2654 Warnings: No context switches are allowed while executing this function.
2655 */
2656 static int sReadAiopNumChan(WordIO_t io)
2657 {
2658         Word_t x;
2659         static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2660 
2661         /* write to chan 0 SRAM */
2662         out32((DWordIO_t) io + _INDX_ADDR, R);
2663         sOutW(io + _INDX_ADDR, 0);      /* read from SRAM, chan 0 */
2664         x = sInW(io + _INDX_DATA);
2665         sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
2666         if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */
2667                 return (8);
2668         else
2669                 return (4);
2670 }
2671 
2672 /***************************************************************************
2673 Function: sInitChan
2674 Purpose:  Initialization of a channel and channel structure
2675 Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
2676           CONTROLLER_T *CtlP; Ptr to controller structure
2677           CHANNEL_T *ChP; Ptr to channel structure
2678           int AiopNum; AIOP number within controller
2679           int ChanNum; Channel number within AIOP
2680 Return:   int: 1 if initialization succeeded, 0 if it fails because channel
2681                number exceeds number of channels available in AIOP.
2682 Comments: This function must be called before a channel can be used.
2683 Warnings: No range checking on any of the parameters is done.
2684 
2685           No context switches are allowed while executing this function.
2686 */
2687 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
2688                      int ChanNum)
2689 {
2690         int i;
2691         WordIO_t AiopIO;
2692         WordIO_t ChIOOff;
2693         Byte_t *ChR;
2694         Word_t ChOff;
2695         static Byte_t R[4];
2696         int brd9600;
2697 
2698         if (ChanNum >= CtlP->AiopNumChan[AiopNum])
2699                 return 0;       /* exceeds num chans in AIOP */
2700 
2701         /* Channel, AIOP, and controller identifiers */
2702         ChP->CtlP = CtlP;
2703         ChP->ChanID = CtlP->AiopID[AiopNum];
2704         ChP->AiopNum = AiopNum;
2705         ChP->ChanNum = ChanNum;
2706 
2707         /* Global direct addresses */
2708         AiopIO = CtlP->AiopIO[AiopNum];
2709         ChP->Cmd = (ByteIO_t) AiopIO + _CMD_REG;
2710         ChP->IntChan = (ByteIO_t) AiopIO + _INT_CHAN;
2711         ChP->IntMask = (ByteIO_t) AiopIO + _INT_MASK;
2712         ChP->IndexAddr = (DWordIO_t) AiopIO + _INDX_ADDR;
2713         ChP->IndexData = AiopIO + _INDX_DATA;
2714 
2715         /* Channel direct addresses */
2716         ChIOOff = AiopIO + ChP->ChanNum * 2;
2717         ChP->TxRxData = ChIOOff + _TD0;
2718         ChP->ChanStat = ChIOOff + _CHN_STAT0;
2719         ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
2720         ChP->IntID = (ByteIO_t) AiopIO + ChP->ChanNum + _INT_ID0;
2721 
2722         /* Initialize the channel from the RData array */
2723         for (i = 0; i < RDATASIZE; i += 4) {
2724                 R[0] = RData[i];
2725                 R[1] = RData[i + 1] + 0x10 * ChanNum;
2726                 R[2] = RData[i + 2];
2727                 R[3] = RData[i + 3];
2728                 out32(ChP->IndexAddr, R);
2729         }
2730 
2731         ChR = ChP->R;
2732         for (i = 0; i < RREGDATASIZE; i += 4) {
2733                 ChR[i] = RRegData[i];
2734                 ChR[i + 1] = RRegData[i + 1] + 0x10 * ChanNum;
2735                 ChR[i + 2] = RRegData[i + 2];
2736                 ChR[i + 3] = RRegData[i + 3];
2737         }
2738 
2739         /* Indexed registers */
2740         ChOff = (Word_t) ChanNum *0x1000;
2741 
2742         if (sClockPrescale == 0x14)
2743                 brd9600 = 47;
2744         else
2745                 brd9600 = 23;
2746 
2747         ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2748         ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2749         ChP->BaudDiv[2] = (Byte_t) brd9600;
2750         ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2751         out32(ChP->IndexAddr, ChP->BaudDiv);
2752 
2753         ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2754         ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2755         ChP->TxControl[2] = 0;
2756         ChP->TxControl[3] = 0;
2757         out32(ChP->IndexAddr, ChP->TxControl);
2758 
2759         ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2760         ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2761         ChP->RxControl[2] = 0;
2762         ChP->RxControl[3] = 0;
2763         out32(ChP->IndexAddr, ChP->RxControl);
2764 
2765         ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2766         ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2767         ChP->TxEnables[2] = 0;
2768         ChP->TxEnables[3] = 0;
2769         out32(ChP->IndexAddr, ChP->TxEnables);
2770 
2771         ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2772         ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2773         ChP->TxCompare[2] = 0;
2774         ChP->TxCompare[3] = 0;
2775         out32(ChP->IndexAddr, ChP->TxCompare);
2776 
2777         ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2778         ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2779         ChP->TxReplace1[2] = 0;
2780         ChP->TxReplace1[3] = 0;
2781         out32(ChP->IndexAddr, ChP->TxReplace1);
2782 
2783         ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2784         ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2785         ChP->TxReplace2[2] = 0;
2786         ChP->TxReplace2[3] = 0;
2787         out32(ChP->IndexAddr, ChP->TxReplace2);
2788 
2789         ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
2790         ChP->TxFIFO = ChOff + _TX_FIFO;
2791 
2792         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT);  /* apply reset Tx FIFO count */
2793         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Tx FIFO count */
2794         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2795         sOutW(ChP->IndexData, 0);
2796         ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
2797         ChP->RxFIFO = ChOff + _RX_FIFO;
2798 
2799         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT);  /* apply reset Rx FIFO count */
2800         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Rx FIFO count */
2801         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2802         sOutW(ChP->IndexData, 0);
2803         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2804         sOutW(ChP->IndexData, 0);
2805         ChP->TxPrioCnt = ChOff + _TXP_CNT;
2806         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioCnt);
2807         sOutB(ChP->IndexData, 0);
2808         ChP->TxPrioPtr = ChOff + _TXP_PNTR;
2809         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioPtr);
2810         sOutB(ChP->IndexData, 0);
2811         ChP->TxPrioBuf = ChOff + _TXP_BUF;
2812         sEnRxProcessor(ChP);    /* start the Rx processor */
2813 
2814         return 1;
2815 }
2816 
2817 /***************************************************************************
2818 Function: sStopRxProcessor
2819 Purpose:  Stop the receive processor from processing a channel.
2820 Call:     sStopRxProcessor(ChP)
2821           CHANNEL_T *ChP; Ptr to channel structure
2822 
2823 Comments: The receive processor can be started again with sStartRxProcessor().
2824           This function causes the receive processor to skip over the
2825           stopped channel.  It does not stop it from processing other channels.
2826 
2827 Warnings: No context switches are allowed while executing this function.
2828 
2829           Do not leave the receive processor stopped for more than one
2830           character time.
2831 
2832           After calling this function a delay of 4 uS is required to ensure
2833           that the receive processor is no longer processing this channel.
2834 */
2835 static void sStopRxProcessor(CHANNEL_T * ChP)
2836 {
2837         Byte_t R[4];
2838 
2839         R[0] = ChP->R[0];
2840         R[1] = ChP->R[1];
2841         R[2] = 0x0a;
2842         R[3] = ChP->R[3];
2843         out32(ChP->IndexAddr, R);
2844 }
2845 
2846 /***************************************************************************
2847 Function: sFlushRxFIFO
2848 Purpose:  Flush the Rx FIFO
2849 Call:     sFlushRxFIFO(ChP)
2850           CHANNEL_T *ChP; Ptr to channel structure
2851 Return:   void
2852 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2853           while it is being flushed the receive processor is stopped
2854           and the transmitter is disabled.  After these operations a
2855           4 uS delay is done before clearing the pointers to allow
2856           the receive processor to stop.  These items are handled inside
2857           this function.
2858 Warnings: No context switches are allowed while executing this function.
2859 */
2860 static void sFlushRxFIFO(CHANNEL_T * ChP)
2861 {
2862         int i;
2863         Byte_t Ch;              /* channel number within AIOP */
2864         int RxFIFOEnabled;      /* 1 if Rx FIFO enabled */
2865 
2866         if (sGetRxCnt(ChP) == 0)        /* Rx FIFO empty */
2867                 return;         /* don't need to flush */
2868 
2869         RxFIFOEnabled = 0;
2870         if (ChP->R[0x32] == 0x08) {     /* Rx FIFO is enabled */
2871                 RxFIFOEnabled = 1;
2872                 sDisRxFIFO(ChP);        /* disable it */
2873                 for (i = 0; i < 2000 / 200; i++)        /* delay 2 uS to allow proc to disable FIFO */
2874                         sInB(ChP->IntChan);     /* depends on bus i/o timing */
2875         }
2876         sGetChanStatus(ChP);    /* clear any pending Rx errors in chan stat */
2877         Ch = (Byte_t) sGetChanNum(ChP);
2878         sOutB(ChP->Cmd, Ch | RESRXFCNT);        /* apply reset Rx FIFO count */
2879         sOutB(ChP->Cmd, Ch);    /* remove reset Rx FIFO count */
2880         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2881         sOutW(ChP->IndexData, 0);
2882         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2883         sOutW(ChP->IndexData, 0);
2884         if (RxFIFOEnabled)
2885                 sEnRxFIFO(ChP); /* enable Rx FIFO */
2886 }
2887 
2888 /***************************************************************************
2889 Function: sFlushTxFIFO
2890 Purpose:  Flush the Tx FIFO
2891 Call:     sFlushTxFIFO(ChP)
2892           CHANNEL_T *ChP; Ptr to channel structure
2893 Return:   void
2894 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2895           while it is being flushed the receive processor is stopped
2896           and the transmitter is disabled.  After these operations a
2897           4 uS delay is done before clearing the pointers to allow
2898           the receive processor to stop.  These items are handled inside
2899           this function.
2900 Warnings: No context switches are allowed while executing this function.
2901 */
2902 static void sFlushTxFIFO(CHANNEL_T * ChP)
2903 {
2904         int i;
2905         Byte_t Ch;              /* channel number within AIOP */
2906         int TxEnabled;          /* 1 if transmitter enabled */
2907 
2908         if (sGetTxCnt(ChP) == 0)        /* Tx FIFO empty */
2909                 return;         /* don't need to flush */
2910 
2911         TxEnabled = 0;
2912         if (ChP->TxControl[3] & TX_ENABLE) {
2913                 TxEnabled = 1;
2914                 sDisTransmit(ChP);      /* disable transmitter */
2915         }
2916         sStopRxProcessor(ChP);  /* stop Rx processor */
2917         for (i = 0; i < 4000 / 200; i++)        /* delay 4 uS to allow proc to stop */
2918                 sInB(ChP->IntChan);     /* depends on bus i/o timing */
2919         Ch = (Byte_t) sGetChanNum(ChP);
2920         sOutB(ChP->Cmd, Ch | RESTXFCNT);        /* apply reset Tx FIFO count */
2921         sOutB(ChP->Cmd, Ch);    /* remove reset Tx FIFO count */
2922         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2923         sOutW(ChP->IndexData, 0);
2924         if (TxEnabled)
2925                 sEnTransmit(ChP);       /* enable transmitter */
2926         sStartRxProcessor(ChP); /* restart Rx processor */
2927 }
2928 
2929 /***************************************************************************
2930 Function: sWriteTxPrioByte
2931 Purpose:  Write a byte of priority transmit data to a channel
2932 Call:     sWriteTxPrioByte(ChP,Data)
2933           CHANNEL_T *ChP; Ptr to channel structure
2934           Byte_t Data; The transmit data byte
2935 
2936 Return:   int: 1 if the bytes is successfully written, otherwise 0.
2937 
2938 Comments: The priority byte is transmitted before any data in the Tx FIFO.
2939 
2940 Warnings: No context switches are allowed while executing this function.
2941 */
2942 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
2943 {
2944         Byte_t DWBuf[4];        /* buffer for double word writes */
2945         Word_t *WordPtr;        /* must be far because Win SS != DS */
2946         register DWordIO_t IndexAddr;
2947 
2948         if (sGetTxCnt(ChP) > 1) {       /* write it to Tx priority buffer */
2949                 IndexAddr = ChP->IndexAddr;
2950                 sOutW((WordIO_t) IndexAddr, ChP->TxPrioCnt);    /* get priority buffer status */
2951                 if (sInB((ByteIO_t) ChP->IndexData) & PRI_PEND) /* priority buffer busy */
2952                         return (0);     /* nothing sent */
2953 
2954                 WordPtr = (Word_t *) (&DWBuf[0]);
2955                 *WordPtr = ChP->TxPrioBuf;      /* data byte address */
2956 
2957                 DWBuf[2] = Data;        /* data byte value */
2958                 out32(IndexAddr, DWBuf);        /* write it out */
2959 
2960                 *WordPtr = ChP->TxPrioCnt;      /* Tx priority count address */
2961 
2962                 DWBuf[2] = PRI_PEND + 1;        /* indicate 1 byte pending */
2963                 DWBuf[3] = 0;   /* priority buffer pointer */
2964                 out32(IndexAddr, DWBuf);        /* write it out */
2965         } else {                /* write it to Tx FIFO */
2966 
2967                 sWriteTxByte(sGetTxRxDataIO(ChP), Data);
2968         }
2969         return (1);             /* 1 byte sent */
2970 }
2971 
2972 /***************************************************************************
2973 Function: sEnInterrupts
2974 Purpose:  Enable one or more interrupts for a channel
2975 Call:     sEnInterrupts(ChP,Flags)
2976           CHANNEL_T *ChP; Ptr to channel structure
2977           Word_t Flags: Interrupt enable flags, can be any combination
2978              of the following flags:
2979                 TXINT_EN:   Interrupt on Tx FIFO empty
2980                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
2981                             sSetRxTrigger())
2982                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
2983                 MCINT_EN:   Interrupt on modem input change
2984                 CHANINT_EN: Allow channel interrupt signal to the AIOP's
2985                             Interrupt Channel Register.
2986 Return:   void
2987 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
2988           enabled.  If an interrupt enable flag is not set in Flags, that
2989           interrupt will not be changed.  Interrupts can be disabled with
2990           function sDisInterrupts().
2991 
2992           This function sets the appropriate bit for the channel in the AIOP's
2993           Interrupt Mask Register if the CHANINT_EN flag is set.  This allows
2994           this channel's bit to be set in the AIOP's Interrupt Channel Register.
2995 
2996           Interrupts must also be globally enabled before channel interrupts
2997           will be passed on to the host.  This is done with function
2998           sEnGlobalInt().
2999 
3000           In some cases it may be desirable to disable interrupts globally but
3001           enable channel interrupts.  This would allow the global interrupt
3002           status register to be used to determine which AIOPs need service.
3003 */
3004 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
3005 {
3006         Byte_t Mask;            /* Interrupt Mask Register */
3007 
3008         ChP->RxControl[2] |=
3009             ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3010 
3011         out32(ChP->IndexAddr, ChP->RxControl);
3012 
3013         ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3014 
3015         out32(ChP->IndexAddr, ChP->TxControl);
3016 
3017         if (Flags & CHANINT_EN) {
3018                 Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
3019                 sOutB(ChP->IntMask, Mask);
3020         }
3021 }
3022 
3023 /***************************************************************************
3024 Function: sDisInterrupts
3025 Purpose:  Disable one or more interrupts for a channel
3026 Call:     sDisInterrupts(ChP,Flags)
3027           CHANNEL_T *ChP; Ptr to channel structure
3028           Word_t Flags: Interrupt flags, can be any combination
3029              of the following flags:
3030                 TXINT_EN:   Interrupt on Tx FIFO empty
3031                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3032                             sSetRxTrigger())
3033                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3034                 MCINT_EN:   Interrupt on modem input change
3035                 CHANINT_EN: Disable channel interrupt signal to the
3036                             AIOP's Interrupt Channel Register.
3037 Return:   void
3038 Comments: If an interrupt flag is set in Flags, that interrupt will be
3039           disabled.  If an interrupt flag is not set in Flags, that
3040           interrupt will not be changed.  Interrupts can be enabled with
3041           function sEnInterrupts().
3042 
3043           This function clears the appropriate bit for the channel in the AIOP's
3044           Interrupt Mask Register if the CHANINT_EN flag is set.  This blocks
3045           this channel's bit from being set in the AIOP's Interrupt Channel
3046           Register.
3047 */
3048 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
3049 {
3050         Byte_t Mask;            /* Interrupt Mask Register */
3051 
3052         ChP->RxControl[2] &=
3053             ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3054         out32(ChP->IndexAddr, ChP->RxControl);
3055         ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3056         out32(ChP->IndexAddr, ChP->TxControl);
3057 
3058         if (Flags & CHANINT_EN) {
3059                 Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
3060                 sOutB(ChP->IntMask, Mask);
3061         }
3062 }
3063 
3064 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3065 {
3066         sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum);
3067 }
3068 
3069 /*
3070  *  Not an official SSCI function, but how to reset RocketModems.
3071  *  ISA bus version
3072  */
3073 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on)
3074 {
3075         ByteIO_t addr;
3076         Byte_t val;
3077 
3078         addr = CtlP->AiopIO[0] + 0x400;
3079         val = sInB(CtlP->MReg3IO);
3080         /* if AIOP[1] is not enabled, enable it */
3081         if ((val & 2) == 0) {
3082                 val = sInB(CtlP->MReg2IO);
3083                 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03));
3084                 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6));
3085         }
3086 
3087         sEnAiop(CtlP, 1);
3088         if (!on)
3089                 addr += 8;
3090         sOutB(addr + chan, 0);  /* apply or remove reset */
3091         sDisAiop(CtlP, 1);
3092 }
3093 
3094 /*
3095  *  Not an official SSCI function, but how to reset RocketModems.
3096  *  PCI bus version
3097  */
3098 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on)
3099 {
3100         ByteIO_t addr;
3101 
3102         addr = CtlP->AiopIO[0] + 0x40;  /* 2nd AIOP */
3103         if (!on)
3104                 addr += 8;
3105         sOutB(addr + chan, 0);  /* apply or remove reset */
3106 }
3107 
3108 /*  Returns the line number given the controller (board), aiop and channel number */
3109 static unsigned char GetLineNumber(int ctrl, int aiop, int ch)
3110 {
3111         return lineNumbers[(ctrl << 5) | (aiop << 3) | ch];
3112 }
3113 
3114 /*
3115  *  Stores the line number associated with a given controller (board), aiop
3116  *  and channel number.  
3117  *  Returns:  The line number assigned 
3118  */
3119 static unsigned char SetLineNumber(int ctrl, int aiop, int ch)
3120 {
3121         lineNumbers[(ctrl << 5) | (aiop << 3) | ch] = nextLineNumber++;
3122         return (nextLineNumber - 1);
3123 }
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/tty/rocket.c

DEFINITIONS
