drivers/tty/serial/pmac

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This source file includes following definitions.
pmz_load_zsregs
pmz_maybe_update_regs
pmz_interrupt_control
pmz_receive_chars
pmz_status_handle
pmz_transmit_chars
pmz_interrupt
pmz_peek_status
pmz_tx_empty
pmz_set_mctrl
pmz_get_mctrl
pmz_stop_tx
pmz_start_tx
pmz_stop_rx
pmz_enable_ms
pmz_break_ctl
pmz_set_scc_power
pmz_set_scc_power
pmz_fix_zero_bug_scc
__pmz_startup
pmz_irda_reset
pmz_startup
pmz_shutdown
pmz_convert_to_zs
pmz_irda_setup
__pmz_set_termios
pmz_set_termios
pmz_type
pmz_release_port
pmz_request_port
pmz_config_port
pmz_verify_port
pmz_poll_get_char
pmz_poll_put_char
pmz_init_port
pmz_dispose_port
pmz_attach
pmz_detach
pmz_suspend
pmz_resume
pmz_probe
pmz_init_port
pmz_probe
pmz_dispose_port
pmz_attach
pmz_detach
pmz_register
init_pmz
exit_pmz
pmz_console_putchar
pmz_console_write
pmz_console_setup
pmz_console_init
   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Driver for PowerMac Z85c30 based ESCC cell found in the
   4  * "macio" ASICs of various PowerMac models
   5  * 
   6  * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
   7  *
   8  * Derived from drivers/macintosh/macserial.c by Paul Mackerras
   9  * and drivers/serial/sunzilog.c by David S. Miller
  10  *
  11  * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
  12  * adapted special tweaks needed for us. I don't think it's worth
  13  * merging back those though. The DMA code still has to get in
  14  * and once done, I expect that driver to remain fairly stable in
  15  * the long term, unless we change the driver model again...
  16  *
  17  * 2004-08-06 Harald Welte <laforge@gnumonks.org>
  18  *      - Enable BREAK interrupt
  19  *      - Add support for sysreq
  20  *
  21  * TODO:   - Add DMA support
  22  *         - Defer port shutdown to a few seconds after close
  23  *         - maybe put something right into uap->clk_divisor
  24  */
  25 
  26 #undef DEBUG
  27 #undef DEBUG_HARD
  28 #undef USE_CTRL_O_SYSRQ
  29 
  30 #include <linux/module.h>
  31 #include <linux/tty.h>
  32 
  33 #include <linux/tty_flip.h>
  34 #include <linux/major.h>
  35 #include <linux/string.h>
  36 #include <linux/fcntl.h>
  37 #include <linux/mm.h>
  38 #include <linux/kernel.h>
  39 #include <linux/delay.h>
  40 #include <linux/init.h>
  41 #include <linux/console.h>
  42 #include <linux/adb.h>
  43 #include <linux/pmu.h>
  44 #include <linux/bitops.h>
  45 #include <linux/sysrq.h>
  46 #include <linux/mutex.h>
  47 #include <linux/of_address.h>
  48 #include <linux/of_irq.h>
  49 #include <asm/sections.h>
  50 #include <asm/io.h>
  51 #include <asm/irq.h>
  52 
  53 #ifdef CONFIG_PPC_PMAC
  54 #include <asm/prom.h>
  55 #include <asm/machdep.h>
  56 #include <asm/pmac_feature.h>
  57 #include <asm/dbdma.h>
  58 #include <asm/macio.h>
  59 #else
  60 #include <linux/platform_device.h>
  61 #define of_machine_is_compatible(x) (0)
  62 #endif
  63 
  64 #if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  65 #define SUPPORT_SYSRQ
  66 #endif
  67 
  68 #include <linux/serial.h>
  69 #include <linux/serial_core.h>
  70 
  71 #include "pmac_zilog.h"
  72 
  73 /* Not yet implemented */
  74 #undef HAS_DBDMA
  75 
  76 static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
  77 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
  78 MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports.");
  79 MODULE_LICENSE("GPL");
  80 
  81 #ifdef CONFIG_SERIAL_PMACZILOG_TTYS
  82 #define PMACZILOG_MAJOR         TTY_MAJOR
  83 #define PMACZILOG_MINOR         64
  84 #define PMACZILOG_NAME          "ttyS"
  85 #else
  86 #define PMACZILOG_MAJOR         204
  87 #define PMACZILOG_MINOR         192
  88 #define PMACZILOG_NAME          "ttyPZ"
  89 #endif
  90 
  91 #define pmz_debug(fmt, arg...)  pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
  92 #define pmz_error(fmt, arg...)  pr_err("ttyPZ%d: " fmt, uap->port.line, ## arg)
  93 #define pmz_info(fmt, arg...)   pr_info("ttyPZ%d: " fmt, uap->port.line, ## arg)
  94 
  95 /*
  96  * For the sake of early serial console, we can do a pre-probe
  97  * (optional) of the ports at rather early boot time.
  98  */
  99 static struct uart_pmac_port    pmz_ports[MAX_ZS_PORTS];
 100 static int                      pmz_ports_count;
 101 
 102 static struct uart_driver pmz_uart_reg = {
 103         .owner          =       THIS_MODULE,
 104         .driver_name    =       PMACZILOG_NAME,
 105         .dev_name       =       PMACZILOG_NAME,
 106         .major          =       PMACZILOG_MAJOR,
 107         .minor          =       PMACZILOG_MINOR,
 108 };
 109 
 110 
 111 /* 
 112  * Load all registers to reprogram the port
 113  * This function must only be called when the TX is not busy.  The UART
 114  * port lock must be held and local interrupts disabled.
 115  */
 116 static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
 117 {
 118         int i;
 119 
 120         /* Let pending transmits finish.  */
 121         for (i = 0; i < 1000; i++) {
 122                 unsigned char stat = read_zsreg(uap, R1);
 123                 if (stat & ALL_SNT)
 124                         break;
 125                 udelay(100);
 126         }
 127 
 128         ZS_CLEARERR(uap);
 129         zssync(uap);
 130         ZS_CLEARFIFO(uap);
 131         zssync(uap);
 132         ZS_CLEARERR(uap);
 133 
 134         /* Disable all interrupts.  */
 135         write_zsreg(uap, R1,
 136                     regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
 137 
 138         /* Set parity, sync config, stop bits, and clock divisor.  */
 139         write_zsreg(uap, R4, regs[R4]);
 140 
 141         /* Set misc. TX/RX control bits.  */
 142         write_zsreg(uap, R10, regs[R10]);
 143 
 144         /* Set TX/RX controls sans the enable bits.  */
 145         write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
 146         write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
 147 
 148         /* now set R7 "prime" on ESCC */
 149         write_zsreg(uap, R15, regs[R15] | EN85C30);
 150         write_zsreg(uap, R7, regs[R7P]);
 151 
 152         /* make sure we use R7 "non-prime" on ESCC */
 153         write_zsreg(uap, R15, regs[R15] & ~EN85C30);
 154 
 155         /* Synchronous mode config.  */
 156         write_zsreg(uap, R6, regs[R6]);
 157         write_zsreg(uap, R7, regs[R7]);
 158 
 159         /* Disable baud generator.  */
 160         write_zsreg(uap, R14, regs[R14] & ~BRENAB);
 161 
 162         /* Clock mode control.  */
 163         write_zsreg(uap, R11, regs[R11]);
 164 
 165         /* Lower and upper byte of baud rate generator divisor.  */
 166         write_zsreg(uap, R12, regs[R12]);
 167         write_zsreg(uap, R13, regs[R13]);
 168         
 169         /* Now rewrite R14, with BRENAB (if set).  */
 170         write_zsreg(uap, R14, regs[R14]);
 171 
 172         /* Reset external status interrupts.  */
 173         write_zsreg(uap, R0, RES_EXT_INT);
 174         write_zsreg(uap, R0, RES_EXT_INT);
 175 
 176         /* Rewrite R3/R5, this time without enables masked.  */
 177         write_zsreg(uap, R3, regs[R3]);
 178         write_zsreg(uap, R5, regs[R5]);
 179 
 180         /* Rewrite R1, this time without IRQ enabled masked.  */
 181         write_zsreg(uap, R1, regs[R1]);
 182 
 183         /* Enable interrupts */
 184         write_zsreg(uap, R9, regs[R9]);
 185 }
 186 
 187 /* 
 188  * We do like sunzilog to avoid disrupting pending Tx
 189  * Reprogram the Zilog channel HW registers with the copies found in the
 190  * software state struct.  If the transmitter is busy, we defer this update
 191  * until the next TX complete interrupt.  Else, we do it right now.
 192  *
 193  * The UART port lock must be held and local interrupts disabled.
 194  */
 195 static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
 196 {
 197         if (!ZS_REGS_HELD(uap)) {
 198                 if (ZS_TX_ACTIVE(uap)) {
 199                         uap->flags |= PMACZILOG_FLAG_REGS_HELD;
 200                 } else {
 201                         pmz_debug("pmz: maybe_update_regs: updating\n");
 202                         pmz_load_zsregs(uap, uap->curregs);
 203                 }
 204         }
 205 }
 206 
 207 static void pmz_interrupt_control(struct uart_pmac_port *uap, int enable)
 208 {
 209         if (enable) {
 210                 uap->curregs[1] |= INT_ALL_Rx | TxINT_ENAB;
 211                 if (!ZS_IS_EXTCLK(uap))
 212                         uap->curregs[1] |= EXT_INT_ENAB;
 213         } else {
 214                 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
 215         }
 216         write_zsreg(uap, R1, uap->curregs[1]);
 217 }
 218 
 219 static bool pmz_receive_chars(struct uart_pmac_port *uap)
 220 {
 221         struct tty_port *port;
 222         unsigned char ch, r1, drop, flag;
 223         int loops = 0;
 224 
 225         /* Sanity check, make sure the old bug is no longer happening */
 226         if (uap->port.state == NULL) {
 227                 WARN_ON(1);
 228                 (void)read_zsdata(uap);
 229                 return false;
 230         }
 231         port = &uap->port.state->port;
 232 
 233         while (1) {
 234                 drop = 0;
 235 
 236                 r1 = read_zsreg(uap, R1);
 237                 ch = read_zsdata(uap);
 238 
 239                 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
 240                         write_zsreg(uap, R0, ERR_RES);
 241                         zssync(uap);
 242                 }
 243 
 244                 ch &= uap->parity_mask;
 245                 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
 246                         uap->flags &= ~PMACZILOG_FLAG_BREAK;
 247                 }
 248 
 249 #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
 250 #ifdef USE_CTRL_O_SYSRQ
 251                 /* Handle the SysRq ^O Hack */
 252                 if (ch == '\x0f') {
 253                         uap->port.sysrq = jiffies + HZ*5;
 254                         goto next_char;
 255                 }
 256 #endif /* USE_CTRL_O_SYSRQ */
 257                 if (uap->port.sysrq) {
 258                         int swallow;
 259                         spin_unlock(&uap->port.lock);
 260                         swallow = uart_handle_sysrq_char(&uap->port, ch);
 261                         spin_lock(&uap->port.lock);
 262                         if (swallow)
 263                                 goto next_char;
 264                 }
 265 #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
 266 
 267                 /* A real serial line, record the character and status.  */
 268                 if (drop)
 269                         goto next_char;
 270 
 271                 flag = TTY_NORMAL;
 272                 uap->port.icount.rx++;
 273 
 274                 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
 275                         if (r1 & BRK_ABRT) {
 276                                 pmz_debug("pmz: got break !\n");
 277                                 r1 &= ~(PAR_ERR | CRC_ERR);
 278                                 uap->port.icount.brk++;
 279                                 if (uart_handle_break(&uap->port))
 280                                         goto next_char;
 281                         }
 282                         else if (r1 & PAR_ERR)
 283                                 uap->port.icount.parity++;
 284                         else if (r1 & CRC_ERR)
 285                                 uap->port.icount.frame++;
 286                         if (r1 & Rx_OVR)
 287                                 uap->port.icount.overrun++;
 288                         r1 &= uap->port.read_status_mask;
 289                         if (r1 & BRK_ABRT)
 290                                 flag = TTY_BREAK;
 291                         else if (r1 & PAR_ERR)
 292                                 flag = TTY_PARITY;
 293                         else if (r1 & CRC_ERR)
 294                                 flag = TTY_FRAME;
 295                 }
 296 
 297                 if (uap->port.ignore_status_mask == 0xff ||
 298                     (r1 & uap->port.ignore_status_mask) == 0) {
 299                         tty_insert_flip_char(port, ch, flag);
 300                 }
 301                 if (r1 & Rx_OVR)
 302                         tty_insert_flip_char(port, 0, TTY_OVERRUN);
 303         next_char:
 304                 /* We can get stuck in an infinite loop getting char 0 when the
 305                  * line is in a wrong HW state, we break that here.
 306                  * When that happens, I disable the receive side of the driver.
 307                  * Note that what I've been experiencing is a real irq loop where
 308                  * I'm getting flooded regardless of the actual port speed.
 309                  * Something strange is going on with the HW
 310                  */
 311                 if ((++loops) > 1000)
 312                         goto flood;
 313                 ch = read_zsreg(uap, R0);
 314                 if (!(ch & Rx_CH_AV))
 315                         break;
 316         }
 317 
 318         return true;
 319  flood:
 320         pmz_interrupt_control(uap, 0);
 321         pmz_error("pmz: rx irq flood !\n");
 322         return true;
 323 }
 324 
 325 static void pmz_status_handle(struct uart_pmac_port *uap)
 326 {
 327         unsigned char status;
 328 
 329         status = read_zsreg(uap, R0);
 330         write_zsreg(uap, R0, RES_EXT_INT);
 331         zssync(uap);
 332 
 333         if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
 334                 if (status & SYNC_HUNT)
 335                         uap->port.icount.dsr++;
 336 
 337                 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
 338                  * But it does not tell us which bit has changed, we have to keep
 339                  * track of this ourselves.
 340                  * The CTS input is inverted for some reason.  -- paulus
 341                  */
 342                 if ((status ^ uap->prev_status) & DCD)
 343                         uart_handle_dcd_change(&uap->port,
 344                                                (status & DCD));
 345                 if ((status ^ uap->prev_status) & CTS)
 346                         uart_handle_cts_change(&uap->port,
 347                                                !(status & CTS));
 348 
 349                 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
 350         }
 351 
 352         if (status & BRK_ABRT)
 353                 uap->flags |= PMACZILOG_FLAG_BREAK;
 354 
 355         uap->prev_status = status;
 356 }
 357 
 358 static void pmz_transmit_chars(struct uart_pmac_port *uap)
 359 {
 360         struct circ_buf *xmit;
 361 
 362         if (ZS_IS_CONS(uap)) {
 363                 unsigned char status = read_zsreg(uap, R0);
 364 
 365                 /* TX still busy?  Just wait for the next TX done interrupt.
 366                  *
 367                  * It can occur because of how we do serial console writes.  It would
 368                  * be nice to transmit console writes just like we normally would for
 369                  * a TTY line. (ie. buffered and TX interrupt driven).  That is not
 370                  * easy because console writes cannot sleep.  One solution might be
 371                  * to poll on enough port->xmit space becoming free.  -DaveM
 372                  */
 373                 if (!(status & Tx_BUF_EMP))
 374                         return;
 375         }
 376 
 377         uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
 378 
 379         if (ZS_REGS_HELD(uap)) {
 380                 pmz_load_zsregs(uap, uap->curregs);
 381                 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
 382         }
 383 
 384         if (ZS_TX_STOPPED(uap)) {
 385                 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
 386                 goto ack_tx_int;
 387         }
 388 
 389         /* Under some circumstances, we see interrupts reported for
 390          * a closed channel. The interrupt mask in R1 is clear, but
 391          * R3 still signals the interrupts and we see them when taking
 392          * an interrupt for the other channel (this could be a qemu
 393          * bug but since the ESCC doc doesn't specify precsiely whether
 394          * R3 interrup status bits are masked by R1 interrupt enable
 395          * bits, better safe than sorry). --BenH.
 396          */
 397         if (!ZS_IS_OPEN(uap))
 398                 goto ack_tx_int;
 399 
 400         if (uap->port.x_char) {
 401                 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
 402                 write_zsdata(uap, uap->port.x_char);
 403                 zssync(uap);
 404                 uap->port.icount.tx++;
 405                 uap->port.x_char = 0;
 406                 return;
 407         }
 408 
 409         if (uap->port.state == NULL)
 410                 goto ack_tx_int;
 411         xmit = &uap->port.state->xmit;
 412         if (uart_circ_empty(xmit)) {
 413                 uart_write_wakeup(&uap->port);
 414                 goto ack_tx_int;
 415         }
 416         if (uart_tx_stopped(&uap->port))
 417                 goto ack_tx_int;
 418 
 419         uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
 420         write_zsdata(uap, xmit->buf[xmit->tail]);
 421         zssync(uap);
 422 
 423         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 424         uap->port.icount.tx++;
 425 
 426         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 427                 uart_write_wakeup(&uap->port);
 428 
 429         return;
 430 
 431 ack_tx_int:
 432         write_zsreg(uap, R0, RES_Tx_P);
 433         zssync(uap);
 434 }
 435 
 436 /* Hrm... we register that twice, fixme later.... */
 437 static irqreturn_t pmz_interrupt(int irq, void *dev_id)
 438 {
 439         struct uart_pmac_port *uap = dev_id;
 440         struct uart_pmac_port *uap_a;
 441         struct uart_pmac_port *uap_b;
 442         int rc = IRQ_NONE;
 443         bool push;
 444         u8 r3;
 445 
 446         uap_a = pmz_get_port_A(uap);
 447         uap_b = uap_a->mate;
 448 
 449         spin_lock(&uap_a->port.lock);
 450         r3 = read_zsreg(uap_a, R3);
 451 
 452 #ifdef DEBUG_HARD
 453         pmz_debug("irq, r3: %x\n", r3);
 454 #endif
 455         /* Channel A */
 456         push = false;
 457         if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
 458                 if (!ZS_IS_OPEN(uap_a)) {
 459                         pmz_debug("ChanA interrupt while not open !\n");
 460                         goto skip_a;
 461                 }
 462                 write_zsreg(uap_a, R0, RES_H_IUS);
 463                 zssync(uap_a);          
 464                 if (r3 & CHAEXT)
 465                         pmz_status_handle(uap_a);
 466                 if (r3 & CHARxIP)
 467                         push = pmz_receive_chars(uap_a);
 468                 if (r3 & CHATxIP)
 469                         pmz_transmit_chars(uap_a);
 470                 rc = IRQ_HANDLED;
 471         }
 472  skip_a:
 473         spin_unlock(&uap_a->port.lock);
 474         if (push)
 475                 tty_flip_buffer_push(&uap->port.state->port);
 476 
 477         if (!uap_b)
 478                 goto out;
 479 
 480         spin_lock(&uap_b->port.lock);
 481         push = false;
 482         if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
 483                 if (!ZS_IS_OPEN(uap_b)) {
 484                         pmz_debug("ChanB interrupt while not open !\n");
 485                         goto skip_b;
 486                 }
 487                 write_zsreg(uap_b, R0, RES_H_IUS);
 488                 zssync(uap_b);
 489                 if (r3 & CHBEXT)
 490                         pmz_status_handle(uap_b);
 491                 if (r3 & CHBRxIP)
 492                         push = pmz_receive_chars(uap_b);
 493                 if (r3 & CHBTxIP)
 494                         pmz_transmit_chars(uap_b);
 495                 rc = IRQ_HANDLED;
 496         }
 497  skip_b:
 498         spin_unlock(&uap_b->port.lock);
 499         if (push)
 500                 tty_flip_buffer_push(&uap->port.state->port);
 501 
 502  out:
 503         return rc;
 504 }
 505 
 506 /*
 507  * Peek the status register, lock not held by caller
 508  */
 509 static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
 510 {
 511         unsigned long flags;
 512         u8 status;
 513         
 514         spin_lock_irqsave(&uap->port.lock, flags);
 515         status = read_zsreg(uap, R0);
 516         spin_unlock_irqrestore(&uap->port.lock, flags);
 517 
 518         return status;
 519 }
 520 
 521 /* 
 522  * Check if transmitter is empty
 523  * The port lock is not held.
 524  */
 525 static unsigned int pmz_tx_empty(struct uart_port *port)
 526 {
 527         unsigned char status;
 528 
 529         status = pmz_peek_status(to_pmz(port));
 530         if (status & Tx_BUF_EMP)
 531                 return TIOCSER_TEMT;
 532         return 0;
 533 }
 534 
 535 /* 
 536  * Set Modem Control (RTS & DTR) bits
 537  * The port lock is held and interrupts are disabled.
 538  * Note: Shall we really filter out RTS on external ports or
 539  * should that be dealt at higher level only ?
 540  */
 541 static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
 542 {
 543         struct uart_pmac_port *uap = to_pmz(port);
 544         unsigned char set_bits, clear_bits;
 545 
 546         /* Do nothing for irda for now... */
 547         if (ZS_IS_IRDA(uap))
 548                 return;
 549         /* We get called during boot with a port not up yet */
 550         if (!(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
 551                 return;
 552 
 553         set_bits = clear_bits = 0;
 554 
 555         if (ZS_IS_INTMODEM(uap)) {
 556                 if (mctrl & TIOCM_RTS)
 557                         set_bits |= RTS;
 558                 else
 559                         clear_bits |= RTS;
 560         }
 561         if (mctrl & TIOCM_DTR)
 562                 set_bits |= DTR;
 563         else
 564                 clear_bits |= DTR;
 565 
 566         /* NOTE: Not subject to 'transmitter active' rule.  */ 
 567         uap->curregs[R5] |= set_bits;
 568         uap->curregs[R5] &= ~clear_bits;
 569 
 570         write_zsreg(uap, R5, uap->curregs[R5]);
 571         pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
 572                   set_bits, clear_bits, uap->curregs[R5]);
 573         zssync(uap);
 574 }
 575 
 576 /* 
 577  * Get Modem Control bits (only the input ones, the core will
 578  * or that with a cached value of the control ones)
 579  * The port lock is held and interrupts are disabled.
 580  */
 581 static unsigned int pmz_get_mctrl(struct uart_port *port)
 582 {
 583         struct uart_pmac_port *uap = to_pmz(port);
 584         unsigned char status;
 585         unsigned int ret;
 586 
 587         status = read_zsreg(uap, R0);
 588 
 589         ret = 0;
 590         if (status & DCD)
 591                 ret |= TIOCM_CAR;
 592         if (status & SYNC_HUNT)
 593                 ret |= TIOCM_DSR;
 594         if (!(status & CTS))
 595                 ret |= TIOCM_CTS;
 596 
 597         return ret;
 598 }
 599 
 600 /* 
 601  * Stop TX side. Dealt like sunzilog at next Tx interrupt,
 602  * though for DMA, we will have to do a bit more.
 603  * The port lock is held and interrupts are disabled.
 604  */
 605 static void pmz_stop_tx(struct uart_port *port)
 606 {
 607         to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
 608 }
 609 
 610 /* 
 611  * Kick the Tx side.
 612  * The port lock is held and interrupts are disabled.
 613  */
 614 static void pmz_start_tx(struct uart_port *port)
 615 {
 616         struct uart_pmac_port *uap = to_pmz(port);
 617         unsigned char status;
 618 
 619         pmz_debug("pmz: start_tx()\n");
 620 
 621         uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
 622         uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
 623 
 624         status = read_zsreg(uap, R0);
 625 
 626         /* TX busy?  Just wait for the TX done interrupt.  */
 627         if (!(status & Tx_BUF_EMP))
 628                 return;
 629 
 630         /* Send the first character to jump-start the TX done
 631          * IRQ sending engine.
 632          */
 633         if (port->x_char) {
 634                 write_zsdata(uap, port->x_char);
 635                 zssync(uap);
 636                 port->icount.tx++;
 637                 port->x_char = 0;
 638         } else {
 639                 struct circ_buf *xmit = &port->state->xmit;
 640 
 641                 if (uart_circ_empty(xmit))
 642                         goto out;
 643                 write_zsdata(uap, xmit->buf[xmit->tail]);
 644                 zssync(uap);
 645                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 646                 port->icount.tx++;
 647 
 648                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 649                         uart_write_wakeup(&uap->port);
 650         }
 651  out:
 652         pmz_debug("pmz: start_tx() done.\n");
 653 }
 654 
 655 /* 
 656  * Stop Rx side, basically disable emitting of
 657  * Rx interrupts on the port. We don't disable the rx
 658  * side of the chip proper though
 659  * The port lock is held.
 660  */
 661 static void pmz_stop_rx(struct uart_port *port)
 662 {
 663         struct uart_pmac_port *uap = to_pmz(port);
 664 
 665         pmz_debug("pmz: stop_rx()()\n");
 666 
 667         /* Disable all RX interrupts.  */
 668         uap->curregs[R1] &= ~RxINT_MASK;
 669         pmz_maybe_update_regs(uap);
 670 
 671         pmz_debug("pmz: stop_rx() done.\n");
 672 }
 673 
 674 /* 
 675  * Enable modem status change interrupts
 676  * The port lock is held.
 677  */
 678 static void pmz_enable_ms(struct uart_port *port)
 679 {
 680         struct uart_pmac_port *uap = to_pmz(port);
 681         unsigned char new_reg;
 682 
 683         if (ZS_IS_IRDA(uap))
 684                 return;
 685         new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
 686         if (new_reg != uap->curregs[R15]) {
 687                 uap->curregs[R15] = new_reg;
 688 
 689                 /* NOTE: Not subject to 'transmitter active' rule. */
 690                 write_zsreg(uap, R15, uap->curregs[R15]);
 691         }
 692 }
 693 
 694 /* 
 695  * Control break state emission
 696  * The port lock is not held.
 697  */
 698 static void pmz_break_ctl(struct uart_port *port, int break_state)
 699 {
 700         struct uart_pmac_port *uap = to_pmz(port);
 701         unsigned char set_bits, clear_bits, new_reg;
 702         unsigned long flags;
 703 
 704         set_bits = clear_bits = 0;
 705 
 706         if (break_state)
 707                 set_bits |= SND_BRK;
 708         else
 709                 clear_bits |= SND_BRK;
 710 
 711         spin_lock_irqsave(&port->lock, flags);
 712 
 713         new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
 714         if (new_reg != uap->curregs[R5]) {
 715                 uap->curregs[R5] = new_reg;
 716                 write_zsreg(uap, R5, uap->curregs[R5]);
 717         }
 718 
 719         spin_unlock_irqrestore(&port->lock, flags);
 720 }
 721 
 722 #ifdef CONFIG_PPC_PMAC
 723 
 724 /*
 725  * Turn power on or off to the SCC and associated stuff
 726  * (port drivers, modem, IR port, etc.)
 727  * Returns the number of milliseconds we should wait before
 728  * trying to use the port.
 729  */
 730 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
 731 {
 732         int delay = 0;
 733         int rc;
 734 
 735         if (state) {
 736                 rc = pmac_call_feature(
 737                         PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
 738                 pmz_debug("port power on result: %d\n", rc);
 739                 if (ZS_IS_INTMODEM(uap)) {
 740                         rc = pmac_call_feature(
 741                                 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
 742                         delay = 2500;   /* wait for 2.5s before using */
 743                         pmz_debug("modem power result: %d\n", rc);
 744                 }
 745         } else {
 746                 /* TODO: Make that depend on a timer, don't power down
 747                  * immediately
 748                  */
 749                 if (ZS_IS_INTMODEM(uap)) {
 750                         rc = pmac_call_feature(
 751                                 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
 752                         pmz_debug("port power off result: %d\n", rc);
 753                 }
 754                 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
 755         }
 756         return delay;
 757 }
 758 
 759 #else
 760 
 761 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
 762 {
 763         return 0;
 764 }
 765 
 766 #endif /* !CONFIG_PPC_PMAC */
 767 
 768 /*
 769  * FixZeroBug....Works around a bug in the SCC receiving channel.
 770  * Inspired from Darwin code, 15 Sept. 2000  -DanM
 771  *
 772  * The following sequence prevents a problem that is seen with O'Hare ASICs
 773  * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
 774  * at the input to the receiver becomes 'stuck' and locks up the receiver.
 775  * This problem can occur as a result of a zero bit at the receiver input
 776  * coincident with any of the following events:
 777  *
 778  *      The SCC is initialized (hardware or software).
 779  *      A framing error is detected.
 780  *      The clocking option changes from synchronous or X1 asynchronous
 781  *              clocking to X16, X32, or X64 asynchronous clocking.
 782  *      The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
 783  *
 784  * This workaround attempts to recover from the lockup condition by placing
 785  * the SCC in synchronous loopback mode with a fast clock before programming
 786  * any of the asynchronous modes.
 787  */
 788 static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
 789 {
 790         write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
 791         zssync(uap);
 792         udelay(10);
 793         write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
 794         zssync(uap);
 795 
 796         write_zsreg(uap, 4, X1CLK | MONSYNC);
 797         write_zsreg(uap, 3, Rx8);
 798         write_zsreg(uap, 5, Tx8 | RTS);
 799         write_zsreg(uap, 9, NV);        /* Didn't we already do this? */
 800         write_zsreg(uap, 11, RCBR | TCBR);
 801         write_zsreg(uap, 12, 0);
 802         write_zsreg(uap, 13, 0);
 803         write_zsreg(uap, 14, (LOOPBAK | BRSRC));
 804         write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
 805         write_zsreg(uap, 3, Rx8 | RxENABLE);
 806         write_zsreg(uap, 0, RES_EXT_INT);
 807         write_zsreg(uap, 0, RES_EXT_INT);
 808         write_zsreg(uap, 0, RES_EXT_INT);       /* to kill some time */
 809 
 810         /* The channel should be OK now, but it is probably receiving
 811          * loopback garbage.
 812          * Switch to asynchronous mode, disable the receiver,
 813          * and discard everything in the receive buffer.
 814          */
 815         write_zsreg(uap, 9, NV);
 816         write_zsreg(uap, 4, X16CLK | SB_MASK);
 817         write_zsreg(uap, 3, Rx8);
 818 
 819         while (read_zsreg(uap, 0) & Rx_CH_AV) {
 820                 (void)read_zsreg(uap, 8);
 821                 write_zsreg(uap, 0, RES_EXT_INT);
 822                 write_zsreg(uap, 0, ERR_RES);
 823         }
 824 }
 825 
 826 /*
 827  * Real startup routine, powers up the hardware and sets up
 828  * the SCC. Returns a delay in ms where you need to wait before
 829  * actually using the port, this is typically the internal modem
 830  * powerup delay. This routine expect the lock to be taken.
 831  */
 832 static int __pmz_startup(struct uart_pmac_port *uap)
 833 {
 834         int pwr_delay = 0;
 835 
 836         memset(&uap->curregs, 0, sizeof(uap->curregs));
 837 
 838         /* Power up the SCC & underlying hardware (modem/irda) */
 839         pwr_delay = pmz_set_scc_power(uap, 1);
 840 
 841         /* Nice buggy HW ... */
 842         pmz_fix_zero_bug_scc(uap);
 843 
 844         /* Reset the channel */
 845         uap->curregs[R9] = 0;
 846         write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
 847         zssync(uap);
 848         udelay(10);
 849         write_zsreg(uap, 9, 0);
 850         zssync(uap);
 851 
 852         /* Clear the interrupt registers */
 853         write_zsreg(uap, R1, 0);
 854         write_zsreg(uap, R0, ERR_RES);
 855         write_zsreg(uap, R0, ERR_RES);
 856         write_zsreg(uap, R0, RES_H_IUS);
 857         write_zsreg(uap, R0, RES_H_IUS);
 858 
 859         /* Setup some valid baud rate */
 860         uap->curregs[R4] = X16CLK | SB1;
 861         uap->curregs[R3] = Rx8;
 862         uap->curregs[R5] = Tx8 | RTS;
 863         if (!ZS_IS_IRDA(uap))
 864                 uap->curregs[R5] |= DTR;
 865         uap->curregs[R12] = 0;
 866         uap->curregs[R13] = 0;
 867         uap->curregs[R14] = BRENAB;
 868 
 869         /* Clear handshaking, enable BREAK interrupts */
 870         uap->curregs[R15] = BRKIE;
 871 
 872         /* Master interrupt enable */
 873         uap->curregs[R9] |= NV | MIE;
 874 
 875         pmz_load_zsregs(uap, uap->curregs);
 876 
 877         /* Enable receiver and transmitter.  */
 878         write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
 879         write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
 880 
 881         /* Remember status for DCD/CTS changes */
 882         uap->prev_status = read_zsreg(uap, R0);
 883 
 884         return pwr_delay;
 885 }
 886 
 887 static void pmz_irda_reset(struct uart_pmac_port *uap)
 888 {
 889         unsigned long flags;
 890 
 891         spin_lock_irqsave(&uap->port.lock, flags);
 892         uap->curregs[R5] |= DTR;
 893         write_zsreg(uap, R5, uap->curregs[R5]);
 894         zssync(uap);
 895         spin_unlock_irqrestore(&uap->port.lock, flags);
 896         msleep(110);
 897 
 898         spin_lock_irqsave(&uap->port.lock, flags);
 899         uap->curregs[R5] &= ~DTR;
 900         write_zsreg(uap, R5, uap->curregs[R5]);
 901         zssync(uap);
 902         spin_unlock_irqrestore(&uap->port.lock, flags);
 903         msleep(10);
 904 }
 905 
 906 /*
 907  * This is the "normal" startup routine, using the above one
 908  * wrapped with the lock and doing a schedule delay
 909  */
 910 static int pmz_startup(struct uart_port *port)
 911 {
 912         struct uart_pmac_port *uap = to_pmz(port);
 913         unsigned long flags;
 914         int pwr_delay = 0;
 915 
 916         pmz_debug("pmz: startup()\n");
 917 
 918         uap->flags |= PMACZILOG_FLAG_IS_OPEN;
 919 
 920         /* A console is never powered down. Else, power up and
 921          * initialize the chip
 922          */
 923         if (!ZS_IS_CONS(uap)) {
 924                 spin_lock_irqsave(&port->lock, flags);
 925                 pwr_delay = __pmz_startup(uap);
 926                 spin_unlock_irqrestore(&port->lock, flags);
 927         }       
 928         sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line);
 929         if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,
 930                         uap->irq_name, uap)) {
 931                 pmz_error("Unable to register zs interrupt handler.\n");
 932                 pmz_set_scc_power(uap, 0);
 933                 return -ENXIO;
 934         }
 935 
 936         /* Right now, we deal with delay by blocking here, I'll be
 937          * smarter later on
 938          */
 939         if (pwr_delay != 0) {
 940                 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
 941                 msleep(pwr_delay);
 942         }
 943 
 944         /* IrDA reset is done now */
 945         if (ZS_IS_IRDA(uap))
 946                 pmz_irda_reset(uap);
 947 
 948         /* Enable interrupt requests for the channel */
 949         spin_lock_irqsave(&port->lock, flags);
 950         pmz_interrupt_control(uap, 1);
 951         spin_unlock_irqrestore(&port->lock, flags);
 952 
 953         pmz_debug("pmz: startup() done.\n");
 954 
 955         return 0;
 956 }
 957 
 958 static void pmz_shutdown(struct uart_port *port)
 959 {
 960         struct uart_pmac_port *uap = to_pmz(port);
 961         unsigned long flags;
 962 
 963         pmz_debug("pmz: shutdown()\n");
 964 
 965         spin_lock_irqsave(&port->lock, flags);
 966 
 967         /* Disable interrupt requests for the channel */
 968         pmz_interrupt_control(uap, 0);
 969 
 970         if (!ZS_IS_CONS(uap)) {
 971                 /* Disable receiver and transmitter */
 972                 uap->curregs[R3] &= ~RxENABLE;
 973                 uap->curregs[R5] &= ~TxENABLE;
 974 
 975                 /* Disable break assertion */
 976                 uap->curregs[R5] &= ~SND_BRK;
 977                 pmz_maybe_update_regs(uap);
 978         }
 979 
 980         spin_unlock_irqrestore(&port->lock, flags);
 981 
 982         /* Release interrupt handler */
 983         free_irq(uap->port.irq, uap);
 984 
 985         spin_lock_irqsave(&port->lock, flags);
 986 
 987         uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
 988 
 989         if (!ZS_IS_CONS(uap))
 990                 pmz_set_scc_power(uap, 0);      /* Shut the chip down */
 991 
 992         spin_unlock_irqrestore(&port->lock, flags);
 993 
 994         pmz_debug("pmz: shutdown() done.\n");
 995 }
 996 
 997 /* Shared by TTY driver and serial console setup.  The port lock is held
 998  * and local interrupts are disabled.
 999  */
1000 static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1001                               unsigned int iflag, unsigned long baud)
1002 {
1003         int brg;
1004 
1005         /* Switch to external clocking for IrDA high clock rates. That
1006          * code could be re-used for Midi interfaces with different
1007          * multipliers
1008          */
1009         if (baud >= 115200 && ZS_IS_IRDA(uap)) {
1010                 uap->curregs[R4] = X1CLK;
1011                 uap->curregs[R11] = RCTRxCP | TCTRxCP;
1012                 uap->curregs[R14] = 0; /* BRG off */
1013                 uap->curregs[R12] = 0;
1014                 uap->curregs[R13] = 0;
1015                 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
1016         } else {
1017                 switch (baud) {
1018                 case ZS_CLOCK/16:       /* 230400 */
1019                         uap->curregs[R4] = X16CLK;
1020                         uap->curregs[R11] = 0;
1021                         uap->curregs[R14] = 0;
1022                         break;
1023                 case ZS_CLOCK/32:       /* 115200 */
1024                         uap->curregs[R4] = X32CLK;
1025                         uap->curregs[R11] = 0;
1026                         uap->curregs[R14] = 0;
1027                         break;
1028                 default:
1029                         uap->curregs[R4] = X16CLK;
1030                         uap->curregs[R11] = TCBR | RCBR;
1031                         brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
1032                         uap->curregs[R12] = (brg & 255);
1033                         uap->curregs[R13] = ((brg >> 8) & 255);
1034                         uap->curregs[R14] = BRENAB;
1035                 }
1036                 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
1037         }
1038 
1039         /* Character size, stop bits, and parity. */
1040         uap->curregs[3] &= ~RxN_MASK;
1041         uap->curregs[5] &= ~TxN_MASK;
1042 
1043         switch (cflag & CSIZE) {
1044         case CS5:
1045                 uap->curregs[3] |= Rx5;
1046                 uap->curregs[5] |= Tx5;
1047                 uap->parity_mask = 0x1f;
1048                 break;
1049         case CS6:
1050                 uap->curregs[3] |= Rx6;
1051                 uap->curregs[5] |= Tx6;
1052                 uap->parity_mask = 0x3f;
1053                 break;
1054         case CS7:
1055                 uap->curregs[3] |= Rx7;
1056                 uap->curregs[5] |= Tx7;
1057                 uap->parity_mask = 0x7f;
1058                 break;
1059         case CS8:
1060         default:
1061                 uap->curregs[3] |= Rx8;
1062                 uap->curregs[5] |= Tx8;
1063                 uap->parity_mask = 0xff;
1064                 break;
1065         }
1066         uap->curregs[4] &= ~(SB_MASK);
1067         if (cflag & CSTOPB)
1068                 uap->curregs[4] |= SB2;
1069         else
1070                 uap->curregs[4] |= SB1;
1071         if (cflag & PARENB)
1072                 uap->curregs[4] |= PAR_ENAB;
1073         else
1074                 uap->curregs[4] &= ~PAR_ENAB;
1075         if (!(cflag & PARODD))
1076                 uap->curregs[4] |= PAR_EVEN;
1077         else
1078                 uap->curregs[4] &= ~PAR_EVEN;
1079 
1080         uap->port.read_status_mask = Rx_OVR;
1081         if (iflag & INPCK)
1082                 uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
1083         if (iflag & (IGNBRK | BRKINT | PARMRK))
1084                 uap->port.read_status_mask |= BRK_ABRT;
1085 
1086         uap->port.ignore_status_mask = 0;
1087         if (iflag & IGNPAR)
1088                 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
1089         if (iflag & IGNBRK) {
1090                 uap->port.ignore_status_mask |= BRK_ABRT;
1091                 if (iflag & IGNPAR)
1092                         uap->port.ignore_status_mask |= Rx_OVR;
1093         }
1094 
1095         if ((cflag & CREAD) == 0)
1096                 uap->port.ignore_status_mask = 0xff;
1097 }
1098 
1099 
1100 /*
1101  * Set the irda codec on the imac to the specified baud rate.
1102  */
1103 static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1104 {
1105         u8 cmdbyte;
1106         int t, version;
1107 
1108         switch (*baud) {
1109         /* SIR modes */
1110         case 2400:
1111                 cmdbyte = 0x53;
1112                 break;
1113         case 4800:
1114                 cmdbyte = 0x52;
1115                 break;
1116         case 9600:
1117                 cmdbyte = 0x51;
1118                 break;
1119         case 19200:
1120                 cmdbyte = 0x50;
1121                 break;
1122         case 38400:
1123                 cmdbyte = 0x4f;
1124                 break;
1125         case 57600:
1126                 cmdbyte = 0x4e;
1127                 break;
1128         case 115200:
1129                 cmdbyte = 0x4d;
1130                 break;
1131         /* The FIR modes aren't really supported at this point, how
1132          * do we select the speed ? via the FCR on KeyLargo ?
1133          */
1134         case 1152000:
1135                 cmdbyte = 0;
1136                 break;
1137         case 4000000:
1138                 cmdbyte = 0;
1139                 break;
1140         default: /* 9600 */
1141                 cmdbyte = 0x51;
1142                 *baud = 9600;
1143                 break;
1144         }
1145 
1146         /* Wait for transmitter to drain */
1147         t = 10000;
1148         while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1149                || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1150                 if (--t <= 0) {
1151                         pmz_error("transmitter didn't drain\n");
1152                         return;
1153                 }
1154                 udelay(10);
1155         }
1156 
1157         /* Drain the receiver too */
1158         t = 100;
1159         (void)read_zsdata(uap);
1160         (void)read_zsdata(uap);
1161         (void)read_zsdata(uap);
1162         mdelay(10);
1163         while (read_zsreg(uap, R0) & Rx_CH_AV) {
1164                 read_zsdata(uap);
1165                 mdelay(10);
1166                 if (--t <= 0) {
1167                         pmz_error("receiver didn't drain\n");
1168                         return;
1169                 }
1170         }
1171 
1172         /* Switch to command mode */
1173         uap->curregs[R5] |= DTR;
1174         write_zsreg(uap, R5, uap->curregs[R5]);
1175         zssync(uap);
1176         mdelay(1);
1177 
1178         /* Switch SCC to 19200 */
1179         pmz_convert_to_zs(uap, CS8, 0, 19200);          
1180         pmz_load_zsregs(uap, uap->curregs);
1181         mdelay(1);
1182 
1183         /* Write get_version command byte */
1184         write_zsdata(uap, 1);
1185         t = 5000;
1186         while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1187                 if (--t <= 0) {
1188                         pmz_error("irda_setup timed out on get_version byte\n");
1189                         goto out;
1190                 }
1191                 udelay(10);
1192         }
1193         version = read_zsdata(uap);
1194 
1195         if (version < 4) {
1196                 pmz_info("IrDA: dongle version %d not supported\n", version);
1197                 goto out;
1198         }
1199 
1200         /* Send speed mode */
1201         write_zsdata(uap, cmdbyte);
1202         t = 5000;
1203         while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1204                 if (--t <= 0) {
1205                         pmz_error("irda_setup timed out on speed mode byte\n");
1206                         goto out;
1207                 }
1208                 udelay(10);
1209         }
1210         t = read_zsdata(uap);
1211         if (t != cmdbyte)
1212                 pmz_error("irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1213 
1214         pmz_info("IrDA setup for %ld bps, dongle version: %d\n",
1215                  *baud, version);
1216 
1217         (void)read_zsdata(uap);
1218         (void)read_zsdata(uap);
1219         (void)read_zsdata(uap);
1220 
1221  out:
1222         /* Switch back to data mode */
1223         uap->curregs[R5] &= ~DTR;
1224         write_zsreg(uap, R5, uap->curregs[R5]);
1225         zssync(uap);
1226 
1227         (void)read_zsdata(uap);
1228         (void)read_zsdata(uap);
1229         (void)read_zsdata(uap);
1230 }
1231 
1232 
1233 static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1234                               struct ktermios *old)
1235 {
1236         struct uart_pmac_port *uap = to_pmz(port);
1237         unsigned long baud;
1238 
1239         pmz_debug("pmz: set_termios()\n");
1240 
1241         memcpy(&uap->termios_cache, termios, sizeof(struct ktermios));
1242 
1243         /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1244          * on the IR dongle. Note that the IRTTY driver currently doesn't know
1245          * about the FIR mode and high speed modes. So these are unused. For
1246          * implementing proper support for these, we should probably add some
1247          * DMA as well, at least on the Rx side, which isn't a simple thing
1248          * at this point.
1249          */
1250         if (ZS_IS_IRDA(uap)) {
1251                 /* Calc baud rate */
1252                 baud = uart_get_baud_rate(port, termios, old, 1200, 4000000);
1253                 pmz_debug("pmz: switch IRDA to %ld bauds\n", baud);
1254                 /* Cet the irda codec to the right rate */
1255                 pmz_irda_setup(uap, &baud);
1256                 /* Set final baud rate */
1257                 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1258                 pmz_load_zsregs(uap, uap->curregs);
1259                 zssync(uap);
1260         } else {
1261                 baud = uart_get_baud_rate(port, termios, old, 1200, 230400);
1262                 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1263                 /* Make sure modem status interrupts are correctly configured */
1264                 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) {
1265                         uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
1266                         uap->flags |= PMACZILOG_FLAG_MODEM_STATUS;
1267                 } else {
1268                         uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
1269                         uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS;
1270                 }
1271 
1272                 /* Load registers to the chip */
1273                 pmz_maybe_update_regs(uap);
1274         }
1275         uart_update_timeout(port, termios->c_cflag, baud);
1276 
1277         pmz_debug("pmz: set_termios() done.\n");
1278 }
1279 
1280 /* The port lock is not held.  */
1281 static void pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1282                             struct ktermios *old)
1283 {
1284         struct uart_pmac_port *uap = to_pmz(port);
1285         unsigned long flags;
1286 
1287         spin_lock_irqsave(&port->lock, flags);  
1288 
1289         /* Disable IRQs on the port */
1290         pmz_interrupt_control(uap, 0);
1291 
1292         /* Setup new port configuration */
1293         __pmz_set_termios(port, termios, old);
1294 
1295         /* Re-enable IRQs on the port */
1296         if (ZS_IS_OPEN(uap))
1297                 pmz_interrupt_control(uap, 1);
1298 
1299         spin_unlock_irqrestore(&port->lock, flags);
1300 }
1301 
1302 static const char *pmz_type(struct uart_port *port)
1303 {
1304         struct uart_pmac_port *uap = to_pmz(port);
1305 
1306         if (ZS_IS_IRDA(uap))
1307                 return "Z85c30 ESCC - Infrared port";
1308         else if (ZS_IS_INTMODEM(uap))
1309                 return "Z85c30 ESCC - Internal modem";
1310         return "Z85c30 ESCC - Serial port";
1311 }
1312 
1313 /* We do not request/release mappings of the registers here, this
1314  * happens at early serial probe time.
1315  */
1316 static void pmz_release_port(struct uart_port *port)
1317 {
1318 }
1319 
1320 static int pmz_request_port(struct uart_port *port)
1321 {
1322         return 0;
1323 }
1324 
1325 /* These do not need to do anything interesting either.  */
1326 static void pmz_config_port(struct uart_port *port, int flags)
1327 {
1328 }
1329 
1330 /* We do not support letting the user mess with the divisor, IRQ, etc. */
1331 static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
1332 {
1333         return -EINVAL;
1334 }
1335 
1336 #ifdef CONFIG_CONSOLE_POLL
1337 
1338 static int pmz_poll_get_char(struct uart_port *port)
1339 {
1340         struct uart_pmac_port *uap =
1341                 container_of(port, struct uart_pmac_port, port);
1342         int tries = 2;
1343 
1344         while (tries) {
1345                 if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0)
1346                         return read_zsdata(uap);
1347                 if (tries--)
1348                         udelay(5);
1349         }
1350 
1351         return NO_POLL_CHAR;
1352 }
1353 
1354 static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1355 {
1356         struct uart_pmac_port *uap =
1357                 container_of(port, struct uart_pmac_port, port);
1358 
1359         /* Wait for the transmit buffer to empty. */
1360         while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1361                 udelay(5);
1362         write_zsdata(uap, c);
1363 }
1364 
1365 #endif /* CONFIG_CONSOLE_POLL */
1366 
1367 static const struct uart_ops pmz_pops = {
1368         .tx_empty       =       pmz_tx_empty,
1369         .set_mctrl      =       pmz_set_mctrl,
1370         .get_mctrl      =       pmz_get_mctrl,
1371         .stop_tx        =       pmz_stop_tx,
1372         .start_tx       =       pmz_start_tx,
1373         .stop_rx        =       pmz_stop_rx,
1374         .enable_ms      =       pmz_enable_ms,
1375         .break_ctl      =       pmz_break_ctl,
1376         .startup        =       pmz_startup,
1377         .shutdown       =       pmz_shutdown,
1378         .set_termios    =       pmz_set_termios,
1379         .type           =       pmz_type,
1380         .release_port   =       pmz_release_port,
1381         .request_port   =       pmz_request_port,
1382         .config_port    =       pmz_config_port,
1383         .verify_port    =       pmz_verify_port,
1384 #ifdef CONFIG_CONSOLE_POLL
1385         .poll_get_char  =       pmz_poll_get_char,
1386         .poll_put_char  =       pmz_poll_put_char,
1387 #endif
1388 };
1389 
1390 #ifdef CONFIG_PPC_PMAC
1391 
1392 /*
1393  * Setup one port structure after probing, HW is down at this point,
1394  * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1395  * register our console before uart_add_one_port() is called
1396  */
1397 static int __init pmz_init_port(struct uart_pmac_port *uap)
1398 {
1399         struct device_node *np = uap->node;
1400         const char *conn;
1401         const struct slot_names_prop {
1402                 int     count;
1403                 char    name[1];
1404         } *slots;
1405         int len;
1406         struct resource r_ports, r_rxdma, r_txdma;
1407 
1408         /*
1409          * Request & map chip registers
1410          */
1411         if (of_address_to_resource(np, 0, &r_ports))
1412                 return -ENODEV;
1413         uap->port.mapbase = r_ports.start;
1414         uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1415 
1416         uap->control_reg = uap->port.membase;
1417         uap->data_reg = uap->control_reg + 0x10;
1418         
1419         /*
1420          * Request & map DBDMA registers
1421          */
1422 #ifdef HAS_DBDMA
1423         if (of_address_to_resource(np, 1, &r_txdma) == 0 &&
1424             of_address_to_resource(np, 2, &r_rxdma) == 0)
1425                 uap->flags |= PMACZILOG_FLAG_HAS_DMA;
1426 #else
1427         memset(&r_txdma, 0, sizeof(struct resource));
1428         memset(&r_rxdma, 0, sizeof(struct resource));
1429 #endif  
1430         if (ZS_HAS_DMA(uap)) {
1431                 uap->tx_dma_regs = ioremap(r_txdma.start, 0x100);
1432                 if (uap->tx_dma_regs == NULL) { 
1433                         uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1434                         goto no_dma;
1435                 }
1436                 uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100);
1437                 if (uap->rx_dma_regs == NULL) { 
1438                         iounmap(uap->tx_dma_regs);
1439                         uap->tx_dma_regs = NULL;
1440                         uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1441                         goto no_dma;
1442                 }
1443                 uap->tx_dma_irq = irq_of_parse_and_map(np, 1);
1444                 uap->rx_dma_irq = irq_of_parse_and_map(np, 2);
1445         }
1446 no_dma:
1447 
1448         /*
1449          * Detect port type
1450          */
1451         if (of_device_is_compatible(np, "cobalt"))
1452                 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1453         conn = of_get_property(np, "AAPL,connector", &len);
1454         if (conn && (strcmp(conn, "infrared") == 0))
1455                 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1456         uap->port_type = PMAC_SCC_ASYNC;
1457         /* 1999 Powerbook G3 has slot-names property instead */
1458         slots = of_get_property(np, "slot-names", &len);
1459         if (slots && slots->count > 0) {
1460                 if (strcmp(slots->name, "IrDA") == 0)
1461                         uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1462                 else if (strcmp(slots->name, "Modem") == 0)
1463                         uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1464         }
1465         if (ZS_IS_IRDA(uap))
1466                 uap->port_type = PMAC_SCC_IRDA;
1467         if (ZS_IS_INTMODEM(uap)) {
1468                 struct device_node* i2c_modem =
1469                         of_find_node_by_name(NULL, "i2c-modem");
1470                 if (i2c_modem) {
1471                         const char* mid =
1472                                 of_get_property(i2c_modem, "modem-id", NULL);
1473                         if (mid) switch(*mid) {
1474                         case 0x04 :
1475                         case 0x05 :
1476                         case 0x07 :
1477                         case 0x08 :
1478                         case 0x0b :
1479                         case 0x0c :
1480                                 uap->port_type = PMAC_SCC_I2S1;
1481                         }
1482                         printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n",
1483                                 mid ? (*mid) : 0);
1484                         of_node_put(i2c_modem);
1485                 } else {
1486                         printk(KERN_INFO "pmac_zilog: serial modem detected\n");
1487                 }
1488         }
1489 
1490         /*
1491          * Init remaining bits of "port" structure
1492          */
1493         uap->port.iotype = UPIO_MEM;
1494         uap->port.irq = irq_of_parse_and_map(np, 0);
1495         uap->port.uartclk = ZS_CLOCK;
1496         uap->port.fifosize = 1;
1497         uap->port.ops = &pmz_pops;
1498         uap->port.type = PORT_PMAC_ZILOG;
1499         uap->port.flags = 0;
1500 
1501         /*
1502          * Fixup for the port on Gatwick for which the device-tree has
1503          * missing interrupts. Normally, the macio_dev would contain
1504          * fixed up interrupt info, but we use the device-tree directly
1505          * here due to early probing so we need the fixup too.
1506          */
1507         if (uap->port.irq == 0 &&
1508             np->parent && np->parent->parent &&
1509             of_device_is_compatible(np->parent->parent, "gatwick")) {
1510                 /* IRQs on gatwick are offset by 64 */
1511                 uap->port.irq = irq_create_mapping(NULL, 64 + 15);
1512                 uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
1513                 uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
1514         }
1515 
1516         /* Setup some valid baud rate information in the register
1517          * shadows so we don't write crap there before baud rate is
1518          * first initialized.
1519          */
1520         pmz_convert_to_zs(uap, CS8, 0, 9600);
1521 
1522         return 0;
1523 }
1524 
1525 /*
1526  * Get rid of a port on module removal
1527  */
1528 static void pmz_dispose_port(struct uart_pmac_port *uap)
1529 {
1530         struct device_node *np;
1531 
1532         np = uap->node;
1533         iounmap(uap->rx_dma_regs);
1534         iounmap(uap->tx_dma_regs);
1535         iounmap(uap->control_reg);
1536         uap->node = NULL;
1537         of_node_put(np);
1538         memset(uap, 0, sizeof(struct uart_pmac_port));
1539 }
1540 
1541 /*
1542  * Called upon match with an escc node in the device-tree.
1543  */
1544 static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
1545 {
1546         struct uart_pmac_port *uap;
1547         int i;
1548         
1549         /* Iterate the pmz_ports array to find a matching entry
1550          */
1551         for (i = 0; i < MAX_ZS_PORTS; i++)
1552                 if (pmz_ports[i].node == mdev->ofdev.dev.of_node)
1553                         break;
1554         if (i >= MAX_ZS_PORTS)
1555                 return -ENODEV;
1556 
1557 
1558         uap = &pmz_ports[i];
1559         uap->dev = mdev;
1560         uap->port.dev = &mdev->ofdev.dev;
1561         dev_set_drvdata(&mdev->ofdev.dev, uap);
1562 
1563         /* We still activate the port even when failing to request resources
1564          * to work around bugs in ancient Apple device-trees
1565          */
1566         if (macio_request_resources(uap->dev, "pmac_zilog"))
1567                 printk(KERN_WARNING "%pOFn: Failed to request resource"
1568                        ", port still active\n",
1569                        uap->node);
1570         else
1571                 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED;
1572 
1573         return uart_add_one_port(&pmz_uart_reg, &uap->port);
1574 }
1575 
1576 /*
1577  * That one should not be called, macio isn't really a hotswap device,
1578  * we don't expect one of those serial ports to go away...
1579  */
1580 static int pmz_detach(struct macio_dev *mdev)
1581 {
1582         struct uart_pmac_port   *uap = dev_get_drvdata(&mdev->ofdev.dev);
1583         
1584         if (!uap)
1585                 return -ENODEV;
1586 
1587         uart_remove_one_port(&pmz_uart_reg, &uap->port);
1588 
1589         if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) {
1590                 macio_release_resources(uap->dev);
1591                 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED;
1592         }
1593         dev_set_drvdata(&mdev->ofdev.dev, NULL);
1594         uap->dev = NULL;
1595         uap->port.dev = NULL;
1596         
1597         return 0;
1598 }
1599 
1600 
1601 static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
1602 {
1603         struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1604 
1605         if (uap == NULL) {
1606                 printk("HRM... pmz_suspend with NULL uap\n");
1607                 return 0;
1608         }
1609 
1610         uart_suspend_port(&pmz_uart_reg, &uap->port);
1611 
1612         return 0;
1613 }
1614 
1615 
1616 static int pmz_resume(struct macio_dev *mdev)
1617 {
1618         struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1619 
1620         if (uap == NULL)
1621                 return 0;
1622 
1623         uart_resume_port(&pmz_uart_reg, &uap->port);
1624 
1625         return 0;
1626 }
1627 
1628 /*
1629  * Probe all ports in the system and build the ports array, we register
1630  * with the serial layer later, so we get a proper struct device which
1631  * allows the tty to attach properly. This is later than it used to be
1632  * but the tty layer really wants it that way.
1633  */
1634 static int __init pmz_probe(void)
1635 {
1636         struct device_node      *node_p, *node_a, *node_b, *np;
1637         int                     count = 0;
1638         int                     rc;
1639 
1640         /*
1641          * Find all escc chips in the system
1642          */
1643         for_each_node_by_name(node_p, "escc") {
1644                 /*
1645                  * First get channel A/B node pointers
1646                  * 
1647                  * TODO: Add routines with proper locking to do that...
1648                  */
1649                 node_a = node_b = NULL;
1650                 for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) {
1651                         if (of_node_name_prefix(np, "ch-a"))
1652                                 node_a = of_node_get(np);
1653                         else if (of_node_name_prefix(np, "ch-b"))
1654                                 node_b = of_node_get(np);
1655                 }
1656                 if (!node_a && !node_b) {
1657                         of_node_put(node_a);
1658                         of_node_put(node_b);
1659                         printk(KERN_ERR "pmac_zilog: missing node %c for escc %pOF\n",
1660                                 (!node_a) ? 'a' : 'b', node_p);
1661                         continue;
1662                 }
1663 
1664                 /*
1665                  * Fill basic fields in the port structures
1666                  */
1667                 if (node_b != NULL) {
1668                         pmz_ports[count].mate           = &pmz_ports[count+1];
1669                         pmz_ports[count+1].mate         = &pmz_ports[count];
1670                 }
1671                 pmz_ports[count].flags          = PMACZILOG_FLAG_IS_CHANNEL_A;
1672                 pmz_ports[count].node           = node_a;
1673                 pmz_ports[count+1].node         = node_b;
1674                 pmz_ports[count].port.line      = count;
1675                 pmz_ports[count+1].port.line    = count+1;
1676 
1677                 /*
1678                  * Setup the ports for real
1679                  */
1680                 rc = pmz_init_port(&pmz_ports[count]);
1681                 if (rc == 0 && node_b != NULL)
1682                         rc = pmz_init_port(&pmz_ports[count+1]);
1683                 if (rc != 0) {
1684                         of_node_put(node_a);
1685                         of_node_put(node_b);
1686                         memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port));
1687                         memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port));
1688                         continue;
1689                 }
1690                 count += 2;
1691         }
1692         pmz_ports_count = count;
1693 
1694         return 0;
1695 }
1696 
1697 #else
1698 
1699 extern struct platform_device scc_a_pdev, scc_b_pdev;
1700 
1701 static int __init pmz_init_port(struct uart_pmac_port *uap)
1702 {
1703         struct resource *r_ports;
1704         int irq;
1705 
1706         r_ports = platform_get_resource(uap->pdev, IORESOURCE_MEM, 0);
1707         irq = platform_get_irq(uap->pdev, 0);
1708         if (!r_ports || irq <= 0)
1709                 return -ENODEV;
1710 
1711         uap->port.mapbase  = r_ports->start;
1712         uap->port.membase  = (unsigned char __iomem *) r_ports->start;
1713         uap->port.iotype   = UPIO_MEM;
1714         uap->port.irq      = irq;
1715         uap->port.uartclk  = ZS_CLOCK;
1716         uap->port.fifosize = 1;
1717         uap->port.ops      = &pmz_pops;
1718         uap->port.type     = PORT_PMAC_ZILOG;
1719         uap->port.flags    = 0;
1720 
1721         uap->control_reg   = uap->port.membase;
1722         uap->data_reg      = uap->control_reg + 4;
1723         uap->port_type     = 0;
1724 
1725         pmz_convert_to_zs(uap, CS8, 0, 9600);
1726 
1727         return 0;
1728 }
1729 
1730 static int __init pmz_probe(void)
1731 {
1732         int err;
1733 
1734         pmz_ports_count = 0;
1735 
1736         pmz_ports[0].port.line = 0;
1737         pmz_ports[0].flags     = PMACZILOG_FLAG_IS_CHANNEL_A;
1738         pmz_ports[0].pdev      = &scc_a_pdev;
1739         err = pmz_init_port(&pmz_ports[0]);
1740         if (err)
1741                 return err;
1742         pmz_ports_count++;
1743 
1744         pmz_ports[0].mate      = &pmz_ports[1];
1745         pmz_ports[1].mate      = &pmz_ports[0];
1746         pmz_ports[1].port.line = 1;
1747         pmz_ports[1].flags     = 0;
1748         pmz_ports[1].pdev      = &scc_b_pdev;
1749         err = pmz_init_port(&pmz_ports[1]);
1750         if (err)
1751                 return err;
1752         pmz_ports_count++;
1753 
1754         return 0;
1755 }
1756 
1757 static void pmz_dispose_port(struct uart_pmac_port *uap)
1758 {
1759         memset(uap, 0, sizeof(struct uart_pmac_port));
1760 }
1761 
1762 static int __init pmz_attach(struct platform_device *pdev)
1763 {
1764         struct uart_pmac_port *uap;
1765         int i;
1766 
1767         /* Iterate the pmz_ports array to find a matching entry */
1768         for (i = 0; i < pmz_ports_count; i++)
1769                 if (pmz_ports[i].pdev == pdev)
1770                         break;
1771         if (i >= pmz_ports_count)
1772                 return -ENODEV;
1773 
1774         uap = &pmz_ports[i];
1775         uap->port.dev = &pdev->dev;
1776         platform_set_drvdata(pdev, uap);
1777 
1778         return uart_add_one_port(&pmz_uart_reg, &uap->port);
1779 }
1780 
1781 static int __exit pmz_detach(struct platform_device *pdev)
1782 {
1783         struct uart_pmac_port *uap = platform_get_drvdata(pdev);
1784 
1785         if (!uap)
1786                 return -ENODEV;
1787 
1788         uart_remove_one_port(&pmz_uart_reg, &uap->port);
1789 
1790         uap->port.dev = NULL;
1791 
1792         return 0;
1793 }
1794 
1795 #endif /* !CONFIG_PPC_PMAC */
1796 
1797 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1798 
1799 static void pmz_console_write(struct console *con, const char *s, unsigned int count);
1800 static int __init pmz_console_setup(struct console *co, char *options);
1801 
1802 static struct console pmz_console = {
1803         .name   =       PMACZILOG_NAME,
1804         .write  =       pmz_console_write,
1805         .device =       uart_console_device,
1806         .setup  =       pmz_console_setup,
1807         .flags  =       CON_PRINTBUFFER,
1808         .index  =       -1,
1809         .data   =       &pmz_uart_reg,
1810 };
1811 
1812 #define PMACZILOG_CONSOLE       &pmz_console
1813 #else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1814 #define PMACZILOG_CONSOLE       (NULL)
1815 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1816 
1817 /*
1818  * Register the driver, console driver and ports with the serial
1819  * core
1820  */
1821 static int __init pmz_register(void)
1822 {
1823         pmz_uart_reg.nr = pmz_ports_count;
1824         pmz_uart_reg.cons = PMACZILOG_CONSOLE;
1825 
1826         /*
1827          * Register this driver with the serial core
1828          */
1829         return uart_register_driver(&pmz_uart_reg);
1830 }
1831 
1832 #ifdef CONFIG_PPC_PMAC
1833 
1834 static const struct of_device_id pmz_match[] =
1835 {
1836         {
1837         .name           = "ch-a",
1838         },
1839         {
1840         .name           = "ch-b",
1841         },
1842         {},
1843 };
1844 MODULE_DEVICE_TABLE (of, pmz_match);
1845 
1846 static struct macio_driver pmz_driver = {
1847         .driver = {
1848                 .name           = "pmac_zilog",
1849                 .owner          = THIS_MODULE,
1850                 .of_match_table = pmz_match,
1851         },
1852         .probe          = pmz_attach,
1853         .remove         = pmz_detach,
1854         .suspend        = pmz_suspend,
1855         .resume         = pmz_resume,
1856 };
1857 
1858 #else
1859 
1860 static struct platform_driver pmz_driver = {
1861         .remove         = __exit_p(pmz_detach),
1862         .driver         = {
1863                 .name           = "scc",
1864         },
1865 };
1866 
1867 #endif /* !CONFIG_PPC_PMAC */
1868 
1869 static int __init init_pmz(void)
1870 {
1871         int rc, i;
1872         printk(KERN_INFO "%s\n", version);
1873 
1874         /* 
1875          * First, we need to do a direct OF-based probe pass. We
1876          * do that because we want serial console up before the
1877          * macio stuffs calls us back, and since that makes it
1878          * easier to pass the proper number of channels to
1879          * uart_register_driver()
1880          */
1881         if (pmz_ports_count == 0)
1882                 pmz_probe();
1883 
1884         /*
1885          * Bail early if no port found
1886          */
1887         if (pmz_ports_count == 0)
1888                 return -ENODEV;
1889 
1890         /*
1891          * Now we register with the serial layer
1892          */
1893         rc = pmz_register();
1894         if (rc) {
1895                 printk(KERN_ERR 
1896                         "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1897                         "pmac_zilog: Did another serial driver already claim the minors?\n"); 
1898                 /* effectively "pmz_unprobe()" */
1899                 for (i=0; i < pmz_ports_count; i++)
1900                         pmz_dispose_port(&pmz_ports[i]);
1901                 return rc;
1902         }
1903 
1904         /*
1905          * Then we register the macio driver itself
1906          */
1907 #ifdef CONFIG_PPC_PMAC
1908         return macio_register_driver(&pmz_driver);
1909 #else
1910         return platform_driver_probe(&pmz_driver, pmz_attach);
1911 #endif
1912 }
1913 
1914 static void __exit exit_pmz(void)
1915 {
1916         int i;
1917 
1918 #ifdef CONFIG_PPC_PMAC
1919         /* Get rid of macio-driver (detach from macio) */
1920         macio_unregister_driver(&pmz_driver);
1921 #else
1922         platform_driver_unregister(&pmz_driver);
1923 #endif
1924 
1925         for (i = 0; i < pmz_ports_count; i++) {
1926                 struct uart_pmac_port *uport = &pmz_ports[i];
1927 #ifdef CONFIG_PPC_PMAC
1928                 if (uport->node != NULL)
1929                         pmz_dispose_port(uport);
1930 #else
1931                 if (uport->pdev != NULL)
1932                         pmz_dispose_port(uport);
1933 #endif
1934         }
1935         /* Unregister UART driver */
1936         uart_unregister_driver(&pmz_uart_reg);
1937 }
1938 
1939 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1940 
1941 static void pmz_console_putchar(struct uart_port *port, int ch)
1942 {
1943         struct uart_pmac_port *uap =
1944                 container_of(port, struct uart_pmac_port, port);
1945 
1946         /* Wait for the transmit buffer to empty. */
1947         while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1948                 udelay(5);
1949         write_zsdata(uap, ch);
1950 }
1951 
1952 /*
1953  * Print a string to the serial port trying not to disturb
1954  * any possible real use of the port...
1955  */
1956 static void pmz_console_write(struct console *con, const char *s, unsigned int count)
1957 {
1958         struct uart_pmac_port *uap = &pmz_ports[con->index];
1959         unsigned long flags;
1960 
1961         spin_lock_irqsave(&uap->port.lock, flags);
1962 
1963         /* Turn of interrupts and enable the transmitter. */
1964         write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1965         write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
1966 
1967         uart_console_write(&uap->port, s, count, pmz_console_putchar);
1968 
1969         /* Restore the values in the registers. */
1970         write_zsreg(uap, R1, uap->curregs[1]);
1971         /* Don't disable the transmitter. */
1972 
1973         spin_unlock_irqrestore(&uap->port.lock, flags);
1974 }
1975 
1976 /*
1977  * Setup the serial console
1978  */
1979 static int __init pmz_console_setup(struct console *co, char *options)
1980 {
1981         struct uart_pmac_port *uap;
1982         struct uart_port *port;
1983         int baud = 38400;
1984         int bits = 8;
1985         int parity = 'n';
1986         int flow = 'n';
1987         unsigned long pwr_delay;
1988 
1989         /*
1990          * XServe's default to 57600 bps
1991          */
1992         if (of_machine_is_compatible("RackMac1,1")
1993             || of_machine_is_compatible("RackMac1,2")
1994             || of_machine_is_compatible("MacRISC4"))
1995                 baud = 57600;
1996 
1997         /*
1998          * Check whether an invalid uart number has been specified, and
1999          * if so, search for the first available port that does have
2000          * console support.
2001          */
2002         if (co->index >= pmz_ports_count)
2003                 co->index = 0;
2004         uap = &pmz_ports[co->index];
2005 #ifdef CONFIG_PPC_PMAC
2006         if (uap->node == NULL)
2007                 return -ENODEV;
2008 #else
2009         if (uap->pdev == NULL)
2010                 return -ENODEV;
2011 #endif
2012         port = &uap->port;
2013 
2014         /*
2015          * Mark port as beeing a console
2016          */
2017         uap->flags |= PMACZILOG_FLAG_IS_CONS;
2018 
2019         /*
2020          * Temporary fix for uart layer who didn't setup the spinlock yet
2021          */
2022         spin_lock_init(&port->lock);
2023 
2024         /*
2025          * Enable the hardware
2026          */
2027         pwr_delay = __pmz_startup(uap);
2028         if (pwr_delay)
2029                 mdelay(pwr_delay);
2030         
2031         if (options)
2032                 uart_parse_options(options, &baud, &parity, &bits, &flow);
2033 
2034         return uart_set_options(port, co, baud, parity, bits, flow);
2035 }
2036 
2037 static int __init pmz_console_init(void)
2038 {
2039         /* Probe ports */
2040         pmz_probe();
2041 
2042         if (pmz_ports_count == 0)
2043                 return -ENODEV;
2044 
2045         /* TODO: Autoprobe console based on OF */
2046         /* pmz_console.index = i; */
2047         register_console(&pmz_console);
2048 
2049         return 0;
2050 
2051 }
2052 console_initcall(pmz_console_init);
2053 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2054 
2055 module_init(init_pmz);
2056 module_exit(exit_pmz);
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root/drivers/tty/serial/pmac_zilog.c

DEFINITIONS
