This source file includes following definitions.
- cpu2cpm_addr
- cpm2cpu_addr
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  10 #ifndef CPM_UART_H
  11 #define CPM_UART_H
  12 
  13 #include <linux/platform_device.h>
  14 #include <linux/fs_uart_pd.h>
  15 
  16 #if defined(CONFIG_CPM2)
  17 #include "cpm_uart_cpm2.h"
  18 #elif defined(CONFIG_CPM1)
  19 #include "cpm_uart_cpm1.h"
  20 #endif
  21 
  22 #define SERIAL_CPM_MAJOR        204
  23 #define SERIAL_CPM_MINOR        46
  24 
  25 #define IS_SMC(pinfo)           (pinfo->flags & FLAG_SMC)
  26 #define IS_DISCARDING(pinfo)    (pinfo->flags & FLAG_DISCARDING)
  27 #define FLAG_DISCARDING 0x00000004      
  28 #define FLAG_SMC        0x00000002
  29 #define FLAG_CONSOLE    0x00000001
  30 
  31 #define UART_SMC1       fsid_smc1_uart
  32 #define UART_SMC2       fsid_smc2_uart
  33 #define UART_SCC1       fsid_scc1_uart
  34 #define UART_SCC2       fsid_scc2_uart
  35 #define UART_SCC3       fsid_scc3_uart
  36 #define UART_SCC4       fsid_scc4_uart
  37 
  38 #define UART_NR         fs_uart_nr
  39 
  40 #define RX_NUM_FIFO     4
  41 #define RX_BUF_SIZE     32
  42 #define TX_NUM_FIFO     4
  43 #define TX_BUF_SIZE     32
  44 
  45 #define SCC_WAIT_CLOSING 100
  46 
  47 #define GPIO_CTS        0
  48 #define GPIO_RTS        1
  49 #define GPIO_DCD        2
  50 #define GPIO_DSR        3
  51 #define GPIO_DTR        4
  52 #define GPIO_RI         5
  53 
  54 #define NUM_GPIOS       (GPIO_RI+1)
  55 
  56 struct uart_cpm_port {
  57         struct uart_port        port;
  58         u16                     rx_nrfifos;
  59         u16                     rx_fifosize;
  60         u16                     tx_nrfifos;
  61         u16                     tx_fifosize;
  62         smc_t __iomem           *smcp;
  63         smc_uart_t __iomem      *smcup;
  64         scc_t __iomem           *sccp;
  65         scc_uart_t __iomem      *sccup;
  66         cbd_t __iomem           *rx_bd_base;
  67         cbd_t __iomem           *rx_cur;
  68         cbd_t __iomem           *tx_bd_base;
  69         cbd_t __iomem           *tx_cur;
  70         unsigned char           *tx_buf;
  71         unsigned char           *rx_buf;
  72         u32                     flags;
  73         struct clk              *clk;
  74         u8                      brg;
  75         uint                     dp_addr;
  76         void                    *mem_addr;
  77         dma_addr_t               dma_addr;
  78         u32                     mem_size;
  79         
  80         int                     wait_closing;
  81         
  82         u32                     command;
  83         int                     gpios[NUM_GPIOS];
  84 };
  85 
  86 extern int cpm_uart_nr;
  87 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
  88 
  89 
  90 void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
  91 void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
  92                                 struct device_node *np);
  93 void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram);
  94 int cpm_uart_init_portdesc(void);
  95 int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
  96 void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
  97 
  98 void smc1_lineif(struct uart_cpm_port *pinfo);
  99 void smc2_lineif(struct uart_cpm_port *pinfo);
 100 void scc1_lineif(struct uart_cpm_port *pinfo);
 101 void scc2_lineif(struct uart_cpm_port *pinfo);
 102 void scc3_lineif(struct uart_cpm_port *pinfo);
 103 void scc4_lineif(struct uart_cpm_port *pinfo);
 104 
 105 
 106 
 107 
 108 static inline unsigned long cpu2cpm_addr(void *addr,
 109                                          struct uart_cpm_port *pinfo)
 110 {
 111         int offset;
 112         u32 val = (u32)addr;
 113         u32 mem = (u32)pinfo->mem_addr;
 114         
 115         if (likely(val >= mem && val < mem + pinfo->mem_size)) {
 116                 offset = val - mem;
 117                 return pinfo->dma_addr + offset;
 118         }
 119         
 120         BUG();
 121         return 0;
 122 }
 123 
 124 static inline void *cpm2cpu_addr(unsigned long addr,
 125                                  struct uart_cpm_port *pinfo)
 126 {
 127         int offset;
 128         u32 val = addr;
 129         u32 dma = (u32)pinfo->dma_addr;
 130         
 131         if (likely(val >= dma && val < dma + pinfo->mem_size)) {
 132                 offset = val - dma;
 133                 return pinfo->mem_addr + offset;
 134         }
 135         
 136         BUG();
 137         return NULL;
 138 }
 139 
 140 
 141 #endif