This source file includes following definitions.
- ar933x_uart_read
- ar933x_uart_write
- ar933x_uart_rmw
- ar933x_uart_rmw_set
- ar933x_uart_rmw_clear
- ar933x_uart_start_tx_interrupt
- ar933x_uart_stop_tx_interrupt
- ar933x_uart_putc
- ar933x_uart_tx_empty
- ar933x_uart_get_mctrl
- ar933x_uart_set_mctrl
- ar933x_uart_start_tx
- ar933x_uart_stop_tx
- ar933x_uart_stop_rx
- ar933x_uart_break_ctl
- ar933x_uart_get_baud
- ar933x_uart_get_scale_step
- ar933x_uart_set_termios
- ar933x_uart_rx_chars
- ar933x_uart_tx_chars
- ar933x_uart_interrupt
- ar933x_uart_startup
- ar933x_uart_shutdown
- ar933x_uart_type
- ar933x_uart_release_port
- ar933x_uart_request_port
- ar933x_uart_config_port
- ar933x_uart_verify_port
- ar933x_uart_wait_xmitr
- ar933x_uart_console_putchar
- ar933x_uart_console_write
- ar933x_uart_console_setup
- ar933x_uart_probe
- ar933x_uart_remove
- ar933x_uart_init
- ar933x_uart_exit
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9
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
17 #include <linux/of.h>
18 #include <linux/of_platform.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21 #include <linux/serial_core.h>
22 #include <linux/serial.h>
23 #include <linux/slab.h>
24 #include <linux/io.h>
25 #include <linux/irq.h>
26 #include <linux/clk.h>
27
28 #include <asm/div64.h>
29
30 #include <asm/mach-ath79/ar933x_uart.h>
31
32 #define DRIVER_NAME "ar933x-uart"
33
34 #define AR933X_UART_MAX_SCALE 0xff
35 #define AR933X_UART_MAX_STEP 0xffff
36
37 #define AR933X_UART_MIN_BAUD 300
38 #define AR933X_UART_MAX_BAUD 3000000
39
40 #define AR933X_DUMMY_STATUS_RD 0x01
41
42 static struct uart_driver ar933x_uart_driver;
43
44 struct ar933x_uart_port {
45 struct uart_port port;
46 unsigned int ier;
47 unsigned int min_baud;
48 unsigned int max_baud;
49 struct clk *clk;
50 };
51
52 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
53 int offset)
54 {
55 return readl(up->port.membase + offset);
56 }
57
58 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
59 int offset, unsigned int value)
60 {
61 writel(value, up->port.membase + offset);
62 }
63
64 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
65 unsigned int offset,
66 unsigned int mask,
67 unsigned int val)
68 {
69 unsigned int t;
70
71 t = ar933x_uart_read(up, offset);
72 t &= ~mask;
73 t |= val;
74 ar933x_uart_write(up, offset, t);
75 }
76
77 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
78 unsigned int offset,
79 unsigned int val)
80 {
81 ar933x_uart_rmw(up, offset, 0, val);
82 }
83
84 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
85 unsigned int offset,
86 unsigned int val)
87 {
88 ar933x_uart_rmw(up, offset, val, 0);
89 }
90
91 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
92 {
93 up->ier |= AR933X_UART_INT_TX_EMPTY;
94 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
95 }
96
97 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
98 {
99 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
100 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
101 }
102
103 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
104 {
105 unsigned int rdata;
106
107 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
108 rdata |= AR933X_UART_DATA_TX_CSR;
109 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
110 }
111
112 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
113 {
114 struct ar933x_uart_port *up =
115 container_of(port, struct ar933x_uart_port, port);
116 unsigned long flags;
117 unsigned int rdata;
118
119 spin_lock_irqsave(&up->port.lock, flags);
120 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
121 spin_unlock_irqrestore(&up->port.lock, flags);
122
123 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
124 }
125
126 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
127 {
128 return TIOCM_CAR;
129 }
130
131 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
132 {
133 }
134
135 static void ar933x_uart_start_tx(struct uart_port *port)
136 {
137 struct ar933x_uart_port *up =
138 container_of(port, struct ar933x_uart_port, port);
139
140 ar933x_uart_start_tx_interrupt(up);
141 }
142
143 static void ar933x_uart_stop_tx(struct uart_port *port)
144 {
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147
148 ar933x_uart_stop_tx_interrupt(up);
149 }
150
151 static void ar933x_uart_stop_rx(struct uart_port *port)
152 {
153 struct ar933x_uart_port *up =
154 container_of(port, struct ar933x_uart_port, port);
155
156 up->ier &= ~AR933X_UART_INT_RX_VALID;
157 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
158 }
159
160 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
161 {
162 struct ar933x_uart_port *up =
163 container_of(port, struct ar933x_uart_port, port);
164 unsigned long flags;
165
166 spin_lock_irqsave(&up->port.lock, flags);
167 if (break_state == -1)
168 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
169 AR933X_UART_CS_TX_BREAK);
170 else
171 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
172 AR933X_UART_CS_TX_BREAK);
173 spin_unlock_irqrestore(&up->port.lock, flags);
174 }
175
176
177
178
179 static unsigned long ar933x_uart_get_baud(unsigned int clk,
180 unsigned int scale,
181 unsigned int step)
182 {
183 u64 t;
184 u32 div;
185
186 div = (2 << 16) * (scale + 1);
187 t = clk;
188 t *= step;
189 t += (div / 2);
190 do_div(t, div);
191
192 return t;
193 }
194
195 static void ar933x_uart_get_scale_step(unsigned int clk,
196 unsigned int baud,
197 unsigned int *scale,
198 unsigned int *step)
199 {
200 unsigned int tscale;
201 long min_diff;
202
203 *scale = 0;
204 *step = 0;
205
206 min_diff = baud;
207 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
208 u64 tstep;
209 int diff;
210
211 tstep = baud * (tscale + 1);
212 tstep *= (2 << 16);
213 do_div(tstep, clk);
214
215 if (tstep > AR933X_UART_MAX_STEP)
216 break;
217
218 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
219 if (diff < min_diff) {
220 min_diff = diff;
221 *scale = tscale;
222 *step = tstep;
223 }
224 }
225 }
226
227 static void ar933x_uart_set_termios(struct uart_port *port,
228 struct ktermios *new,
229 struct ktermios *old)
230 {
231 struct ar933x_uart_port *up =
232 container_of(port, struct ar933x_uart_port, port);
233 unsigned int cs;
234 unsigned long flags;
235 unsigned int baud, scale, step;
236
237
238 new->c_cflag &= ~CSIZE;
239 new->c_cflag |= CS8;
240
241
242 new->c_cflag &= ~CSTOPB;
243
244 cs = 0;
245 if (new->c_cflag & PARENB) {
246 if (!(new->c_cflag & PARODD))
247 cs |= AR933X_UART_CS_PARITY_EVEN;
248 else
249 cs |= AR933X_UART_CS_PARITY_ODD;
250 } else {
251 cs |= AR933X_UART_CS_PARITY_NONE;
252 }
253
254
255 new->c_cflag &= ~CMSPAR;
256
257 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
258 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
259
260
261
262
263
264 spin_lock_irqsave(&up->port.lock, flags);
265
266
267 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
268 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
269
270
271 uart_update_timeout(port, new->c_cflag, baud);
272
273 up->port.ignore_status_mask = 0;
274
275
276 if ((new->c_cflag & CREAD) == 0)
277 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
278
279 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
280 scale << AR933X_UART_CLOCK_SCALE_S | step);
281
282
283 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
284
285
286 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
287 AR933X_UART_CS_HOST_INT_EN);
288
289
290 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
291 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
292
293
294 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
295 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
296 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
297
298 spin_unlock_irqrestore(&up->port.lock, flags);
299
300 if (tty_termios_baud_rate(new))
301 tty_termios_encode_baud_rate(new, baud, baud);
302 }
303
304 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
305 {
306 struct tty_port *port = &up->port.state->port;
307 int max_count = 256;
308
309 do {
310 unsigned int rdata;
311 unsigned char ch;
312
313 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
314 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
315 break;
316
317
318 ar933x_uart_write(up, AR933X_UART_DATA_REG,
319 AR933X_UART_DATA_RX_CSR);
320
321 up->port.icount.rx++;
322 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
323
324 if (uart_handle_sysrq_char(&up->port, ch))
325 continue;
326
327 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
328 tty_insert_flip_char(port, ch, TTY_NORMAL);
329 } while (max_count-- > 0);
330
331 spin_unlock(&up->port.lock);
332 tty_flip_buffer_push(port);
333 spin_lock(&up->port.lock);
334 }
335
336 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
337 {
338 struct circ_buf *xmit = &up->port.state->xmit;
339 int count;
340
341 if (uart_tx_stopped(&up->port))
342 return;
343
344 count = up->port.fifosize;
345 do {
346 unsigned int rdata;
347
348 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
349 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
350 break;
351
352 if (up->port.x_char) {
353 ar933x_uart_putc(up, up->port.x_char);
354 up->port.icount.tx++;
355 up->port.x_char = 0;
356 continue;
357 }
358
359 if (uart_circ_empty(xmit))
360 break;
361
362 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
363
364 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
365 up->port.icount.tx++;
366 } while (--count > 0);
367
368 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
369 uart_write_wakeup(&up->port);
370
371 if (!uart_circ_empty(xmit))
372 ar933x_uart_start_tx_interrupt(up);
373 }
374
375 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
376 {
377 struct ar933x_uart_port *up = dev_id;
378 unsigned int status;
379
380 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
381 if ((status & AR933X_UART_CS_HOST_INT) == 0)
382 return IRQ_NONE;
383
384 spin_lock(&up->port.lock);
385
386 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
387 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
388
389 if (status & AR933X_UART_INT_RX_VALID) {
390 ar933x_uart_write(up, AR933X_UART_INT_REG,
391 AR933X_UART_INT_RX_VALID);
392 ar933x_uart_rx_chars(up);
393 }
394
395 if (status & AR933X_UART_INT_TX_EMPTY) {
396 ar933x_uart_write(up, AR933X_UART_INT_REG,
397 AR933X_UART_INT_TX_EMPTY);
398 ar933x_uart_stop_tx_interrupt(up);
399 ar933x_uart_tx_chars(up);
400 }
401
402 spin_unlock(&up->port.lock);
403
404 return IRQ_HANDLED;
405 }
406
407 static int ar933x_uart_startup(struct uart_port *port)
408 {
409 struct ar933x_uart_port *up =
410 container_of(port, struct ar933x_uart_port, port);
411 unsigned long flags;
412 int ret;
413
414 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
415 up->port.irqflags, dev_name(up->port.dev), up);
416 if (ret)
417 return ret;
418
419 spin_lock_irqsave(&up->port.lock, flags);
420
421
422 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
423 AR933X_UART_CS_HOST_INT_EN);
424
425
426 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
427 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
428
429
430 up->ier = AR933X_UART_INT_RX_VALID;
431 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
432
433 spin_unlock_irqrestore(&up->port.lock, flags);
434
435 return 0;
436 }
437
438 static void ar933x_uart_shutdown(struct uart_port *port)
439 {
440 struct ar933x_uart_port *up =
441 container_of(port, struct ar933x_uart_port, port);
442
443
444 up->ier = 0;
445 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
446
447
448 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
449 AR933X_UART_CS_TX_BREAK);
450
451 free_irq(up->port.irq, up);
452 }
453
454 static const char *ar933x_uart_type(struct uart_port *port)
455 {
456 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
457 }
458
459 static void ar933x_uart_release_port(struct uart_port *port)
460 {
461
462 }
463
464 static int ar933x_uart_request_port(struct uart_port *port)
465 {
466
467 return 0;
468 }
469
470 static void ar933x_uart_config_port(struct uart_port *port, int flags)
471 {
472 if (flags & UART_CONFIG_TYPE)
473 port->type = PORT_AR933X;
474 }
475
476 static int ar933x_uart_verify_port(struct uart_port *port,
477 struct serial_struct *ser)
478 {
479 struct ar933x_uart_port *up =
480 container_of(port, struct ar933x_uart_port, port);
481
482 if (ser->type != PORT_UNKNOWN &&
483 ser->type != PORT_AR933X)
484 return -EINVAL;
485
486 if (ser->irq < 0 || ser->irq >= NR_IRQS)
487 return -EINVAL;
488
489 if (ser->baud_base < up->min_baud ||
490 ser->baud_base > up->max_baud)
491 return -EINVAL;
492
493 return 0;
494 }
495
496 static const struct uart_ops ar933x_uart_ops = {
497 .tx_empty = ar933x_uart_tx_empty,
498 .set_mctrl = ar933x_uart_set_mctrl,
499 .get_mctrl = ar933x_uart_get_mctrl,
500 .stop_tx = ar933x_uart_stop_tx,
501 .start_tx = ar933x_uart_start_tx,
502 .stop_rx = ar933x_uart_stop_rx,
503 .break_ctl = ar933x_uart_break_ctl,
504 .startup = ar933x_uart_startup,
505 .shutdown = ar933x_uart_shutdown,
506 .set_termios = ar933x_uart_set_termios,
507 .type = ar933x_uart_type,
508 .release_port = ar933x_uart_release_port,
509 .request_port = ar933x_uart_request_port,
510 .config_port = ar933x_uart_config_port,
511 .verify_port = ar933x_uart_verify_port,
512 };
513
514 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
515 static struct ar933x_uart_port *
516 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
517
518 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
519 {
520 unsigned int status;
521 unsigned int timeout = 60000;
522
523
524 do {
525 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
526 if (--timeout == 0)
527 break;
528 udelay(1);
529 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
530 }
531
532 static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
533 {
534 struct ar933x_uart_port *up =
535 container_of(port, struct ar933x_uart_port, port);
536
537 ar933x_uart_wait_xmitr(up);
538 ar933x_uart_putc(up, ch);
539 }
540
541 static void ar933x_uart_console_write(struct console *co, const char *s,
542 unsigned int count)
543 {
544 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
545 unsigned long flags;
546 unsigned int int_en;
547 int locked = 1;
548
549 local_irq_save(flags);
550
551 if (up->port.sysrq)
552 locked = 0;
553 else if (oops_in_progress)
554 locked = spin_trylock(&up->port.lock);
555 else
556 spin_lock(&up->port.lock);
557
558
559
560
561 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
562 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
563
564 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
565
566
567
568
569
570 ar933x_uart_wait_xmitr(up);
571 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
572
573 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
574
575 if (locked)
576 spin_unlock(&up->port.lock);
577
578 local_irq_restore(flags);
579 }
580
581 static int ar933x_uart_console_setup(struct console *co, char *options)
582 {
583 struct ar933x_uart_port *up;
584 int baud = 115200;
585 int bits = 8;
586 int parity = 'n';
587 int flow = 'n';
588
589 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
590 return -EINVAL;
591
592 up = ar933x_console_ports[co->index];
593 if (!up)
594 return -ENODEV;
595
596 if (options)
597 uart_parse_options(options, &baud, &parity, &bits, &flow);
598
599 return uart_set_options(&up->port, co, baud, parity, bits, flow);
600 }
601
602 static struct console ar933x_uart_console = {
603 .name = "ttyATH",
604 .write = ar933x_uart_console_write,
605 .device = uart_console_device,
606 .setup = ar933x_uart_console_setup,
607 .flags = CON_PRINTBUFFER,
608 .index = -1,
609 .data = &ar933x_uart_driver,
610 };
611 #endif
612
613 static struct uart_driver ar933x_uart_driver = {
614 .owner = THIS_MODULE,
615 .driver_name = DRIVER_NAME,
616 .dev_name = "ttyATH",
617 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
618 .cons = NULL,
619 };
620
621 static int ar933x_uart_probe(struct platform_device *pdev)
622 {
623 struct ar933x_uart_port *up;
624 struct uart_port *port;
625 struct resource *mem_res;
626 struct resource *irq_res;
627 struct device_node *np;
628 unsigned int baud;
629 int id;
630 int ret;
631
632 np = pdev->dev.of_node;
633 if (IS_ENABLED(CONFIG_OF) && np) {
634 id = of_alias_get_id(np, "serial");
635 if (id < 0) {
636 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
637 id);
638 return id;
639 }
640 } else {
641 id = pdev->id;
642 if (id == -1)
643 id = 0;
644 }
645
646 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
647 return -EINVAL;
648
649 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
650 if (!irq_res) {
651 dev_err(&pdev->dev, "no IRQ resource\n");
652 return -EINVAL;
653 }
654
655 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
656 GFP_KERNEL);
657 if (!up)
658 return -ENOMEM;
659
660 up->clk = devm_clk_get(&pdev->dev, "uart");
661 if (IS_ERR(up->clk)) {
662 dev_err(&pdev->dev, "unable to get UART clock\n");
663 return PTR_ERR(up->clk);
664 }
665
666 port = &up->port;
667
668 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
669 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
670 if (IS_ERR(port->membase))
671 return PTR_ERR(port->membase);
672
673 ret = clk_prepare_enable(up->clk);
674 if (ret)
675 return ret;
676
677 port->uartclk = clk_get_rate(up->clk);
678 if (!port->uartclk) {
679 ret = -EINVAL;
680 goto err_disable_clk;
681 }
682
683 port->mapbase = mem_res->start;
684 port->line = id;
685 port->irq = irq_res->start;
686 port->dev = &pdev->dev;
687 port->type = PORT_AR933X;
688 port->iotype = UPIO_MEM32;
689
690 port->regshift = 2;
691 port->fifosize = AR933X_UART_FIFO_SIZE;
692 port->ops = &ar933x_uart_ops;
693
694 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
695 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
696
697 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
698 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
699
700 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
701 ar933x_console_ports[up->port.line] = up;
702 #endif
703
704 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
705 if (ret)
706 goto err_disable_clk;
707
708 platform_set_drvdata(pdev, up);
709 return 0;
710
711 err_disable_clk:
712 clk_disable_unprepare(up->clk);
713 return ret;
714 }
715
716 static int ar933x_uart_remove(struct platform_device *pdev)
717 {
718 struct ar933x_uart_port *up;
719
720 up = platform_get_drvdata(pdev);
721
722 if (up) {
723 uart_remove_one_port(&ar933x_uart_driver, &up->port);
724 clk_disable_unprepare(up->clk);
725 }
726
727 return 0;
728 }
729
730 #ifdef CONFIG_OF
731 static const struct of_device_id ar933x_uart_of_ids[] = {
732 { .compatible = "qca,ar9330-uart" },
733 {},
734 };
735 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
736 #endif
737
738 static struct platform_driver ar933x_uart_platform_driver = {
739 .probe = ar933x_uart_probe,
740 .remove = ar933x_uart_remove,
741 .driver = {
742 .name = DRIVER_NAME,
743 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
744 },
745 };
746
747 static int __init ar933x_uart_init(void)
748 {
749 int ret;
750
751 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
752 ar933x_uart_driver.cons = &ar933x_uart_console;
753 #endif
754
755 ret = uart_register_driver(&ar933x_uart_driver);
756 if (ret)
757 goto err_out;
758
759 ret = platform_driver_register(&ar933x_uart_platform_driver);
760 if (ret)
761 goto err_unregister_uart_driver;
762
763 return 0;
764
765 err_unregister_uart_driver:
766 uart_unregister_driver(&ar933x_uart_driver);
767 err_out:
768 return ret;
769 }
770
771 static void __exit ar933x_uart_exit(void)
772 {
773 platform_driver_unregister(&ar933x_uart_platform_driver);
774 uart_unregister_driver(&ar933x_uart_driver);
775 }
776
777 module_init(ar933x_uart_init);
778 module_exit(ar933x_uart_exit);
779
780 MODULE_DESCRIPTION("Atheros AR933X UART driver");
781 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
782 MODULE_LICENSE("GPL v2");
783 MODULE_ALIAS("platform:" DRIVER_NAME);