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10 #ifndef _IFX6X60_H
11 #define _IFX6X60_H
12
13 #define DRVNAME "ifx6x60"
14 #define TTYNAME "ttyIFX"
15
16 #define IFX_SPI_MAX_MINORS 1
17 #define IFX_SPI_TRANSFER_SIZE 2048
18 #define IFX_SPI_FIFO_SIZE 4096
19
20 #define IFX_SPI_HEADER_OVERHEAD 4
21 #define IFX_RESET_TIMEOUT msecs_to_jiffies(50)
22
23
24 #define IFX_SPI_STATE_PRESENT 0
25 #define IFX_SPI_STATE_IO_IN_PROGRESS 1
26 #define IFX_SPI_STATE_IO_READY 2
27 #define IFX_SPI_STATE_TIMER_PENDING 3
28 #define IFX_SPI_STATE_IO_AVAILABLE 4
29
30
31 #define IFX_SPI_DCD 0
32 #define IFX_SPI_CTS 1
33 #define IFX_SPI_DSR 2
34 #define IFX_SPI_RI 3
35 #define IFX_SPI_DTR 4
36 #define IFX_SPI_RTS 5
37 #define IFX_SPI_TX_FC 6
38 #define IFX_SPI_RX_FC 7
39 #define IFX_SPI_UPDATE 8
40
41 #define IFX_SPI_PAYLOAD_SIZE (IFX_SPI_TRANSFER_SIZE - \
42 IFX_SPI_HEADER_OVERHEAD)
43
44 #define IFX_SPI_IRQ_TYPE DETECT_EDGE_RISING
45 #define IFX_SPI_GPIO_TARGET 0
46 #define IFX_SPI_GPIO0 0x105
47
48 #define IFX_SPI_STATUS_TIMEOUT (2000*HZ)
49
50
51 #define IFX_SPI_POWER_DATA_PENDING 1
52 #define IFX_SPI_POWER_SRDY 2
53
54 struct ifx_spi_device {
55
56 struct spi_device *spi_dev;
57
58
59 struct kfifo tx_fifo;
60 spinlock_t fifo_lock;
61 unsigned long signal_state;
62
63
64 struct tty_port tty_port;
65 struct device *tty_dev;
66 int minor;
67
68
69 struct tasklet_struct io_work_tasklet;
70 unsigned long flags;
71 dma_addr_t rx_dma;
72 dma_addr_t tx_dma;
73
74 int modem;
75 int use_dma;
76 long max_hz;
77
78 spinlock_t write_lock;
79 int write_pending;
80 spinlock_t power_lock;
81 unsigned char power_status;
82
83 unsigned char *rx_buffer;
84 unsigned char *tx_buffer;
85 dma_addr_t rx_bus;
86 dma_addr_t tx_bus;
87 unsigned char spi_more;
88 unsigned char spi_slave_cts;
89
90 struct timer_list spi_timer;
91
92 struct spi_message spi_msg;
93 struct spi_transfer spi_xfer;
94
95 struct {
96
97 unsigned short srdy;
98 unsigned short mrdy;
99 unsigned short reset;
100 unsigned short po;
101 unsigned short reset_out;
102
103 int unack_srdy_int_nb;
104 } gpio;
105
106
107 unsigned long mdm_reset_state;
108 #define MR_START 0
109 #define MR_INPROGRESS 1
110 #define MR_COMPLETE 2
111 wait_queue_head_t mdm_reset_wait;
112 void (*swap_buf)(unsigned char *buf, int len, void *end);
113 };
114
115 #endif