1
2 #ifndef _IP22_ZILOG_H
3 #define _IP22_ZILOG_H
4
5 #include <asm/byteorder.h>
6
7 struct zilog_channel {
8 #ifdef __BIG_ENDIAN
9 volatile unsigned char unused0[3];
10 volatile unsigned char control;
11 volatile unsigned char unused1[3];
12 volatile unsigned char data;
13 #else
14 volatile unsigned char control;
15 volatile unsigned char unused0[3];
16 volatile unsigned char data;
17 volatile unsigned char unused1[3];
18 #endif
19 };
20
21 struct zilog_layout {
22 struct zilog_channel channelB;
23 struct zilog_channel channelA;
24 };
25
26 #define NUM_ZSREGS 16
27
28
29
30
31 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
33
34
35
36 #define FLAG 0x7e
37
38
39 #define R0 0
40 #define R1 1
41 #define R2 2
42 #define R3 3
43 #define R4 4
44 #define R5 5
45 #define R6 6
46 #define R7 7
47 #define R8 8
48 #define R9 9
49 #define R10 10
50 #define R11 11
51 #define R12 12
52 #define R13 13
53 #define R14 14
54 #define R15 15
55
56 #define NULLCODE 0
57 #define POINT_HIGH 0x8
58 #define RES_EXT_INT 0x10
59 #define SEND_ABORT 0x18
60 #define RES_RxINT_FC 0x20
61 #define RES_Tx_P 0x28
62 #define ERR_RES 0x30
63 #define RES_H_IUS 0x38
64
65 #define RES_Rx_CRC 0x40
66 #define RES_Tx_CRC 0x80
67 #define RES_EOM_L 0xC0
68
69
70
71 #define EXT_INT_ENAB 0x1
72 #define TxINT_ENAB 0x2
73 #define PAR_SPEC 0x4
74
75 #define RxINT_DISAB 0
76 #define RxINT_FCERR 0x8
77 #define INT_ALL_Rx 0x10
78 #define INT_ERR_Rx 0x18
79 #define RxINT_MASK 0x18
80
81 #define WT_RDY_RT 0x20
82 #define WT_FN_RDYFN 0x40
83 #define WT_RDY_ENAB 0x80
84
85
86
87
88
89 #define RxENAB 0x1
90 #define SYNC_L_INH 0x2
91 #define ADD_SM 0x4
92 #define RxCRC_ENAB 0x8
93 #define ENT_HM 0x10
94 #define AUTO_ENAB 0x20
95 #define Rx5 0x0
96 #define Rx7 0x40
97 #define Rx6 0x80
98 #define Rx8 0xc0
99 #define RxN_MASK 0xc0
100
101
102
103 #define PAR_ENAB 0x1
104 #define PAR_EVEN 0x2
105
106 #define SYNC_ENAB 0
107 #define SB1 0x4
108 #define SB15 0x8
109 #define SB2 0xc
110
111 #define MONSYNC 0
112 #define BISYNC 0x10
113 #define SDLC 0x20
114 #define EXTSYNC 0x30
115
116 #define X1CLK 0x0
117 #define X16CLK 0x40
118 #define X32CLK 0x80
119 #define X64CLK 0xC0
120 #define XCLK_MASK 0xC0
121
122
123
124 #define TxCRC_ENAB 0x1
125 #define RTS 0x2
126 #define SDLC_CRC 0x4
127 #define TxENAB 0x8
128 #define SND_BRK 0x10
129 #define Tx5 0x0
130 #define Tx7 0x20
131 #define Tx6 0x40
132 #define Tx8 0x60
133 #define TxN_MASK 0x60
134 #define DTR 0x80
135
136
137
138
139
140
141
142
143 #define VIS 1
144 #define NV 2
145 #define DLC 4
146 #define MIE 8
147 #define STATHI 0x10
148 #define NORESET 0
149 #define CHRB 0x40
150 #define CHRA 0x80
151 #define FHWRES 0xc0
152
153
154 #define BIT6 1
155 #define LOOPMODE 2
156 #define ABUNDER 4
157 #define MARKIDLE 8
158 #define GAOP 0x10
159 #define NRZ 0
160 #define NRZI 0x20
161 #define FM1 0x40
162 #define FM0 0x60
163 #define CRCPS 0x80
164
165
166 #define TRxCXT 0
167 #define TRxCTC 1
168 #define TRxCBR 2
169 #define TRxCDP 3
170 #define TRxCOI 4
171 #define TCRTxCP 0
172 #define TCTRxCP 8
173 #define TCBR 0x10
174 #define TCDPLL 0x18
175 #define RCRTxCP 0
176 #define RCTRxCP 0x20
177 #define RCBR 0x40
178 #define RCDPLL 0x60
179 #define RTxCX 0x80
180
181
182
183
184
185
186 #define BRENAB 1
187 #define BRSRC 2
188 #define DTRREQ 4
189 #define AUTOECHO 8
190 #define LOOPBAK 0x10
191 #define SEARCH 0x20
192 #define RMC 0x40
193 #define DISDPLL 0x60
194 #define SSBR 0x80
195 #define SSRTxC 0xa0
196 #define SFMM 0xc0
197 #define SNRZI 0xe0
198
199
200 #define ZCIE 2
201 #define DCDIE 8
202 #define SYNCIE 0x10
203 #define CTSIE 0x20
204 #define TxUIE 0x40
205 #define BRKIE 0x80
206
207
208
209 #define Rx_CH_AV 0x1
210 #define ZCOUNT 0x2
211 #define Tx_BUF_EMP 0x4
212 #define DCD 0x8
213 #define SYNC 0x10
214 #define CTS 0x20
215 #define TxEOM 0x40
216 #define BRK_ABRT 0x80
217
218
219 #define ALL_SNT 0x1
220
221 #define RES3 0x8
222 #define RES4 0x4
223 #define RES5 0xc
224 #define RES6 0x2
225 #define RES7 0xa
226 #define RES8 0x6
227 #define RES18 0xe
228 #define RES28 0x0
229
230 #define PAR_ERR 0x10
231 #define Rx_OVR 0x20
232 #define CRC_ERR 0x40
233 #define END_FR 0x80
234
235
236 #define CHB_Tx_EMPTY 0x00
237 #define CHB_EXT_STAT 0x02
238 #define CHB_Rx_AVAIL 0x04
239 #define CHB_SPECIAL 0x06
240 #define CHA_Tx_EMPTY 0x08
241 #define CHA_EXT_STAT 0x0a
242 #define CHA_Rx_AVAIL 0x0c
243 #define CHA_SPECIAL 0x0e
244 #define STATUS_MASK 0x0e
245
246
247 #define CHBEXT 0x1
248 #define CHBTxIP 0x2
249 #define CHBRxIP 0x4
250 #define CHAEXT 0x8
251 #define CHATxIP 0x10
252 #define CHARxIP 0x20
253
254
255
256
257 #define ONLOOP 2
258 #define LOOPSEND 0x10
259 #define CLK2MIS 0x40
260 #define CLK1MIS 0x80
261
262
263
264
265
266
267
268
269 #define ZS_CLEARERR(channel) do { writeb(ERR_RES, &channel->control); \
270 udelay(5); } while(0)
271
272 #define ZS_CLEARSTAT(channel) do { writeb(RES_EXT_INT, &channel->control); \
273 udelay(5); } while(0)
274
275 #define ZS_CLEARFIFO(channel) do { readb(&channel->data); \
276 udelay(2); \
277 readb(&channel->data); \
278 udelay(2); \
279 readb(&channel->data); \
280 udelay(2); } while(0)
281
282 #endif