This source file includes following definitions.
- max3100_do_parity
- max3100_check_parity
- max3100_calc_parity
- max3100_dowork
- max3100_timeout
- max3100_sr
- max3100_handlerx
- max3100_work
- max3100_irq
- max3100_enable_ms
- max3100_start_tx
- max3100_stop_rx
- max3100_tx_empty
- max3100_get_mctrl
- max3100_set_mctrl
- max3100_set_termios
- max3100_shutdown
- max3100_startup
- max3100_type
- max3100_release_port
- max3100_config_port
- max3100_verify_port
- max3100_stop_tx
- max3100_request_port
- max3100_break_ctl
- max3100_probe
- max3100_remove
- max3100_suspend
- max3100_resume
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33 #define MAX3100_MAJOR 204
34 #define MAX3100_MINOR 209
35
36 #define MAX_MAX3100 4
37
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/device.h>
41 #include <linux/module.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44 #include <linux/spi/spi.h>
45 #include <linux/freezer.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48
49 #include <linux/serial_max3100.h>
50
51 #define MAX3100_C (1<<14)
52 #define MAX3100_D (0<<14)
53 #define MAX3100_W (1<<15)
54 #define MAX3100_RX (0<<15)
55
56 #define MAX3100_WC (MAX3100_W | MAX3100_C)
57 #define MAX3100_RC (MAX3100_RX | MAX3100_C)
58 #define MAX3100_WD (MAX3100_W | MAX3100_D)
59 #define MAX3100_RD (MAX3100_RX | MAX3100_D)
60 #define MAX3100_CMD (3 << 14)
61
62 #define MAX3100_T (1<<14)
63 #define MAX3100_R (1<<15)
64
65 #define MAX3100_FEN (1<<13)
66 #define MAX3100_SHDN (1<<12)
67 #define MAX3100_TM (1<<11)
68 #define MAX3100_RM (1<<10)
69 #define MAX3100_PM (1<<9)
70 #define MAX3100_RAM (1<<8)
71 #define MAX3100_IR (1<<7)
72 #define MAX3100_ST (1<<6)
73 #define MAX3100_PE (1<<5)
74 #define MAX3100_L (1<<4)
75 #define MAX3100_BAUD (0xf)
76
77 #define MAX3100_TE (1<<10)
78 #define MAX3100_RAFE (1<<10)
79 #define MAX3100_RTS (1<<9)
80 #define MAX3100_CTS (1<<9)
81 #define MAX3100_PT (1<<8)
82 #define MAX3100_DATA (0xff)
83
84 #define MAX3100_RT (MAX3100_R | MAX3100_T)
85 #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
86
87
88 #define MAX3100_STATUS_PE 1
89 #define MAX3100_STATUS_FE 2
90 #define MAX3100_STATUS_OE 4
91
92 struct max3100_port {
93 struct uart_port port;
94 struct spi_device *spi;
95
96 int cts;
97 int tx_empty;
98
99 spinlock_t conf_lock;
100 int conf_commit;
101 int conf;
102
103 int rts_commit;
104 int rts;
105 int baud;
106
107 int parity;
108 #define MAX3100_PARITY_ON 1
109 #define MAX3100_PARITY_ODD 2
110 #define MAX3100_7BIT 4
111 int rx_enabled;
112
113 int irq;
114
115 int minor;
116 int crystal;
117 int loopback;
118
119
120 struct workqueue_struct *workqueue;
121 struct work_struct work;
122
123 int force_end_work;
124
125 int suspending;
126
127
128 void (*max3100_hw_suspend) (int suspend);
129
130
131 int poll_time;
132
133 struct timer_list timer;
134 };
135
136 static struct max3100_port *max3100s[MAX_MAX3100];
137 static DEFINE_MUTEX(max3100s_lock);
138
139 static int max3100_do_parity(struct max3100_port *s, u16 c)
140 {
141 int parity;
142
143 if (s->parity & MAX3100_PARITY_ODD)
144 parity = 1;
145 else
146 parity = 0;
147
148 if (s->parity & MAX3100_7BIT)
149 c &= 0x7f;
150 else
151 c &= 0xff;
152
153 parity = parity ^ (hweight8(c) & 1);
154 return parity;
155 }
156
157 static int max3100_check_parity(struct max3100_port *s, u16 c)
158 {
159 return max3100_do_parity(s, c) == ((c >> 8) & 1);
160 }
161
162 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
163 {
164 if (s->parity & MAX3100_7BIT)
165 *c &= 0x7f;
166 else
167 *c &= 0xff;
168
169 if (s->parity & MAX3100_PARITY_ON)
170 *c |= max3100_do_parity(s, *c) << 8;
171 }
172
173 static void max3100_work(struct work_struct *w);
174
175 static void max3100_dowork(struct max3100_port *s)
176 {
177 if (!s->force_end_work && !freezing(current) && !s->suspending)
178 queue_work(s->workqueue, &s->work);
179 }
180
181 static void max3100_timeout(struct timer_list *t)
182 {
183 struct max3100_port *s = from_timer(s, t, timer);
184
185 if (s->port.state) {
186 max3100_dowork(s);
187 mod_timer(&s->timer, jiffies + s->poll_time);
188 }
189 }
190
191 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
192 {
193 struct spi_message message;
194 u16 etx, erx;
195 int status;
196 struct spi_transfer tran = {
197 .tx_buf = &etx,
198 .rx_buf = &erx,
199 .len = 2,
200 };
201
202 etx = cpu_to_be16(tx);
203 spi_message_init(&message);
204 spi_message_add_tail(&tran, &message);
205 status = spi_sync(s->spi, &message);
206 if (status) {
207 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
208 return -EIO;
209 }
210 *rx = be16_to_cpu(erx);
211 s->tx_empty = (*rx & MAX3100_T) > 0;
212 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
213 return 0;
214 }
215
216 static int max3100_handlerx(struct max3100_port *s, u16 rx)
217 {
218 unsigned int ch, flg, status = 0;
219 int ret = 0, cts;
220
221 if (rx & MAX3100_R && s->rx_enabled) {
222 dev_dbg(&s->spi->dev, "%s\n", __func__);
223 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
224 if (rx & MAX3100_RAFE) {
225 s->port.icount.frame++;
226 flg = TTY_FRAME;
227 status |= MAX3100_STATUS_FE;
228 } else {
229 if (s->parity & MAX3100_PARITY_ON) {
230 if (max3100_check_parity(s, rx)) {
231 s->port.icount.rx++;
232 flg = TTY_NORMAL;
233 } else {
234 s->port.icount.parity++;
235 flg = TTY_PARITY;
236 status |= MAX3100_STATUS_PE;
237 }
238 } else {
239 s->port.icount.rx++;
240 flg = TTY_NORMAL;
241 }
242 }
243 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
244 ret = 1;
245 }
246
247 cts = (rx & MAX3100_CTS) > 0;
248 if (s->cts != cts) {
249 s->cts = cts;
250 uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
251 }
252
253 return ret;
254 }
255
256 static void max3100_work(struct work_struct *w)
257 {
258 struct max3100_port *s = container_of(w, struct max3100_port, work);
259 int rxchars;
260 u16 tx, rx;
261 int conf, cconf, crts;
262 struct circ_buf *xmit = &s->port.state->xmit;
263
264 dev_dbg(&s->spi->dev, "%s\n", __func__);
265
266 rxchars = 0;
267 do {
268 spin_lock(&s->conf_lock);
269 conf = s->conf;
270 cconf = s->conf_commit;
271 s->conf_commit = 0;
272 crts = s->rts_commit;
273 s->rts_commit = 0;
274 spin_unlock(&s->conf_lock);
275 if (cconf)
276 max3100_sr(s, MAX3100_WC | conf, &rx);
277 if (crts) {
278 max3100_sr(s, MAX3100_WD | MAX3100_TE |
279 (s->rts ? MAX3100_RTS : 0), &rx);
280 rxchars += max3100_handlerx(s, rx);
281 }
282
283 max3100_sr(s, MAX3100_RD, &rx);
284 rxchars += max3100_handlerx(s, rx);
285
286 if (rx & MAX3100_T) {
287 tx = 0xffff;
288 if (s->port.x_char) {
289 tx = s->port.x_char;
290 s->port.icount.tx++;
291 s->port.x_char = 0;
292 } else if (!uart_circ_empty(xmit) &&
293 !uart_tx_stopped(&s->port)) {
294 tx = xmit->buf[xmit->tail];
295 xmit->tail = (xmit->tail + 1) &
296 (UART_XMIT_SIZE - 1);
297 s->port.icount.tx++;
298 }
299 if (tx != 0xffff) {
300 max3100_calc_parity(s, &tx);
301 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
302 max3100_sr(s, tx, &rx);
303 rxchars += max3100_handlerx(s, rx);
304 }
305 }
306
307 if (rxchars > 16) {
308 tty_flip_buffer_push(&s->port.state->port);
309 rxchars = 0;
310 }
311 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
312 uart_write_wakeup(&s->port);
313
314 } while (!s->force_end_work &&
315 !freezing(current) &&
316 ((rx & MAX3100_R) ||
317 (!uart_circ_empty(xmit) &&
318 !uart_tx_stopped(&s->port))));
319
320 if (rxchars > 0)
321 tty_flip_buffer_push(&s->port.state->port);
322 }
323
324 static irqreturn_t max3100_irq(int irqno, void *dev_id)
325 {
326 struct max3100_port *s = dev_id;
327
328 dev_dbg(&s->spi->dev, "%s\n", __func__);
329
330 max3100_dowork(s);
331 return IRQ_HANDLED;
332 }
333
334 static void max3100_enable_ms(struct uart_port *port)
335 {
336 struct max3100_port *s = container_of(port,
337 struct max3100_port,
338 port);
339
340 if (s->poll_time > 0)
341 mod_timer(&s->timer, jiffies);
342 dev_dbg(&s->spi->dev, "%s\n", __func__);
343 }
344
345 static void max3100_start_tx(struct uart_port *port)
346 {
347 struct max3100_port *s = container_of(port,
348 struct max3100_port,
349 port);
350
351 dev_dbg(&s->spi->dev, "%s\n", __func__);
352
353 max3100_dowork(s);
354 }
355
356 static void max3100_stop_rx(struct uart_port *port)
357 {
358 struct max3100_port *s = container_of(port,
359 struct max3100_port,
360 port);
361
362 dev_dbg(&s->spi->dev, "%s\n", __func__);
363
364 s->rx_enabled = 0;
365 spin_lock(&s->conf_lock);
366 s->conf &= ~MAX3100_RM;
367 s->conf_commit = 1;
368 spin_unlock(&s->conf_lock);
369 max3100_dowork(s);
370 }
371
372 static unsigned int max3100_tx_empty(struct uart_port *port)
373 {
374 struct max3100_port *s = container_of(port,
375 struct max3100_port,
376 port);
377
378 dev_dbg(&s->spi->dev, "%s\n", __func__);
379
380
381 max3100_dowork(s);
382 return s->tx_empty;
383 }
384
385 static unsigned int max3100_get_mctrl(struct uart_port *port)
386 {
387 struct max3100_port *s = container_of(port,
388 struct max3100_port,
389 port);
390
391 dev_dbg(&s->spi->dev, "%s\n", __func__);
392
393
394 max3100_dowork(s);
395
396 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
397 }
398
399 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
400 {
401 struct max3100_port *s = container_of(port,
402 struct max3100_port,
403 port);
404 int rts;
405
406 dev_dbg(&s->spi->dev, "%s\n", __func__);
407
408 rts = (mctrl & TIOCM_RTS) > 0;
409
410 spin_lock(&s->conf_lock);
411 if (s->rts != rts) {
412 s->rts = rts;
413 s->rts_commit = 1;
414 max3100_dowork(s);
415 }
416 spin_unlock(&s->conf_lock);
417 }
418
419 static void
420 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
421 struct ktermios *old)
422 {
423 struct max3100_port *s = container_of(port,
424 struct max3100_port,
425 port);
426 int baud = 0;
427 unsigned cflag;
428 u32 param_new, param_mask, parity = 0;
429
430 dev_dbg(&s->spi->dev, "%s\n", __func__);
431
432 cflag = termios->c_cflag;
433 param_mask = 0;
434
435 baud = tty_termios_baud_rate(termios);
436 param_new = s->conf & MAX3100_BAUD;
437 switch (baud) {
438 case 300:
439 if (s->crystal)
440 baud = s->baud;
441 else
442 param_new = 15;
443 break;
444 case 600:
445 param_new = 14 + s->crystal;
446 break;
447 case 1200:
448 param_new = 13 + s->crystal;
449 break;
450 case 2400:
451 param_new = 12 + s->crystal;
452 break;
453 case 4800:
454 param_new = 11 + s->crystal;
455 break;
456 case 9600:
457 param_new = 10 + s->crystal;
458 break;
459 case 19200:
460 param_new = 9 + s->crystal;
461 break;
462 case 38400:
463 param_new = 8 + s->crystal;
464 break;
465 case 57600:
466 param_new = 1 + s->crystal;
467 break;
468 case 115200:
469 param_new = 0 + s->crystal;
470 break;
471 case 230400:
472 if (s->crystal)
473 param_new = 0;
474 else
475 baud = s->baud;
476 break;
477 default:
478 baud = s->baud;
479 }
480 tty_termios_encode_baud_rate(termios, baud, baud);
481 s->baud = baud;
482 param_mask |= MAX3100_BAUD;
483
484 if ((cflag & CSIZE) == CS8) {
485 param_new &= ~MAX3100_L;
486 parity &= ~MAX3100_7BIT;
487 } else {
488 param_new |= MAX3100_L;
489 parity |= MAX3100_7BIT;
490 cflag = (cflag & ~CSIZE) | CS7;
491 }
492 param_mask |= MAX3100_L;
493
494 if (cflag & CSTOPB)
495 param_new |= MAX3100_ST;
496 else
497 param_new &= ~MAX3100_ST;
498 param_mask |= MAX3100_ST;
499
500 if (cflag & PARENB) {
501 param_new |= MAX3100_PE;
502 parity |= MAX3100_PARITY_ON;
503 } else {
504 param_new &= ~MAX3100_PE;
505 parity &= ~MAX3100_PARITY_ON;
506 }
507 param_mask |= MAX3100_PE;
508
509 if (cflag & PARODD)
510 parity |= MAX3100_PARITY_ODD;
511 else
512 parity &= ~MAX3100_PARITY_ODD;
513
514
515 cflag &= ~CMSPAR;
516 termios->c_cflag = cflag;
517
518 s->port.ignore_status_mask = 0;
519 if (termios->c_iflag & IGNPAR)
520 s->port.ignore_status_mask |=
521 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
522 MAX3100_STATUS_OE;
523
524
525 s->port.state->port.low_latency = 1;
526
527 if (s->poll_time > 0)
528 del_timer_sync(&s->timer);
529
530 uart_update_timeout(port, termios->c_cflag, baud);
531
532 spin_lock(&s->conf_lock);
533 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
534 s->conf_commit = 1;
535 s->parity = parity;
536 spin_unlock(&s->conf_lock);
537 max3100_dowork(s);
538
539 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
540 max3100_enable_ms(&s->port);
541 }
542
543 static void max3100_shutdown(struct uart_port *port)
544 {
545 struct max3100_port *s = container_of(port,
546 struct max3100_port,
547 port);
548
549 dev_dbg(&s->spi->dev, "%s\n", __func__);
550
551 if (s->suspending)
552 return;
553
554 s->force_end_work = 1;
555
556 if (s->poll_time > 0)
557 del_timer_sync(&s->timer);
558
559 if (s->workqueue) {
560 flush_workqueue(s->workqueue);
561 destroy_workqueue(s->workqueue);
562 s->workqueue = NULL;
563 }
564 if (s->irq)
565 free_irq(s->irq, s);
566
567
568 if (s->max3100_hw_suspend)
569 s->max3100_hw_suspend(1);
570 else {
571 u16 tx, rx;
572
573 tx = MAX3100_WC | MAX3100_SHDN;
574 max3100_sr(s, tx, &rx);
575 }
576 }
577
578 static int max3100_startup(struct uart_port *port)
579 {
580 struct max3100_port *s = container_of(port,
581 struct max3100_port,
582 port);
583 char b[12];
584
585 dev_dbg(&s->spi->dev, "%s\n", __func__);
586
587 s->conf = MAX3100_RM;
588 s->baud = s->crystal ? 230400 : 115200;
589 s->rx_enabled = 1;
590
591 if (s->suspending)
592 return 0;
593
594 s->force_end_work = 0;
595 s->parity = 0;
596 s->rts = 0;
597
598 sprintf(b, "max3100-%d", s->minor);
599 s->workqueue = create_freezable_workqueue(b);
600 if (!s->workqueue) {
601 dev_warn(&s->spi->dev, "cannot create workqueue\n");
602 return -EBUSY;
603 }
604 INIT_WORK(&s->work, max3100_work);
605
606 if (request_irq(s->irq, max3100_irq,
607 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
608 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
609 s->irq = 0;
610 destroy_workqueue(s->workqueue);
611 s->workqueue = NULL;
612 return -EBUSY;
613 }
614
615 if (s->loopback) {
616 u16 tx, rx;
617 tx = 0x4001;
618 max3100_sr(s, tx, &rx);
619 }
620
621 if (s->max3100_hw_suspend)
622 s->max3100_hw_suspend(0);
623 s->conf_commit = 1;
624 max3100_dowork(s);
625
626 msleep(50);
627
628 max3100_enable_ms(&s->port);
629
630 return 0;
631 }
632
633 static const char *max3100_type(struct uart_port *port)
634 {
635 struct max3100_port *s = container_of(port,
636 struct max3100_port,
637 port);
638
639 dev_dbg(&s->spi->dev, "%s\n", __func__);
640
641 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
642 }
643
644 static void max3100_release_port(struct uart_port *port)
645 {
646 struct max3100_port *s = container_of(port,
647 struct max3100_port,
648 port);
649
650 dev_dbg(&s->spi->dev, "%s\n", __func__);
651 }
652
653 static void max3100_config_port(struct uart_port *port, int flags)
654 {
655 struct max3100_port *s = container_of(port,
656 struct max3100_port,
657 port);
658
659 dev_dbg(&s->spi->dev, "%s\n", __func__);
660
661 if (flags & UART_CONFIG_TYPE)
662 s->port.type = PORT_MAX3100;
663 }
664
665 static int max3100_verify_port(struct uart_port *port,
666 struct serial_struct *ser)
667 {
668 struct max3100_port *s = container_of(port,
669 struct max3100_port,
670 port);
671 int ret = -EINVAL;
672
673 dev_dbg(&s->spi->dev, "%s\n", __func__);
674
675 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
676 ret = 0;
677 return ret;
678 }
679
680 static void max3100_stop_tx(struct uart_port *port)
681 {
682 struct max3100_port *s = container_of(port,
683 struct max3100_port,
684 port);
685
686 dev_dbg(&s->spi->dev, "%s\n", __func__);
687 }
688
689 static int max3100_request_port(struct uart_port *port)
690 {
691 struct max3100_port *s = container_of(port,
692 struct max3100_port,
693 port);
694
695 dev_dbg(&s->spi->dev, "%s\n", __func__);
696 return 0;
697 }
698
699 static void max3100_break_ctl(struct uart_port *port, int break_state)
700 {
701 struct max3100_port *s = container_of(port,
702 struct max3100_port,
703 port);
704
705 dev_dbg(&s->spi->dev, "%s\n", __func__);
706 }
707
708 static const struct uart_ops max3100_ops = {
709 .tx_empty = max3100_tx_empty,
710 .set_mctrl = max3100_set_mctrl,
711 .get_mctrl = max3100_get_mctrl,
712 .stop_tx = max3100_stop_tx,
713 .start_tx = max3100_start_tx,
714 .stop_rx = max3100_stop_rx,
715 .enable_ms = max3100_enable_ms,
716 .break_ctl = max3100_break_ctl,
717 .startup = max3100_startup,
718 .shutdown = max3100_shutdown,
719 .set_termios = max3100_set_termios,
720 .type = max3100_type,
721 .release_port = max3100_release_port,
722 .request_port = max3100_request_port,
723 .config_port = max3100_config_port,
724 .verify_port = max3100_verify_port,
725 };
726
727 static struct uart_driver max3100_uart_driver = {
728 .owner = THIS_MODULE,
729 .driver_name = "ttyMAX",
730 .dev_name = "ttyMAX",
731 .major = MAX3100_MAJOR,
732 .minor = MAX3100_MINOR,
733 .nr = MAX_MAX3100,
734 };
735 static int uart_driver_registered;
736
737 static int max3100_probe(struct spi_device *spi)
738 {
739 int i, retval;
740 struct plat_max3100 *pdata;
741 u16 tx, rx;
742
743 mutex_lock(&max3100s_lock);
744
745 if (!uart_driver_registered) {
746 uart_driver_registered = 1;
747 retval = uart_register_driver(&max3100_uart_driver);
748 if (retval) {
749 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
750 mutex_unlock(&max3100s_lock);
751 return retval;
752 }
753 }
754
755 for (i = 0; i < MAX_MAX3100; i++)
756 if (!max3100s[i])
757 break;
758 if (i == MAX_MAX3100) {
759 dev_warn(&spi->dev, "too many MAX3100 chips\n");
760 mutex_unlock(&max3100s_lock);
761 return -ENOMEM;
762 }
763
764 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
765 if (!max3100s[i]) {
766 dev_warn(&spi->dev,
767 "kmalloc for max3100 structure %d failed!\n", i);
768 mutex_unlock(&max3100s_lock);
769 return -ENOMEM;
770 }
771 max3100s[i]->spi = spi;
772 max3100s[i]->irq = spi->irq;
773 spin_lock_init(&max3100s[i]->conf_lock);
774 spi_set_drvdata(spi, max3100s[i]);
775 pdata = dev_get_platdata(&spi->dev);
776 max3100s[i]->crystal = pdata->crystal;
777 max3100s[i]->loopback = pdata->loopback;
778 max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
779 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
780 max3100s[i]->poll_time = 1;
781 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
782 max3100s[i]->minor = i;
783 timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
784
785 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
786 max3100s[i]->port.irq = max3100s[i]->irq;
787 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
788 max3100s[i]->port.fifosize = 16;
789 max3100s[i]->port.ops = &max3100_ops;
790 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
791 max3100s[i]->port.line = i;
792 max3100s[i]->port.type = PORT_MAX3100;
793 max3100s[i]->port.dev = &spi->dev;
794 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
795 if (retval < 0)
796 dev_warn(&spi->dev,
797 "uart_add_one_port failed for line %d with error %d\n",
798 i, retval);
799
800
801 if (max3100s[i]->max3100_hw_suspend)
802 max3100s[i]->max3100_hw_suspend(1);
803 else {
804 tx = MAX3100_WC | MAX3100_SHDN;
805 max3100_sr(max3100s[i], tx, &rx);
806 }
807 mutex_unlock(&max3100s_lock);
808 return 0;
809 }
810
811 static int max3100_remove(struct spi_device *spi)
812 {
813 struct max3100_port *s = spi_get_drvdata(spi);
814 int i;
815
816 mutex_lock(&max3100s_lock);
817
818
819 for (i = 0; i < MAX_MAX3100; i++)
820 if (max3100s[i] == s) {
821 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
822 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
823 kfree(max3100s[i]);
824 max3100s[i] = NULL;
825 break;
826 }
827
828 WARN_ON(i == MAX_MAX3100);
829
830
831 for (i = 0; i < MAX_MAX3100; i++)
832 if (max3100s[i]) {
833 mutex_unlock(&max3100s_lock);
834 return 0;
835 }
836 pr_debug("removing max3100 driver\n");
837 uart_unregister_driver(&max3100_uart_driver);
838
839 mutex_unlock(&max3100s_lock);
840 return 0;
841 }
842
843 #ifdef CONFIG_PM_SLEEP
844
845 static int max3100_suspend(struct device *dev)
846 {
847 struct max3100_port *s = dev_get_drvdata(dev);
848
849 dev_dbg(&s->spi->dev, "%s\n", __func__);
850
851 disable_irq(s->irq);
852
853 s->suspending = 1;
854 uart_suspend_port(&max3100_uart_driver, &s->port);
855
856 if (s->max3100_hw_suspend)
857 s->max3100_hw_suspend(1);
858 else {
859
860 u16 tx, rx;
861
862 tx = MAX3100_WC | MAX3100_SHDN;
863 max3100_sr(s, tx, &rx);
864 }
865 return 0;
866 }
867
868 static int max3100_resume(struct device *dev)
869 {
870 struct max3100_port *s = dev_get_drvdata(dev);
871
872 dev_dbg(&s->spi->dev, "%s\n", __func__);
873
874 if (s->max3100_hw_suspend)
875 s->max3100_hw_suspend(0);
876 uart_resume_port(&max3100_uart_driver, &s->port);
877 s->suspending = 0;
878
879 enable_irq(s->irq);
880
881 s->conf_commit = 1;
882 if (s->workqueue)
883 max3100_dowork(s);
884
885 return 0;
886 }
887
888 static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
889 #define MAX3100_PM_OPS (&max3100_pm_ops)
890
891 #else
892 #define MAX3100_PM_OPS NULL
893 #endif
894
895 static struct spi_driver max3100_driver = {
896 .driver = {
897 .name = "max3100",
898 .pm = MAX3100_PM_OPS,
899 },
900 .probe = max3100_probe,
901 .remove = max3100_remove,
902 };
903
904 module_spi_driver(max3100_driver);
905
906 MODULE_DESCRIPTION("MAX3100 driver");
907 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
908 MODULE_LICENSE("GPL");
909 MODULE_ALIAS("spi:max3100");