This source file includes following definitions.
- moxa_wait_finish
- moxafunc
- moxafuncret
- moxa_low_water_check
- moxa_ioctl
- moxa_break_ctl
- moxa_check_fw_model
- moxa_check_fw
- moxa_load_bios
- moxa_load_320b
- moxa_real_load_code
- moxa_load_code
- moxa_load_fw
- moxa_init_board
- moxa_board_deinit
- moxa_pci_probe
- moxa_pci_remove
- moxa_init
- moxa_exit
- moxa_shutdown
- moxa_carrier_raised
- moxa_dtr_rts
- moxa_open
- moxa_close
- moxa_write
- moxa_write_room
- moxa_flush_buffer
- moxa_chars_in_buffer
- moxa_tiocmget
- moxa_tiocmset
- moxa_set_termios
- moxa_stop
- moxa_start
- moxa_hangup
- moxa_new_dcdstate
- moxa_poll_port
- moxa_poll
- moxa_set_tty_param
- MoxaPortFlushData
- MoxaPortEnable
- MoxaPortDisable
- MoxaPortSetBaud
- MoxaPortSetTermio
- MoxaPortGetLineOut
- MoxaPortLineCtrl
- MoxaPortFlowCtrl
- MoxaPortLineStatus
- MoxaPortWriteData
- MoxaPortReadData
- MoxaPortTxQueue
- MoxaPortTxFree
- MoxaPortRxQueue
- MoxaPortTxDisable
- MoxaPortTxEnable
- moxa_get_serial_info
- moxa_set_serial_info
- MoxaSetFifo
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20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/mm.h>
23 #include <linux/ioport.h>
24 #include <linux/errno.h>
25 #include <linux/firmware.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/serial.h>
37 #include <linux/tty_driver.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/init.h>
41 #include <linux/bitops.h>
42 #include <linux/slab.h>
43 #include <linux/ratelimit.h>
44
45 #include <asm/io.h>
46 #include <linux/uaccess.h>
47
48 #include "moxa.h"
49
50 #define MOXA_VERSION "6.0k"
51
52 #define MOXA_FW_HDRLEN 32
53
54 #define MOXAMAJOR 172
55
56 #define MAX_BOARDS 4
57 #define MAX_PORTS_PER_BOARD 32
58 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
59
60 #define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61 (brd)->boardType == MOXA_BOARD_C320_PCI)
62
63
64
65
66 #define MOXA_BUS_TYPE_ISA 0
67 #define MOXA_BUS_TYPE_PCI 1
68
69 enum {
70 MOXA_BOARD_C218_PCI = 1,
71 MOXA_BOARD_C218_ISA,
72 MOXA_BOARD_C320_PCI,
73 MOXA_BOARD_C320_ISA,
74 MOXA_BOARD_CP204J,
75 };
76
77 static char *moxa_brdname[] =
78 {
79 "C218 Turbo PCI series",
80 "C218 Turbo ISA series",
81 "C320 Turbo PCI series",
82 "C320 Turbo ISA series",
83 "CP-204J series",
84 };
85
86 #ifdef CONFIG_PCI
87 static const struct pci_device_id moxa_pcibrds[] = {
88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89 .driver_data = MOXA_BOARD_C218_PCI },
90 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91 .driver_data = MOXA_BOARD_C320_PCI },
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93 .driver_data = MOXA_BOARD_CP204J },
94 { 0 }
95 };
96 MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97 #endif
98
99 struct moxa_port;
100
101 static struct moxa_board_conf {
102 int boardType;
103 int numPorts;
104 int busType;
105
106 unsigned int ready;
107
108 struct moxa_port *ports;
109
110 void __iomem *basemem;
111 void __iomem *intNdx;
112 void __iomem *intPend;
113 void __iomem *intTable;
114 } moxa_boards[MAX_BOARDS];
115
116 struct mxser_mstatus {
117 tcflag_t cflag;
118 int cts;
119 int dsr;
120 int ri;
121 int dcd;
122 };
123
124 struct moxaq_str {
125 int inq;
126 int outq;
127 };
128
129 struct moxa_port {
130 struct tty_port port;
131 struct moxa_board_conf *board;
132 void __iomem *tableAddr;
133
134 int type;
135 int cflag;
136 unsigned long statusflags;
137
138 u8 DCDState;
139 u8 lineCtrl;
140 u8 lowChkFlag;
141 };
142
143 struct mon_str {
144 int tick;
145 int rxcnt[MAX_PORTS];
146 int txcnt[MAX_PORTS];
147 };
148
149
150 #define TXSTOPPED 1
151 #define LOWWAIT 2
152 #define EMPTYWAIT 3
153
154
155 #define WAKEUP_CHARS 256
156
157 static int ttymajor = MOXAMAJOR;
158 static struct mon_str moxaLog;
159 static unsigned int moxaFuncTout = HZ / 2;
160 static unsigned int moxaLowWaterChk;
161 static DEFINE_MUTEX(moxa_openlock);
162 static DEFINE_SPINLOCK(moxa_lock);
163
164 static unsigned long baseaddr[MAX_BOARDS];
165 static unsigned int type[MAX_BOARDS];
166 static unsigned int numports[MAX_BOARDS];
167 static struct tty_port moxa_service_port;
168
169 MODULE_AUTHOR("William Chen");
170 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171 MODULE_LICENSE("GPL");
172 MODULE_FIRMWARE("c218tunx.cod");
173 MODULE_FIRMWARE("cp204unx.cod");
174 MODULE_FIRMWARE("c320tunx.cod");
175
176 module_param_array(type, uint, NULL, 0);
177 MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
178 module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
179 MODULE_PARM_DESC(baseaddr, "base address");
180 module_param_array(numports, uint, NULL, 0);
181 MODULE_PARM_DESC(numports, "numports (ignored for C218)");
182
183 module_param(ttymajor, int, 0);
184
185
186
187
188 static int moxa_open(struct tty_struct *, struct file *);
189 static void moxa_close(struct tty_struct *, struct file *);
190 static int moxa_write(struct tty_struct *, const unsigned char *, int);
191 static int moxa_write_room(struct tty_struct *);
192 static void moxa_flush_buffer(struct tty_struct *);
193 static int moxa_chars_in_buffer(struct tty_struct *);
194 static void moxa_set_termios(struct tty_struct *, struct ktermios *);
195 static void moxa_stop(struct tty_struct *);
196 static void moxa_start(struct tty_struct *);
197 static void moxa_hangup(struct tty_struct *);
198 static int moxa_tiocmget(struct tty_struct *tty);
199 static int moxa_tiocmset(struct tty_struct *tty,
200 unsigned int set, unsigned int clear);
201 static void moxa_poll(struct timer_list *);
202 static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
203 static void moxa_shutdown(struct tty_port *);
204 static int moxa_carrier_raised(struct tty_port *);
205 static void moxa_dtr_rts(struct tty_port *, int);
206
207
208
209 static void MoxaPortEnable(struct moxa_port *);
210 static void MoxaPortDisable(struct moxa_port *);
211 static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212 static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213 static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214 static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215 static int MoxaPortLineStatus(struct moxa_port *);
216 static void MoxaPortFlushData(struct moxa_port *, int);
217 static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
218 static int MoxaPortReadData(struct moxa_port *);
219 static int MoxaPortTxQueue(struct moxa_port *);
220 static int MoxaPortRxQueue(struct moxa_port *);
221 static int MoxaPortTxFree(struct moxa_port *);
222 static void MoxaPortTxDisable(struct moxa_port *);
223 static void MoxaPortTxEnable(struct moxa_port *);
224 static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
225 static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
226 static void MoxaSetFifo(struct moxa_port *port, int enable);
227
228
229
230
231
232 static DEFINE_SPINLOCK(moxafunc_lock);
233
234 static void moxa_wait_finish(void __iomem *ofsAddr)
235 {
236 unsigned long end = jiffies + moxaFuncTout;
237
238 while (readw(ofsAddr + FuncCode) != 0)
239 if (time_after(jiffies, end))
240 return;
241 if (readw(ofsAddr + FuncCode) != 0)
242 printk_ratelimited(KERN_WARNING "moxa function expired\n");
243 }
244
245 static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
246 {
247 unsigned long flags;
248 spin_lock_irqsave(&moxafunc_lock, flags);
249 writew(arg, ofsAddr + FuncArg);
250 writew(cmd, ofsAddr + FuncCode);
251 moxa_wait_finish(ofsAddr);
252 spin_unlock_irqrestore(&moxafunc_lock, flags);
253 }
254
255 static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256 {
257 unsigned long flags;
258 u16 ret;
259 spin_lock_irqsave(&moxafunc_lock, flags);
260 writew(arg, ofsAddr + FuncArg);
261 writew(cmd, ofsAddr + FuncCode);
262 moxa_wait_finish(ofsAddr);
263 ret = readw(ofsAddr + FuncArg);
264 spin_unlock_irqrestore(&moxafunc_lock, flags);
265 return ret;
266 }
267
268 static void moxa_low_water_check(void __iomem *ofsAddr)
269 {
270 u16 rptr, wptr, mask, len;
271
272 if (readb(ofsAddr + FlagStat) & Xoff_state) {
273 rptr = readw(ofsAddr + RXrptr);
274 wptr = readw(ofsAddr + RXwptr);
275 mask = readw(ofsAddr + RX_mask);
276 len = (wptr - rptr) & mask;
277 if (len <= Low_water)
278 moxafunc(ofsAddr, FC_SendXon, 0);
279 }
280 }
281
282
283
284
285
286 static int moxa_ioctl(struct tty_struct *tty,
287 unsigned int cmd, unsigned long arg)
288 {
289 struct moxa_port *ch = tty->driver_data;
290 void __user *argp = (void __user *)arg;
291 int status, ret = 0;
292
293 if (tty->index == MAX_PORTS) {
294 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295 cmd != MOXA_GETMSTATUS)
296 return -EINVAL;
297 } else if (!ch)
298 return -ENODEV;
299
300 switch (cmd) {
301 case MOXA_GETDATACOUNT:
302 moxaLog.tick = jiffies;
303 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304 ret = -EFAULT;
305 break;
306 case MOXA_FLUSH_QUEUE:
307 MoxaPortFlushData(ch, arg);
308 break;
309 case MOXA_GET_IOQUEUE: {
310 struct moxaq_str __user *argm = argp;
311 struct moxaq_str tmp;
312 struct moxa_port *p;
313 unsigned int i, j;
314
315 for (i = 0; i < MAX_BOARDS; i++) {
316 p = moxa_boards[i].ports;
317 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318 memset(&tmp, 0, sizeof(tmp));
319 spin_lock_bh(&moxa_lock);
320 if (moxa_boards[i].ready) {
321 tmp.inq = MoxaPortRxQueue(p);
322 tmp.outq = MoxaPortTxQueue(p);
323 }
324 spin_unlock_bh(&moxa_lock);
325 if (copy_to_user(argm, &tmp, sizeof(tmp)))
326 return -EFAULT;
327 }
328 }
329 break;
330 } case MOXA_GET_OQUEUE:
331 status = MoxaPortTxQueue(ch);
332 ret = put_user(status, (unsigned long __user *)argp);
333 break;
334 case MOXA_GET_IQUEUE:
335 status = MoxaPortRxQueue(ch);
336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
338 case MOXA_GETMSTATUS: {
339 struct mxser_mstatus __user *argm = argp;
340 struct mxser_mstatus tmp;
341 struct moxa_port *p;
342 unsigned int i, j;
343
344 for (i = 0; i < MAX_BOARDS; i++) {
345 p = moxa_boards[i].ports;
346 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
347 struct tty_struct *ttyp;
348 memset(&tmp, 0, sizeof(tmp));
349 spin_lock_bh(&moxa_lock);
350 if (!moxa_boards[i].ready) {
351 spin_unlock_bh(&moxa_lock);
352 goto copy;
353 }
354
355 status = MoxaPortLineStatus(p);
356 spin_unlock_bh(&moxa_lock);
357
358 if (status & 1)
359 tmp.cts = 1;
360 if (status & 2)
361 tmp.dsr = 1;
362 if (status & 4)
363 tmp.dcd = 1;
364
365 ttyp = tty_port_tty_get(&p->port);
366 if (!ttyp)
367 tmp.cflag = p->cflag;
368 else
369 tmp.cflag = ttyp->termios.c_cflag;
370 tty_kref_put(ttyp);
371 copy:
372 if (copy_to_user(argm, &tmp, sizeof(tmp)))
373 return -EFAULT;
374 }
375 }
376 break;
377 }
378 default:
379 ret = -ENOIOCTLCMD;
380 }
381 return ret;
382 }
383
384 static int moxa_break_ctl(struct tty_struct *tty, int state)
385 {
386 struct moxa_port *port = tty->driver_data;
387
388 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
389 Magic_code);
390 return 0;
391 }
392
393 static const struct tty_operations moxa_ops = {
394 .open = moxa_open,
395 .close = moxa_close,
396 .write = moxa_write,
397 .write_room = moxa_write_room,
398 .flush_buffer = moxa_flush_buffer,
399 .chars_in_buffer = moxa_chars_in_buffer,
400 .ioctl = moxa_ioctl,
401 .set_termios = moxa_set_termios,
402 .stop = moxa_stop,
403 .start = moxa_start,
404 .hangup = moxa_hangup,
405 .break_ctl = moxa_break_ctl,
406 .tiocmget = moxa_tiocmget,
407 .tiocmset = moxa_tiocmset,
408 .set_serial = moxa_set_serial_info,
409 .get_serial = moxa_get_serial_info,
410 };
411
412 static const struct tty_port_operations moxa_port_ops = {
413 .carrier_raised = moxa_carrier_raised,
414 .dtr_rts = moxa_dtr_rts,
415 .shutdown = moxa_shutdown,
416 };
417
418 static struct tty_driver *moxaDriver;
419 static DEFINE_TIMER(moxaTimer, moxa_poll);
420
421
422
423
424
425 static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
426 {
427 switch (brd->boardType) {
428 case MOXA_BOARD_C218_ISA:
429 case MOXA_BOARD_C218_PCI:
430 if (model != 1)
431 goto err;
432 break;
433 case MOXA_BOARD_CP204J:
434 if (model != 3)
435 goto err;
436 break;
437 default:
438 if (model != 2)
439 goto err;
440 break;
441 }
442 return 0;
443 err:
444 return -EINVAL;
445 }
446
447 static int moxa_check_fw(const void *ptr)
448 {
449 const __le16 *lptr = ptr;
450
451 if (*lptr != cpu_to_le16(0x7980))
452 return -EINVAL;
453
454 return 0;
455 }
456
457 static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
458 size_t len)
459 {
460 void __iomem *baseAddr = brd->basemem;
461 u16 tmp;
462
463 writeb(HW_reset, baseAddr + Control_reg);
464 msleep(10);
465 memset_io(baseAddr, 0, 4096);
466 memcpy_toio(baseAddr, buf, len);
467 writeb(0, baseAddr + Control_reg);
468
469 msleep(2000);
470
471 switch (brd->boardType) {
472 case MOXA_BOARD_C218_ISA:
473 case MOXA_BOARD_C218_PCI:
474 tmp = readw(baseAddr + C218_key);
475 if (tmp != C218_KeyCode)
476 goto err;
477 break;
478 case MOXA_BOARD_CP204J:
479 tmp = readw(baseAddr + C218_key);
480 if (tmp != CP204J_KeyCode)
481 goto err;
482 break;
483 default:
484 tmp = readw(baseAddr + C320_key);
485 if (tmp != C320_KeyCode)
486 goto err;
487 tmp = readw(baseAddr + C320_status);
488 if (tmp != STS_init) {
489 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
490 "module not found\n");
491 return -EIO;
492 }
493 break;
494 }
495
496 return 0;
497 err:
498 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
499 return -EIO;
500 }
501
502 static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
503 size_t len)
504 {
505 void __iomem *baseAddr = brd->basemem;
506
507 if (len < 7168) {
508 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
509 return -EINVAL;
510 }
511
512 writew(len - 7168 - 2, baseAddr + C320bapi_len);
513 writeb(1, baseAddr + Control_reg);
514 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
515 writeb(2, baseAddr + Control_reg);
516 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
517
518 return 0;
519 }
520
521 static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
522 size_t len)
523 {
524 void __iomem *baseAddr = brd->basemem;
525 const __le16 *uptr = ptr;
526 size_t wlen, len2, j;
527 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
528 unsigned int i, retry;
529 u16 usum, keycode;
530
531 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
532 C218_KeyCode;
533
534 switch (brd->boardType) {
535 case MOXA_BOARD_CP204J:
536 case MOXA_BOARD_C218_ISA:
537 case MOXA_BOARD_C218_PCI:
538 key = C218_key;
539 loadbuf = C218_LoadBuf;
540 loadlen = C218DLoad_len;
541 checksum = C218check_sum;
542 checksum_ok = C218chksum_ok;
543 break;
544 default:
545 key = C320_key;
546 keycode = C320_KeyCode;
547 loadbuf = C320_LoadBuf;
548 loadlen = C320DLoad_len;
549 checksum = C320check_sum;
550 checksum_ok = C320chksum_ok;
551 break;
552 }
553
554 usum = 0;
555 wlen = len >> 1;
556 for (i = 0; i < wlen; i++)
557 usum += le16_to_cpu(uptr[i]);
558 retry = 0;
559 do {
560 wlen = len >> 1;
561 j = 0;
562 while (wlen) {
563 len2 = (wlen > 2048) ? 2048 : wlen;
564 wlen -= len2;
565 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
566 j += len2 << 1;
567
568 writew(len2, baseAddr + loadlen);
569 writew(0, baseAddr + key);
570 for (i = 0; i < 100; i++) {
571 if (readw(baseAddr + key) == keycode)
572 break;
573 msleep(10);
574 }
575 if (readw(baseAddr + key) != keycode)
576 return -EIO;
577 }
578 writew(0, baseAddr + loadlen);
579 writew(usum, baseAddr + checksum);
580 writew(0, baseAddr + key);
581 for (i = 0; i < 100; i++) {
582 if (readw(baseAddr + key) == keycode)
583 break;
584 msleep(10);
585 }
586 retry++;
587 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
588 if (readb(baseAddr + checksum_ok) != 1)
589 return -EIO;
590
591 writew(0, baseAddr + key);
592 for (i = 0; i < 600; i++) {
593 if (readw(baseAddr + Magic_no) == Magic_code)
594 break;
595 msleep(10);
596 }
597 if (readw(baseAddr + Magic_no) != Magic_code)
598 return -EIO;
599
600 if (MOXA_IS_320(brd)) {
601 if (brd->busType == MOXA_BUS_TYPE_PCI) {
602 writew(0x3800, baseAddr + TMS320_PORT1);
603 writew(0x3900, baseAddr + TMS320_PORT2);
604 writew(28499, baseAddr + TMS320_CLOCK);
605 } else {
606 writew(0x3200, baseAddr + TMS320_PORT1);
607 writew(0x3400, baseAddr + TMS320_PORT2);
608 writew(19999, baseAddr + TMS320_CLOCK);
609 }
610 }
611 writew(1, baseAddr + Disable_IRQ);
612 writew(0, baseAddr + Magic_no);
613 for (i = 0; i < 500; i++) {
614 if (readw(baseAddr + Magic_no) == Magic_code)
615 break;
616 msleep(10);
617 }
618 if (readw(baseAddr + Magic_no) != Magic_code)
619 return -EIO;
620
621 if (MOXA_IS_320(brd)) {
622 j = readw(baseAddr + Module_cnt);
623 if (j <= 0)
624 return -EIO;
625 brd->numPorts = j * 8;
626 writew(j, baseAddr + Module_no);
627 writew(0, baseAddr + Magic_no);
628 for (i = 0; i < 600; i++) {
629 if (readw(baseAddr + Magic_no) == Magic_code)
630 break;
631 msleep(10);
632 }
633 if (readw(baseAddr + Magic_no) != Magic_code)
634 return -EIO;
635 }
636 brd->intNdx = baseAddr + IRQindex;
637 brd->intPend = baseAddr + IRQpending;
638 brd->intTable = baseAddr + IRQtable;
639
640 return 0;
641 }
642
643 static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
644 size_t len)
645 {
646 void __iomem *ofsAddr, *baseAddr = brd->basemem;
647 struct moxa_port *port;
648 int retval, i;
649
650 if (len % 2) {
651 printk(KERN_ERR "MOXA: bios length is not even\n");
652 return -EINVAL;
653 }
654
655 retval = moxa_real_load_code(brd, ptr, len);
656 if (retval)
657 return retval;
658
659 switch (brd->boardType) {
660 case MOXA_BOARD_C218_ISA:
661 case MOXA_BOARD_C218_PCI:
662 case MOXA_BOARD_CP204J:
663 port = brd->ports;
664 for (i = 0; i < brd->numPorts; i++, port++) {
665 port->board = brd;
666 port->DCDState = 0;
667 port->tableAddr = baseAddr + Extern_table +
668 Extern_size * i;
669 ofsAddr = port->tableAddr;
670 writew(C218rx_mask, ofsAddr + RX_mask);
671 writew(C218tx_mask, ofsAddr + TX_mask);
672 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
673 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
674
675 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
676 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
677
678 }
679 break;
680 default:
681 port = brd->ports;
682 for (i = 0; i < brd->numPorts; i++, port++) {
683 port->board = brd;
684 port->DCDState = 0;
685 port->tableAddr = baseAddr + Extern_table +
686 Extern_size * i;
687 ofsAddr = port->tableAddr;
688 switch (brd->numPorts) {
689 case 8:
690 writew(C320p8rx_mask, ofsAddr + RX_mask);
691 writew(C320p8tx_mask, ofsAddr + TX_mask);
692 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
693 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
694 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
695 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
696
697 break;
698 case 16:
699 writew(C320p16rx_mask, ofsAddr + RX_mask);
700 writew(C320p16tx_mask, ofsAddr + TX_mask);
701 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
702 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
703 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
704 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
705 break;
706
707 case 24:
708 writew(C320p24rx_mask, ofsAddr + RX_mask);
709 writew(C320p24tx_mask, ofsAddr + TX_mask);
710 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
711 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
712 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
713 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
714 break;
715 case 32:
716 writew(C320p32rx_mask, ofsAddr + RX_mask);
717 writew(C320p32tx_mask, ofsAddr + TX_mask);
718 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
719 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
720 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
721 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
722 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
723 break;
724 }
725 }
726 break;
727 }
728 return 0;
729 }
730
731 static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
732 {
733 const void *ptr = fw->data;
734 char rsn[64];
735 u16 lens[5];
736 size_t len;
737 unsigned int a, lenp, lencnt;
738 int ret = -EINVAL;
739 struct {
740 __le32 magic;
741 u8 reserved1[2];
742 u8 type;
743 u8 model;
744 u8 reserved2[8];
745 __le16 len[5];
746 } const *hdr = ptr;
747
748 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
749
750 if (fw->size < MOXA_FW_HDRLEN) {
751 strcpy(rsn, "too short (even header won't fit)");
752 goto err;
753 }
754 if (hdr->magic != cpu_to_le32(0x30343034)) {
755 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
756 goto err;
757 }
758 if (hdr->type != 3) {
759 sprintf(rsn, "not for linux, type is %u", hdr->type);
760 goto err;
761 }
762 if (moxa_check_fw_model(brd, hdr->model)) {
763 sprintf(rsn, "not for this card, model is %u", hdr->model);
764 goto err;
765 }
766
767 len = MOXA_FW_HDRLEN;
768 lencnt = hdr->model == 2 ? 5 : 3;
769 for (a = 0; a < ARRAY_SIZE(lens); a++) {
770 lens[a] = le16_to_cpu(hdr->len[a]);
771 if (lens[a] && len + lens[a] <= fw->size &&
772 moxa_check_fw(&fw->data[len]))
773 printk(KERN_WARNING "MOXA firmware: unexpected input "
774 "at offset %u, but going on\n", (u32)len);
775 if (!lens[a] && a < lencnt) {
776 sprintf(rsn, "too few entries in fw file");
777 goto err;
778 }
779 len += lens[a];
780 }
781
782 if (len != fw->size) {
783 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
784 (u32)len);
785 goto err;
786 }
787
788 ptr += MOXA_FW_HDRLEN;
789 lenp = 0;
790
791 strcpy(rsn, "read above");
792
793 ret = moxa_load_bios(brd, ptr, lens[lenp]);
794 if (ret)
795 goto err;
796
797
798 ptr += lens[lenp] + lens[lenp + 1];
799 lenp += 2;
800
801 if (hdr->model == 2) {
802 ret = moxa_load_320b(brd, ptr, lens[lenp]);
803 if (ret)
804 goto err;
805
806 ptr += lens[lenp] + lens[lenp + 1];
807 lenp += 2;
808 }
809
810 ret = moxa_load_code(brd, ptr, lens[lenp]);
811 if (ret)
812 goto err;
813
814 return 0;
815 err:
816 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
817 return ret;
818 }
819
820 static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
821 {
822 const struct firmware *fw;
823 const char *file;
824 struct moxa_port *p;
825 unsigned int i, first_idx;
826 int ret;
827
828 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
829 GFP_KERNEL);
830 if (brd->ports == NULL) {
831 printk(KERN_ERR "cannot allocate memory for ports\n");
832 ret = -ENOMEM;
833 goto err;
834 }
835
836 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
837 tty_port_init(&p->port);
838 p->port.ops = &moxa_port_ops;
839 p->type = PORT_16550A;
840 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
841 }
842
843 switch (brd->boardType) {
844 case MOXA_BOARD_C218_ISA:
845 case MOXA_BOARD_C218_PCI:
846 file = "c218tunx.cod";
847 break;
848 case MOXA_BOARD_CP204J:
849 file = "cp204unx.cod";
850 break;
851 default:
852 file = "c320tunx.cod";
853 break;
854 }
855
856 ret = request_firmware(&fw, file, dev);
857 if (ret) {
858 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
859 "you've placed '%s' file into your firmware "
860 "loader directory (e.g. /lib/firmware)\n",
861 file);
862 goto err_free;
863 }
864
865 ret = moxa_load_fw(brd, fw);
866
867 release_firmware(fw);
868
869 if (ret)
870 goto err_free;
871
872 spin_lock_bh(&moxa_lock);
873 brd->ready = 1;
874 if (!timer_pending(&moxaTimer))
875 mod_timer(&moxaTimer, jiffies + HZ / 50);
876 spin_unlock_bh(&moxa_lock);
877
878 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
879 for (i = 0; i < brd->numPorts; i++)
880 tty_port_register_device(&brd->ports[i].port, moxaDriver,
881 first_idx + i, dev);
882
883 return 0;
884 err_free:
885 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
886 tty_port_destroy(&brd->ports[i].port);
887 kfree(brd->ports);
888 err:
889 return ret;
890 }
891
892 static void moxa_board_deinit(struct moxa_board_conf *brd)
893 {
894 unsigned int a, opened, first_idx;
895
896 mutex_lock(&moxa_openlock);
897 spin_lock_bh(&moxa_lock);
898 brd->ready = 0;
899 spin_unlock_bh(&moxa_lock);
900
901
902 for (a = 0; a < brd->numPorts; a++)
903 if (tty_port_initialized(&brd->ports[a].port))
904 tty_port_tty_hangup(&brd->ports[a].port, false);
905
906 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
907 tty_port_destroy(&brd->ports[a].port);
908
909 while (1) {
910 opened = 0;
911 for (a = 0; a < brd->numPorts; a++)
912 if (tty_port_initialized(&brd->ports[a].port))
913 opened++;
914 mutex_unlock(&moxa_openlock);
915 if (!opened)
916 break;
917 msleep(50);
918 mutex_lock(&moxa_openlock);
919 }
920
921 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
922 for (a = 0; a < brd->numPorts; a++)
923 tty_unregister_device(moxaDriver, first_idx + a);
924
925 iounmap(brd->basemem);
926 brd->basemem = NULL;
927 kfree(brd->ports);
928 }
929
930 #ifdef CONFIG_PCI
931 static int moxa_pci_probe(struct pci_dev *pdev,
932 const struct pci_device_id *ent)
933 {
934 struct moxa_board_conf *board;
935 unsigned int i;
936 int board_type = ent->driver_data;
937 int retval;
938
939 retval = pci_enable_device(pdev);
940 if (retval) {
941 dev_err(&pdev->dev, "can't enable pci device\n");
942 goto err;
943 }
944
945 for (i = 0; i < MAX_BOARDS; i++)
946 if (moxa_boards[i].basemem == NULL)
947 break;
948
949 retval = -ENODEV;
950 if (i >= MAX_BOARDS) {
951 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
952 "found. Board is ignored.\n", MAX_BOARDS);
953 goto err;
954 }
955
956 board = &moxa_boards[i];
957
958 retval = pci_request_region(pdev, 2, "moxa-base");
959 if (retval) {
960 dev_err(&pdev->dev, "can't request pci region 2\n");
961 goto err;
962 }
963
964 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
965 if (board->basemem == NULL) {
966 dev_err(&pdev->dev, "can't remap io space 2\n");
967 retval = -ENOMEM;
968 goto err_reg;
969 }
970
971 board->boardType = board_type;
972 switch (board_type) {
973 case MOXA_BOARD_C218_ISA:
974 case MOXA_BOARD_C218_PCI:
975 board->numPorts = 8;
976 break;
977
978 case MOXA_BOARD_CP204J:
979 board->numPorts = 4;
980 break;
981 default:
982 board->numPorts = 0;
983 break;
984 }
985 board->busType = MOXA_BUS_TYPE_PCI;
986
987 retval = moxa_init_board(board, &pdev->dev);
988 if (retval)
989 goto err_base;
990
991 pci_set_drvdata(pdev, board);
992
993 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994 moxa_brdname[board_type - 1], board->numPorts);
995
996 return 0;
997 err_base:
998 iounmap(board->basemem);
999 board->basemem = NULL;
1000 err_reg:
1001 pci_release_region(pdev, 2);
1002 err:
1003 return retval;
1004 }
1005
1006 static void moxa_pci_remove(struct pci_dev *pdev)
1007 {
1008 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009
1010 moxa_board_deinit(brd);
1011
1012 pci_release_region(pdev, 2);
1013 }
1014
1015 static struct pci_driver moxa_pci_driver = {
1016 .name = "moxa",
1017 .id_table = moxa_pcibrds,
1018 .probe = moxa_pci_probe,
1019 .remove = moxa_pci_remove
1020 };
1021 #endif
1022
1023 static int __init moxa_init(void)
1024 {
1025 unsigned int isabrds = 0;
1026 int retval = 0;
1027 struct moxa_board_conf *brd = moxa_boards;
1028 unsigned int i;
1029
1030 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1031 MOXA_VERSION);
1032
1033 tty_port_init(&moxa_service_port);
1034
1035 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1036 TTY_DRIVER_REAL_RAW |
1037 TTY_DRIVER_DYNAMIC_DEV);
1038 if (IS_ERR(moxaDriver))
1039 return PTR_ERR(moxaDriver);
1040
1041 moxaDriver->name = "ttyMX";
1042 moxaDriver->major = ttymajor;
1043 moxaDriver->minor_start = 0;
1044 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1045 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1046 moxaDriver->init_termios = tty_std_termios;
1047 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1048 moxaDriver->init_termios.c_ispeed = 9600;
1049 moxaDriver->init_termios.c_ospeed = 9600;
1050 tty_set_operations(moxaDriver, &moxa_ops);
1051
1052 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1053
1054 if (tty_register_driver(moxaDriver)) {
1055 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1056 put_tty_driver(moxaDriver);
1057 return -1;
1058 }
1059
1060
1061
1062 for (i = 0; i < MAX_BOARDS; i++) {
1063 if (!baseaddr[i])
1064 break;
1065 if (type[i] == MOXA_BOARD_C218_ISA ||
1066 type[i] == MOXA_BOARD_C320_ISA) {
1067 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1068 isabrds + 1, moxa_brdname[type[i] - 1],
1069 baseaddr[i]);
1070 brd->boardType = type[i];
1071 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1072 numports[i];
1073 brd->busType = MOXA_BUS_TYPE_ISA;
1074 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
1075 if (!brd->basemem) {
1076 printk(KERN_ERR "MOXA: can't remap %lx\n",
1077 baseaddr[i]);
1078 continue;
1079 }
1080 if (moxa_init_board(brd, NULL)) {
1081 iounmap(brd->basemem);
1082 brd->basemem = NULL;
1083 continue;
1084 }
1085
1086 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1087 "ready (%u ports, firmware loaded)\n",
1088 baseaddr[i], brd->numPorts);
1089
1090 brd++;
1091 isabrds++;
1092 }
1093 }
1094
1095 #ifdef CONFIG_PCI
1096 retval = pci_register_driver(&moxa_pci_driver);
1097 if (retval) {
1098 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1099 if (isabrds)
1100 retval = 0;
1101 }
1102 #endif
1103
1104 return retval;
1105 }
1106
1107 static void __exit moxa_exit(void)
1108 {
1109 unsigned int i;
1110
1111 #ifdef CONFIG_PCI
1112 pci_unregister_driver(&moxa_pci_driver);
1113 #endif
1114
1115 for (i = 0; i < MAX_BOARDS; i++)
1116 if (moxa_boards[i].ready)
1117 moxa_board_deinit(&moxa_boards[i]);
1118
1119 del_timer_sync(&moxaTimer);
1120
1121 if (tty_unregister_driver(moxaDriver))
1122 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1123 "serial driver\n");
1124 put_tty_driver(moxaDriver);
1125 }
1126
1127 module_init(moxa_init);
1128 module_exit(moxa_exit);
1129
1130 static void moxa_shutdown(struct tty_port *port)
1131 {
1132 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1133 MoxaPortDisable(ch);
1134 MoxaPortFlushData(ch, 2);
1135 }
1136
1137 static int moxa_carrier_raised(struct tty_port *port)
1138 {
1139 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1140 int dcd;
1141
1142 spin_lock_irq(&port->lock);
1143 dcd = ch->DCDState;
1144 spin_unlock_irq(&port->lock);
1145 return dcd;
1146 }
1147
1148 static void moxa_dtr_rts(struct tty_port *port, int onoff)
1149 {
1150 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1151 MoxaPortLineCtrl(ch, onoff, onoff);
1152 }
1153
1154
1155 static int moxa_open(struct tty_struct *tty, struct file *filp)
1156 {
1157 struct moxa_board_conf *brd;
1158 struct moxa_port *ch;
1159 int port;
1160
1161 port = tty->index;
1162 if (port == MAX_PORTS) {
1163 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1164 }
1165 if (mutex_lock_interruptible(&moxa_openlock))
1166 return -ERESTARTSYS;
1167 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1168 if (!brd->ready) {
1169 mutex_unlock(&moxa_openlock);
1170 return -ENODEV;
1171 }
1172
1173 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1174 mutex_unlock(&moxa_openlock);
1175 return -ENODEV;
1176 }
1177
1178 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1179 ch->port.count++;
1180 tty->driver_data = ch;
1181 tty_port_tty_set(&ch->port, tty);
1182 mutex_lock(&ch->port.mutex);
1183 if (!tty_port_initialized(&ch->port)) {
1184 ch->statusflags = 0;
1185 moxa_set_tty_param(tty, &tty->termios);
1186 MoxaPortLineCtrl(ch, 1, 1);
1187 MoxaPortEnable(ch);
1188 MoxaSetFifo(ch, ch->type == PORT_16550A);
1189 tty_port_set_initialized(&ch->port, 1);
1190 }
1191 mutex_unlock(&ch->port.mutex);
1192 mutex_unlock(&moxa_openlock);
1193
1194 return tty_port_block_til_ready(&ch->port, tty, filp);
1195 }
1196
1197 static void moxa_close(struct tty_struct *tty, struct file *filp)
1198 {
1199 struct moxa_port *ch = tty->driver_data;
1200 ch->cflag = tty->termios.c_cflag;
1201 tty_port_close(&ch->port, tty, filp);
1202 }
1203
1204 static int moxa_write(struct tty_struct *tty,
1205 const unsigned char *buf, int count)
1206 {
1207 struct moxa_port *ch = tty->driver_data;
1208 unsigned long flags;
1209 int len;
1210
1211 if (ch == NULL)
1212 return 0;
1213
1214 spin_lock_irqsave(&moxa_lock, flags);
1215 len = MoxaPortWriteData(tty, buf, count);
1216 spin_unlock_irqrestore(&moxa_lock, flags);
1217
1218 set_bit(LOWWAIT, &ch->statusflags);
1219 return len;
1220 }
1221
1222 static int moxa_write_room(struct tty_struct *tty)
1223 {
1224 struct moxa_port *ch;
1225
1226 if (tty->stopped)
1227 return 0;
1228 ch = tty->driver_data;
1229 if (ch == NULL)
1230 return 0;
1231 return MoxaPortTxFree(ch);
1232 }
1233
1234 static void moxa_flush_buffer(struct tty_struct *tty)
1235 {
1236 struct moxa_port *ch = tty->driver_data;
1237
1238 if (ch == NULL)
1239 return;
1240 MoxaPortFlushData(ch, 1);
1241 tty_wakeup(tty);
1242 }
1243
1244 static int moxa_chars_in_buffer(struct tty_struct *tty)
1245 {
1246 struct moxa_port *ch = tty->driver_data;
1247 int chars;
1248
1249 chars = MoxaPortTxQueue(ch);
1250 if (chars)
1251
1252
1253
1254
1255 set_bit(EMPTYWAIT, &ch->statusflags);
1256 return chars;
1257 }
1258
1259 static int moxa_tiocmget(struct tty_struct *tty)
1260 {
1261 struct moxa_port *ch = tty->driver_data;
1262 int flag = 0, dtr, rts;
1263
1264 MoxaPortGetLineOut(ch, &dtr, &rts);
1265 if (dtr)
1266 flag |= TIOCM_DTR;
1267 if (rts)
1268 flag |= TIOCM_RTS;
1269 dtr = MoxaPortLineStatus(ch);
1270 if (dtr & 1)
1271 flag |= TIOCM_CTS;
1272 if (dtr & 2)
1273 flag |= TIOCM_DSR;
1274 if (dtr & 4)
1275 flag |= TIOCM_CD;
1276 return flag;
1277 }
1278
1279 static int moxa_tiocmset(struct tty_struct *tty,
1280 unsigned int set, unsigned int clear)
1281 {
1282 struct moxa_port *ch;
1283 int dtr, rts;
1284
1285 mutex_lock(&moxa_openlock);
1286 ch = tty->driver_data;
1287 if (!ch) {
1288 mutex_unlock(&moxa_openlock);
1289 return -EINVAL;
1290 }
1291
1292 MoxaPortGetLineOut(ch, &dtr, &rts);
1293 if (set & TIOCM_RTS)
1294 rts = 1;
1295 if (set & TIOCM_DTR)
1296 dtr = 1;
1297 if (clear & TIOCM_RTS)
1298 rts = 0;
1299 if (clear & TIOCM_DTR)
1300 dtr = 0;
1301 MoxaPortLineCtrl(ch, dtr, rts);
1302 mutex_unlock(&moxa_openlock);
1303 return 0;
1304 }
1305
1306 static void moxa_set_termios(struct tty_struct *tty,
1307 struct ktermios *old_termios)
1308 {
1309 struct moxa_port *ch = tty->driver_data;
1310
1311 if (ch == NULL)
1312 return;
1313 moxa_set_tty_param(tty, old_termios);
1314 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1315 wake_up_interruptible(&ch->port.open_wait);
1316 }
1317
1318 static void moxa_stop(struct tty_struct *tty)
1319 {
1320 struct moxa_port *ch = tty->driver_data;
1321
1322 if (ch == NULL)
1323 return;
1324 MoxaPortTxDisable(ch);
1325 set_bit(TXSTOPPED, &ch->statusflags);
1326 }
1327
1328
1329 static void moxa_start(struct tty_struct *tty)
1330 {
1331 struct moxa_port *ch = tty->driver_data;
1332
1333 if (ch == NULL)
1334 return;
1335
1336 if (!test_bit(TXSTOPPED, &ch->statusflags))
1337 return;
1338
1339 MoxaPortTxEnable(ch);
1340 clear_bit(TXSTOPPED, &ch->statusflags);
1341 }
1342
1343 static void moxa_hangup(struct tty_struct *tty)
1344 {
1345 struct moxa_port *ch = tty->driver_data;
1346 tty_port_hangup(&ch->port);
1347 }
1348
1349 static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1350 {
1351 unsigned long flags;
1352 dcd = !!dcd;
1353
1354 spin_lock_irqsave(&p->port.lock, flags);
1355 if (dcd != p->DCDState) {
1356 p->DCDState = dcd;
1357 spin_unlock_irqrestore(&p->port.lock, flags);
1358 if (!dcd)
1359 tty_port_tty_hangup(&p->port, true);
1360 }
1361 else
1362 spin_unlock_irqrestore(&p->port.lock, flags);
1363 }
1364
1365 static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1366 u16 __iomem *ip)
1367 {
1368 struct tty_struct *tty = tty_port_tty_get(&p->port);
1369 void __iomem *ofsAddr;
1370 unsigned int inited = tty_port_initialized(&p->port);
1371 u16 intr;
1372
1373 if (tty) {
1374 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1375 MoxaPortTxQueue(p) == 0) {
1376 clear_bit(EMPTYWAIT, &p->statusflags);
1377 tty_wakeup(tty);
1378 }
1379 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1380 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1381 clear_bit(LOWWAIT, &p->statusflags);
1382 tty_wakeup(tty);
1383 }
1384
1385 if (inited && !tty_throttled(tty) &&
1386 MoxaPortRxQueue(p) > 0) {
1387 MoxaPortReadData(p);
1388 tty_schedule_flip(&p->port);
1389 }
1390 } else {
1391 clear_bit(EMPTYWAIT, &p->statusflags);
1392 MoxaPortFlushData(p, 0);
1393 }
1394
1395 if (!handle)
1396 goto put;
1397
1398 intr = readw(ip);
1399 if (intr == 0)
1400 goto put;
1401
1402 writew(0, ip);
1403 ofsAddr = p->tableAddr;
1404 if (intr & IntrTx)
1405 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1406 ofsAddr + HostStat);
1407
1408 if (!inited)
1409 goto put;
1410
1411 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) {
1412 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1413 tty_schedule_flip(&p->port);
1414 }
1415
1416 if (intr & IntrLine)
1417 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1418 put:
1419 tty_kref_put(tty);
1420
1421 return 0;
1422 }
1423
1424 static void moxa_poll(struct timer_list *unused)
1425 {
1426 struct moxa_board_conf *brd;
1427 u16 __iomem *ip;
1428 unsigned int card, port, served = 0;
1429
1430 spin_lock(&moxa_lock);
1431 for (card = 0; card < MAX_BOARDS; card++) {
1432 brd = &moxa_boards[card];
1433 if (!brd->ready)
1434 continue;
1435
1436 served++;
1437
1438 ip = NULL;
1439 if (readb(brd->intPend) == 0xff)
1440 ip = brd->intTable + readb(brd->intNdx);
1441
1442 for (port = 0; port < brd->numPorts; port++)
1443 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1444
1445 if (ip)
1446 writeb(0, brd->intPend);
1447
1448 if (moxaLowWaterChk) {
1449 struct moxa_port *p = brd->ports;
1450 for (port = 0; port < brd->numPorts; port++, p++)
1451 if (p->lowChkFlag) {
1452 p->lowChkFlag = 0;
1453 moxa_low_water_check(p->tableAddr);
1454 }
1455 }
1456 }
1457 moxaLowWaterChk = 0;
1458
1459 if (served)
1460 mod_timer(&moxaTimer, jiffies + HZ / 50);
1461 spin_unlock(&moxa_lock);
1462 }
1463
1464
1465
1466 static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1467 {
1468 register struct ktermios *ts = &tty->termios;
1469 struct moxa_port *ch = tty->driver_data;
1470 int rts, cts, txflow, rxflow, xany, baud;
1471
1472 rts = cts = txflow = rxflow = xany = 0;
1473 if (ts->c_cflag & CRTSCTS)
1474 rts = cts = 1;
1475 if (ts->c_iflag & IXON)
1476 txflow = 1;
1477 if (ts->c_iflag & IXOFF)
1478 rxflow = 1;
1479 if (ts->c_iflag & IXANY)
1480 xany = 1;
1481
1482 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1483 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1484 if (baud == -1)
1485 baud = tty_termios_baud_rate(old_termios);
1486
1487 tty_encode_baud_rate(tty, baud, baud);
1488 }
1489
1490
1491
1492
1493
1494 static void MoxaPortFlushData(struct moxa_port *port, int mode)
1495 {
1496 void __iomem *ofsAddr;
1497 if (mode < 0 || mode > 2)
1498 return;
1499 ofsAddr = port->tableAddr;
1500 moxafunc(ofsAddr, FC_FlushQueue, mode);
1501 if (mode != 1) {
1502 port->lowChkFlag = 0;
1503 moxa_low_water_check(ofsAddr);
1504 }
1505 }
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1699 static void MoxaPortEnable(struct moxa_port *port)
1700 {
1701 void __iomem *ofsAddr;
1702 u16 lowwater = 512;
1703
1704 ofsAddr = port->tableAddr;
1705 writew(lowwater, ofsAddr + Low_water);
1706 if (MOXA_IS_320(port->board))
1707 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1708 else
1709 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1710 ofsAddr + HostStat);
1711
1712 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1713 moxafunc(ofsAddr, FC_FlushQueue, 2);
1714
1715 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1716 MoxaPortLineStatus(port);
1717 }
1718
1719 static void MoxaPortDisable(struct moxa_port *port)
1720 {
1721 void __iomem *ofsAddr = port->tableAddr;
1722
1723 moxafunc(ofsAddr, FC_SetFlowCtl, 0);
1724 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1725 writew(0, ofsAddr + HostStat);
1726 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1727 }
1728
1729 static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1730 {
1731 void __iomem *ofsAddr = port->tableAddr;
1732 unsigned int clock, val;
1733 speed_t max;
1734
1735 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1736 if (baud < 50)
1737 return 0;
1738 if (baud > max)
1739 baud = max;
1740 clock = 921600;
1741 val = clock / baud;
1742 moxafunc(ofsAddr, FC_SetBaud, val);
1743 baud = clock / val;
1744 return baud;
1745 }
1746
1747 static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1748 speed_t baud)
1749 {
1750 void __iomem *ofsAddr;
1751 tcflag_t mode = 0;
1752
1753 ofsAddr = port->tableAddr;
1754
1755 mode = termio->c_cflag & CSIZE;
1756 if (mode == CS5)
1757 mode = MX_CS5;
1758 else if (mode == CS6)
1759 mode = MX_CS6;
1760 else if (mode == CS7)
1761 mode = MX_CS7;
1762 else if (mode == CS8)
1763 mode = MX_CS8;
1764
1765 if (termio->c_cflag & CSTOPB) {
1766 if (mode == MX_CS5)
1767 mode |= MX_STOP15;
1768 else
1769 mode |= MX_STOP2;
1770 } else
1771 mode |= MX_STOP1;
1772
1773 if (termio->c_cflag & PARENB) {
1774 if (termio->c_cflag & PARODD) {
1775 if (termio->c_cflag & CMSPAR)
1776 mode |= MX_PARMARK;
1777 else
1778 mode |= MX_PARODD;
1779 } else {
1780 if (termio->c_cflag & CMSPAR)
1781 mode |= MX_PARSPACE;
1782 else
1783 mode |= MX_PAREVEN;
1784 }
1785 } else
1786 mode |= MX_PARNONE;
1787
1788 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1789
1790 if (MOXA_IS_320(port->board) && baud >= 921600)
1791 return -1;
1792
1793 baud = MoxaPortSetBaud(port, baud);
1794
1795 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1796 spin_lock_irq(&moxafunc_lock);
1797 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1798 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1799 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1800 moxa_wait_finish(ofsAddr);
1801 spin_unlock_irq(&moxafunc_lock);
1802
1803 }
1804 return baud;
1805 }
1806
1807 static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1808 int *rtsState)
1809 {
1810 if (dtrState)
1811 *dtrState = !!(port->lineCtrl & DTR_ON);
1812 if (rtsState)
1813 *rtsState = !!(port->lineCtrl & RTS_ON);
1814
1815 return 0;
1816 }
1817
1818 static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1819 {
1820 u8 mode = 0;
1821
1822 if (dtr)
1823 mode |= DTR_ON;
1824 if (rts)
1825 mode |= RTS_ON;
1826 port->lineCtrl = mode;
1827 moxafunc(port->tableAddr, FC_LineControl, mode);
1828 }
1829
1830 static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1831 int txflow, int rxflow, int txany)
1832 {
1833 int mode = 0;
1834
1835 if (rts)
1836 mode |= RTS_FlowCtl;
1837 if (cts)
1838 mode |= CTS_FlowCtl;
1839 if (txflow)
1840 mode |= Tx_FlowCtl;
1841 if (rxflow)
1842 mode |= Rx_FlowCtl;
1843 if (txany)
1844 mode |= IXM_IXANY;
1845 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1846 }
1847
1848 static int MoxaPortLineStatus(struct moxa_port *port)
1849 {
1850 void __iomem *ofsAddr;
1851 int val;
1852
1853 ofsAddr = port->tableAddr;
1854 if (MOXA_IS_320(port->board))
1855 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1856 else
1857 val = readw(ofsAddr + FlagStat) >> 4;
1858 val &= 0x0B;
1859 if (val & 8)
1860 val |= 4;
1861 moxa_new_dcdstate(port, val & 8);
1862 val &= 7;
1863 return val;
1864 }
1865
1866 static int MoxaPortWriteData(struct tty_struct *tty,
1867 const unsigned char *buffer, int len)
1868 {
1869 struct moxa_port *port = tty->driver_data;
1870 void __iomem *baseAddr, *ofsAddr, *ofs;
1871 unsigned int c, total;
1872 u16 head, tail, tx_mask, spage, epage;
1873 u16 pageno, pageofs, bufhead;
1874
1875 ofsAddr = port->tableAddr;
1876 baseAddr = port->board->basemem;
1877 tx_mask = readw(ofsAddr + TX_mask);
1878 spage = readw(ofsAddr + Page_txb);
1879 epage = readw(ofsAddr + EndPage_txb);
1880 tail = readw(ofsAddr + TXwptr);
1881 head = readw(ofsAddr + TXrptr);
1882 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1883 if (c > len)
1884 c = len;
1885 moxaLog.txcnt[port->port.tty->index] += c;
1886 total = c;
1887 if (spage == epage) {
1888 bufhead = readw(ofsAddr + Ofs_txb);
1889 writew(spage, baseAddr + Control_reg);
1890 while (c > 0) {
1891 if (head > tail)
1892 len = head - tail - 1;
1893 else
1894 len = tx_mask + 1 - tail;
1895 len = (c > len) ? len : c;
1896 ofs = baseAddr + DynPage_addr + bufhead + tail;
1897 memcpy_toio(ofs, buffer, len);
1898 buffer += len;
1899 tail = (tail + len) & tx_mask;
1900 c -= len;
1901 }
1902 } else {
1903 pageno = spage + (tail >> 13);
1904 pageofs = tail & Page_mask;
1905 while (c > 0) {
1906 len = Page_size - pageofs;
1907 if (len > c)
1908 len = c;
1909 writeb(pageno, baseAddr + Control_reg);
1910 ofs = baseAddr + DynPage_addr + pageofs;
1911 memcpy_toio(ofs, buffer, len);
1912 buffer += len;
1913 if (++pageno == epage)
1914 pageno = spage;
1915 pageofs = 0;
1916 c -= len;
1917 }
1918 tail = (tail + total) & tx_mask;
1919 }
1920 writew(tail, ofsAddr + TXwptr);
1921 writeb(1, ofsAddr + CD180TXirq);
1922 return total;
1923 }
1924
1925 static int MoxaPortReadData(struct moxa_port *port)
1926 {
1927 struct tty_struct *tty = port->port.tty;
1928 unsigned char *dst;
1929 void __iomem *baseAddr, *ofsAddr, *ofs;
1930 unsigned int count, len, total;
1931 u16 tail, rx_mask, spage, epage;
1932 u16 pageno, pageofs, bufhead, head;
1933
1934 ofsAddr = port->tableAddr;
1935 baseAddr = port->board->basemem;
1936 head = readw(ofsAddr + RXrptr);
1937 tail = readw(ofsAddr + RXwptr);
1938 rx_mask = readw(ofsAddr + RX_mask);
1939 spage = readw(ofsAddr + Page_rxb);
1940 epage = readw(ofsAddr + EndPage_rxb);
1941 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1942 if (count == 0)
1943 return 0;
1944
1945 total = count;
1946 moxaLog.rxcnt[tty->index] += total;
1947 if (spage == epage) {
1948 bufhead = readw(ofsAddr + Ofs_rxb);
1949 writew(spage, baseAddr + Control_reg);
1950 while (count > 0) {
1951 ofs = baseAddr + DynPage_addr + bufhead + head;
1952 len = (tail >= head) ? (tail - head) :
1953 (rx_mask + 1 - head);
1954 len = tty_prepare_flip_string(&port->port, &dst,
1955 min(len, count));
1956 memcpy_fromio(dst, ofs, len);
1957 head = (head + len) & rx_mask;
1958 count -= len;
1959 }
1960 } else {
1961 pageno = spage + (head >> 13);
1962 pageofs = head & Page_mask;
1963 while (count > 0) {
1964 writew(pageno, baseAddr + Control_reg);
1965 ofs = baseAddr + DynPage_addr + pageofs;
1966 len = tty_prepare_flip_string(&port->port, &dst,
1967 min(Page_size - pageofs, count));
1968 memcpy_fromio(dst, ofs, len);
1969
1970 count -= len;
1971 pageofs = (pageofs + len) & Page_mask;
1972 if (pageofs == 0 && ++pageno == epage)
1973 pageno = spage;
1974 }
1975 head = (head + total) & rx_mask;
1976 }
1977 writew(head, ofsAddr + RXrptr);
1978 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1979 moxaLowWaterChk = 1;
1980 port->lowChkFlag = 1;
1981 }
1982 return total;
1983 }
1984
1985
1986 static int MoxaPortTxQueue(struct moxa_port *port)
1987 {
1988 void __iomem *ofsAddr = port->tableAddr;
1989 u16 rptr, wptr, mask;
1990
1991 rptr = readw(ofsAddr + TXrptr);
1992 wptr = readw(ofsAddr + TXwptr);
1993 mask = readw(ofsAddr + TX_mask);
1994 return (wptr - rptr) & mask;
1995 }
1996
1997 static int MoxaPortTxFree(struct moxa_port *port)
1998 {
1999 void __iomem *ofsAddr = port->tableAddr;
2000 u16 rptr, wptr, mask;
2001
2002 rptr = readw(ofsAddr + TXrptr);
2003 wptr = readw(ofsAddr + TXwptr);
2004 mask = readw(ofsAddr + TX_mask);
2005 return mask - ((wptr - rptr) & mask);
2006 }
2007
2008 static int MoxaPortRxQueue(struct moxa_port *port)
2009 {
2010 void __iomem *ofsAddr = port->tableAddr;
2011 u16 rptr, wptr, mask;
2012
2013 rptr = readw(ofsAddr + RXrptr);
2014 wptr = readw(ofsAddr + RXwptr);
2015 mask = readw(ofsAddr + RX_mask);
2016 return (wptr - rptr) & mask;
2017 }
2018
2019 static void MoxaPortTxDisable(struct moxa_port *port)
2020 {
2021 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2022 }
2023
2024 static void MoxaPortTxEnable(struct moxa_port *port)
2025 {
2026 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2027 }
2028
2029 static int moxa_get_serial_info(struct tty_struct *tty,
2030 struct serial_struct *ss)
2031 {
2032 struct moxa_port *info = tty->driver_data;
2033
2034 if (tty->index == MAX_PORTS)
2035 return -EINVAL;
2036 if (!info)
2037 return -ENODEV;
2038 mutex_lock(&info->port.mutex);
2039 ss->type = info->type,
2040 ss->line = info->port.tty->index,
2041 ss->flags = info->port.flags,
2042 ss->baud_base = 921600,
2043 ss->close_delay = info->port.close_delay;
2044 mutex_unlock(&info->port.mutex);
2045 return 0;
2046 }
2047
2048
2049 static int moxa_set_serial_info(struct tty_struct *tty,
2050 struct serial_struct *ss)
2051 {
2052 struct moxa_port *info = tty->driver_data;
2053
2054 if (tty->index == MAX_PORTS)
2055 return -EINVAL;
2056 if (!info)
2057 return -ENODEV;
2058
2059 if (ss->irq != 0 || ss->port != 0 ||
2060 ss->custom_divisor != 0 ||
2061 ss->baud_base != 921600)
2062 return -EPERM;
2063
2064 mutex_lock(&info->port.mutex);
2065 if (!capable(CAP_SYS_ADMIN)) {
2066 if (((ss->flags & ~ASYNC_USR_MASK) !=
2067 (info->port.flags & ~ASYNC_USR_MASK))) {
2068 mutex_unlock(&info->port.mutex);
2069 return -EPERM;
2070 }
2071 }
2072 info->port.close_delay = ss->close_delay * HZ / 100;
2073
2074 MoxaSetFifo(info, ss->type == PORT_16550A);
2075
2076 info->type = ss->type;
2077 mutex_unlock(&info->port.mutex);
2078 return 0;
2079 }
2080
2081
2082
2083
2084
2085
2086
2087 static void MoxaSetFifo(struct moxa_port *port, int enable)
2088 {
2089 void __iomem *ofsAddr = port->tableAddr;
2090
2091 if (!enable) {
2092 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2093 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2094 } else {
2095 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2096 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2097 }
2098 }