drivers/phy/ti/phy-twl4030-usb.c

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This source file includes following definitions.
cable_present
twl4030_i2c_write_u8_verify
twl4030_usb_write
twl4030_readb
twl4030_usb_read
twl4030_usb_set_bits
twl4030_usb_clear_bits
twl4030_is_driving_vbus
twl4030_usb_linkstat
twl4030_usb_set_mode
twl4030_i2c_access
__twl4030_phy_power
twl4030_usb_suspend
twl4030_usb_resume
twl4030_usb_runtime_suspend
twl4030_usb_runtime_resume
twl4030_phy_power_off
twl4030_phy_power_on
twl4030_usb_ldo_init
twl4030_usb_vbus_show
twl4030_usb_irq
twl4030_id_workaround_work
twl4030_phy_init
twl4030_set_peripheral
twl4030_set_host
twl4030_usb_probe
twl4030_usb_remove
twl4030_usb_init
twl4030_usb_exit
   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   4  *
   5  * Copyright (C) 2004-2007 Texas Instruments
   6  * Copyright (C) 2008 Nokia Corporation
   7  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   8  *
   9  * Current status:
  10  *      - HS USB ULPI mode works.
  11  *      - 3-pin mode support may be added in future.
  12  */
  13 
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/workqueue.h>
  19 #include <linux/io.h>
  20 #include <linux/delay.h>
  21 #include <linux/usb/otg.h>
  22 #include <linux/phy/phy.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/usb/musb.h>
  25 #include <linux/usb/ulpi.h>
  26 #include <linux/mfd/twl.h>
  27 #include <linux/regulator/consumer.h>
  28 #include <linux/err.h>
  29 #include <linux/slab.h>
  30 
  31 /* Register defines */
  32 
  33 #define MCPC_CTRL                       0x30
  34 #define MCPC_CTRL_RTSOL                 (1 << 7)
  35 #define MCPC_CTRL_EXTSWR                (1 << 6)
  36 #define MCPC_CTRL_EXTSWC                (1 << 5)
  37 #define MCPC_CTRL_VOICESW               (1 << 4)
  38 #define MCPC_CTRL_OUT64K                (1 << 3)
  39 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
  40 #define MCPC_CTRL_HS_UART               (1 << 0)
  41 
  42 #define MCPC_IO_CTRL                    0x33
  43 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
  44 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
  45 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
  46 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
  47 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
  48 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
  49 
  50 #define MCPC_CTRL2                      0x36
  51 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
  52 
  53 #define OTHER_FUNC_CTRL                 0x80
  54 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
  55 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
  56 
  57 #define OTHER_IFC_CTRL                  0x83
  58 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
  59 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
  60 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
  61 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
  62 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
  63 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
  64 
  65 #define OTHER_INT_EN_RISE               0x86
  66 #define OTHER_INT_EN_FALL               0x89
  67 #define OTHER_INT_STS                   0x8C
  68 #define OTHER_INT_LATCH                 0x8D
  69 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
  70 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
  71 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
  72 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
  73 #define OTHER_INT_MANU                  (1 << 1)
  74 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
  75 
  76 #define ID_STATUS                       0x96
  77 #define ID_RES_FLOAT                    (1 << 4)
  78 #define ID_RES_440K                     (1 << 3)
  79 #define ID_RES_200K                     (1 << 2)
  80 #define ID_RES_102K                     (1 << 1)
  81 #define ID_RES_GND                      (1 << 0)
  82 
  83 #define POWER_CTRL                      0xAC
  84 #define POWER_CTRL_OTG_ENAB             (1 << 5)
  85 
  86 #define OTHER_IFC_CTRL2                 0xAF
  87 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
  88 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
  89 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
  90 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
  91 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
  92 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
  93 
  94 #define REG_CTRL_EN                     0xB2
  95 #define REG_CTRL_ERROR                  0xB5
  96 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
  97 
  98 #define OTHER_FUNC_CTRL2                0xB8
  99 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 100 
 101 /* following registers do not have separate _clr and _set registers */
 102 #define VBUS_DEBOUNCE                   0xC0
 103 #define ID_DEBOUNCE                     0xC1
 104 #define VBAT_TIMER                      0xD3
 105 #define PHY_PWR_CTRL                    0xFD
 106 #define PHY_PWR_PHYPWD                  (1 << 0)
 107 #define PHY_CLK_CTRL                    0xFE
 108 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 109 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 110 #define REQ_PHY_DPLL_CLK                (1 << 0)
 111 #define PHY_CLK_CTRL_STS                0xFF
 112 #define PHY_DPLL_CLK                    (1 << 0)
 113 
 114 /* In module TWL_MODULE_PM_MASTER */
 115 #define STS_HW_CONDITIONS               0x0F
 116 
 117 /* In module TWL_MODULE_PM_RECEIVER */
 118 #define VUSB_DEDICATED1                 0x7D
 119 #define VUSB_DEDICATED2                 0x7E
 120 #define VUSB1V5_DEV_GRP                 0x71
 121 #define VUSB1V5_TYPE                    0x72
 122 #define VUSB1V5_REMAP                   0x73
 123 #define VUSB1V8_DEV_GRP                 0x74
 124 #define VUSB1V8_TYPE                    0x75
 125 #define VUSB1V8_REMAP                   0x76
 126 #define VUSB3V1_DEV_GRP                 0x77
 127 #define VUSB3V1_TYPE                    0x78
 128 #define VUSB3V1_REMAP                   0x79
 129 
 130 /* In module TWL4030_MODULE_INTBR */
 131 #define PMBR1                           0x0D
 132 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 133 
 134 static irqreturn_t twl4030_usb_irq(int irq, void *_twl);
 135 /*
 136  * If VBUS is valid or ID is ground, then we know a
 137  * cable is present and we need to be runtime-enabled
 138  */
 139 static inline bool cable_present(enum musb_vbus_id_status stat)
 140 {
 141         return stat == MUSB_VBUS_VALID ||
 142                 stat == MUSB_ID_GROUND;
 143 }
 144 
 145 struct twl4030_usb {
 146         struct usb_phy          phy;
 147         struct device           *dev;
 148 
 149         /* TWL4030 internal USB regulator supplies */
 150         struct regulator        *usb1v5;
 151         struct regulator        *usb1v8;
 152         struct regulator        *usb3v1;
 153 
 154         /* for vbus reporting with irqs disabled */
 155         struct mutex            lock;
 156 
 157         /* pin configuration */
 158         enum twl4030_usb_mode   usb_mode;
 159 
 160         int                     irq;
 161         enum musb_vbus_id_status linkstat;
 162         atomic_t                connected;
 163         bool                    vbus_supplied;
 164         bool                    musb_mailbox_pending;
 165 
 166         struct delayed_work     id_workaround_work;
 167 };
 168 
 169 /* internal define on top of container_of */
 170 #define phy_to_twl(x)           container_of((x), struct twl4030_usb, phy)
 171 
 172 /*-------------------------------------------------------------------------*/
 173 
 174 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 175                 u8 module, u8 data, u8 address)
 176 {
 177         u8 check = 0xFF;
 178 
 179         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 180             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 181                                                 (check == data))
 182                 return 0;
 183         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 184                         1, module, address, check, data);
 185 
 186         /* Failed once: Try again */
 187         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
 188             (twl_i2c_read_u8(module, &check, address) >= 0) &&
 189                                                 (check == data))
 190                 return 0;
 191         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
 192                         2, module, address, check, data);
 193 
 194         /* Failed again: Return error */
 195         return -EBUSY;
 196 }
 197 
 198 #define twl4030_usb_write_verify(twl, address, data)    \
 199         twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address))
 200 
 201 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 202                 u8 address, u8 data)
 203 {
 204         int ret = 0;
 205 
 206         ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address);
 207         if (ret < 0)
 208                 dev_dbg(twl->dev,
 209                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 210         return ret;
 211 }
 212 
 213 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
 214 {
 215         u8 data;
 216         int ret = 0;
 217 
 218         ret = twl_i2c_read_u8(module, &data, address);
 219         if (ret >= 0)
 220                 ret = data;
 221         else
 222                 dev_dbg(twl->dev,
 223                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
 224                                         module, address, ret);
 225 
 226         return ret;
 227 }
 228 
 229 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 230 {
 231         return twl4030_readb(twl, TWL_MODULE_USB, address);
 232 }
 233 
 234 /*-------------------------------------------------------------------------*/
 235 
 236 static inline int
 237 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 238 {
 239         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
 240 }
 241 
 242 static inline int
 243 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 244 {
 245         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
 246 }
 247 
 248 /*-------------------------------------------------------------------------*/
 249 
 250 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
 251 {
 252         int ret;
 253 
 254         ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
 255         if (ret < 0 || !(ret & PHY_DPLL_CLK))
 256                 /*
 257                  * if clocks are off, registers are not updated,
 258                  * but we can assume we don't drive VBUS in this case
 259                  */
 260                 return false;
 261 
 262         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
 263         if (ret < 0)
 264                 return false;
 265 
 266         return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
 267 }
 268 
 269 static enum musb_vbus_id_status
 270         twl4030_usb_linkstat(struct twl4030_usb *twl)
 271 {
 272         int     status;
 273         enum musb_vbus_id_status linkstat = MUSB_UNKNOWN;
 274 
 275         twl->vbus_supplied = false;
 276 
 277         /*
 278          * For ID/VBUS sensing, see manual section 15.4.8 ...
 279          * except when using only battery backup power, two
 280          * comparators produce VBUS_PRES and ID_PRES signals,
 281          * which don't match docs elsewhere.  But ... BIT(7)
 282          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
 283          * seem to match up.  If either is true the USB_PRES
 284          * signal is active, the OTG module is activated, and
 285          * its interrupt may be raised (may wake the system).
 286          */
 287         status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS);
 288         if (status < 0)
 289                 dev_err(twl->dev, "USB link status err %d\n", status);
 290         else if (status & (BIT(7) | BIT(2))) {
 291                 if (status & BIT(7)) {
 292                         if (twl4030_is_driving_vbus(twl))
 293                                 status &= ~BIT(7);
 294                         else
 295                                 twl->vbus_supplied = true;
 296                 }
 297 
 298                 if (status & BIT(2))
 299                         linkstat = MUSB_ID_GROUND;
 300                 else if (status & BIT(7))
 301                         linkstat = MUSB_VBUS_VALID;
 302                 else
 303                         linkstat = MUSB_VBUS_OFF;
 304         } else {
 305                 if (twl->linkstat != MUSB_UNKNOWN)
 306                         linkstat = MUSB_VBUS_OFF;
 307         }
 308 
 309         kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID
 310                                         ? KOBJ_ONLINE : KOBJ_OFFLINE);
 311 
 312         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
 313                         status, status, linkstat);
 314 
 315         /* REVISIT this assumes host and peripheral controllers
 316          * are registered, and that both are active...
 317          */
 318 
 319         return linkstat;
 320 }
 321 
 322 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 323 {
 324         twl->usb_mode = mode;
 325 
 326         switch (mode) {
 327         case T2_USB_MODE_ULPI:
 328                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
 329                                         ULPI_IFC_CTRL_CARKITMODE);
 330                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 331                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
 332                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
 333                                         ULPI_FUNC_CTRL_OPMODE_MASK);
 334                 break;
 335         case -1:
 336                 /* FIXME: power on defaults */
 337                 break;
 338         default:
 339                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
 340                                 mode);
 341                 break;
 342         }
 343 }
 344 
 345 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 346 {
 347         unsigned long timeout;
 348         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 349 
 350         if (val >= 0) {
 351                 if (on) {
 352                         /* enable DPLL to access PHY registers over I2C */
 353                         val |= REQ_PHY_DPLL_CLK;
 354                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 355                                                 (u8)val) < 0);
 356 
 357                         timeout = jiffies + HZ;
 358                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 359                                                         PHY_DPLL_CLK)
 360                                 && time_before(jiffies, timeout))
 361                                         udelay(10);
 362                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 363                                                         PHY_DPLL_CLK))
 364                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 365                                                 "PHY DPLL clock\n");
 366                 } else {
 367                         /* let ULPI control the DPLL clock */
 368                         val &= ~REQ_PHY_DPLL_CLK;
 369                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 370                                                 (u8)val) < 0);
 371                 }
 372         }
 373 }
 374 
 375 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
 376 {
 377         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 378 
 379         if (on)
 380                 pwr &= ~PHY_PWR_PHYPWD;
 381         else
 382                 pwr |= PHY_PWR_PHYPWD;
 383 
 384         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 385 }
 386 
 387 static int __maybe_unused twl4030_usb_suspend(struct device *dev)
 388 {
 389         struct twl4030_usb *twl = dev_get_drvdata(dev);
 390 
 391         /*
 392          * we need enabled runtime on resume,
 393          * so turn irq off here, so we do not get it early
 394          * note: wakeup on usb plug works independently of this
 395          */
 396         dev_dbg(twl->dev, "%s\n", __func__);
 397         disable_irq(twl->irq);
 398 
 399         return 0;
 400 }
 401 
 402 static int __maybe_unused twl4030_usb_resume(struct device *dev)
 403 {
 404         struct twl4030_usb *twl = dev_get_drvdata(dev);
 405 
 406         dev_dbg(twl->dev, "%s\n", __func__);
 407         enable_irq(twl->irq);
 408         /* check whether cable status changed */
 409         twl4030_usb_irq(0, twl);
 410 
 411         return 0;
 412 }
 413 
 414 static int __maybe_unused twl4030_usb_runtime_suspend(struct device *dev)
 415 {
 416         struct twl4030_usb *twl = dev_get_drvdata(dev);
 417 
 418         dev_dbg(twl->dev, "%s\n", __func__);
 419 
 420         __twl4030_phy_power(twl, 0);
 421         regulator_disable(twl->usb1v5);
 422         regulator_disable(twl->usb1v8);
 423         regulator_disable(twl->usb3v1);
 424 
 425         return 0;
 426 }
 427 
 428 static int __maybe_unused twl4030_usb_runtime_resume(struct device *dev)
 429 {
 430         struct twl4030_usb *twl = dev_get_drvdata(dev);
 431         int res;
 432 
 433         dev_dbg(twl->dev, "%s\n", __func__);
 434 
 435         res = regulator_enable(twl->usb3v1);
 436         if (res)
 437                 dev_err(twl->dev, "Failed to enable usb3v1\n");
 438 
 439         res = regulator_enable(twl->usb1v8);
 440         if (res)
 441                 dev_err(twl->dev, "Failed to enable usb1v8\n");
 442 
 443         /*
 444          * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
 445          * in twl4030) resets the VUSB_DEDICATED2 register. This reset
 446          * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
 447          * SLEEP. We work around this by clearing the bit after usv3v1
 448          * is re-activated. This ensures that VUSB3V1 is really active.
 449          */
 450         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 451 
 452         res = regulator_enable(twl->usb1v5);
 453         if (res)
 454                 dev_err(twl->dev, "Failed to enable usb1v5\n");
 455 
 456         __twl4030_phy_power(twl, 1);
 457         twl4030_usb_write(twl, PHY_CLK_CTRL,
 458                           twl4030_usb_read(twl, PHY_CLK_CTRL) |
 459                           (PHY_CLK_CTRL_CLOCKGATING_EN |
 460                            PHY_CLK_CTRL_CLK32K_EN));
 461 
 462         twl4030_i2c_access(twl, 1);
 463         twl4030_usb_set_mode(twl, twl->usb_mode);
 464         if (twl->usb_mode == T2_USB_MODE_ULPI)
 465                 twl4030_i2c_access(twl, 0);
 466         /*
 467          * According to the TPS65950 TRM, there has to be at least 50ms
 468          * delay between setting POWER_CTRL_OTG_ENAB and enabling charging
 469          * so wait here so that a fully enabled phy can be expected after
 470          * resume
 471          */
 472         msleep(50);
 473         return 0;
 474 }
 475 
 476 static int twl4030_phy_power_off(struct phy *phy)
 477 {
 478         struct twl4030_usb *twl = phy_get_drvdata(phy);
 479 
 480         dev_dbg(twl->dev, "%s\n", __func__);
 481 
 482         return 0;
 483 }
 484 
 485 static int twl4030_phy_power_on(struct phy *phy)
 486 {
 487         struct twl4030_usb *twl = phy_get_drvdata(phy);
 488 
 489         dev_dbg(twl->dev, "%s\n", __func__);
 490         pm_runtime_get_sync(twl->dev);
 491         schedule_delayed_work(&twl->id_workaround_work, HZ);
 492         pm_runtime_mark_last_busy(twl->dev);
 493         pm_runtime_put_autosuspend(twl->dev);
 494 
 495         return 0;
 496 }
 497 
 498 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
 499 {
 500         /* Enable writing to power configuration registers */
 501         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
 502                          TWL4030_PM_MASTER_PROTECT_KEY);
 503 
 504         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
 505                          TWL4030_PM_MASTER_PROTECT_KEY);
 506 
 507         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
 508         /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
 509 
 510         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 511         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 512 
 513         /* Initialize 3.1V regulator */
 514         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
 515 
 516         twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1");
 517         if (IS_ERR(twl->usb3v1))
 518                 return -ENODEV;
 519 
 520         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 521 
 522         /* Initialize 1.5V regulator */
 523         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
 524 
 525         twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5");
 526         if (IS_ERR(twl->usb1v5))
 527                 return -ENODEV;
 528 
 529         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 530 
 531         /* Initialize 1.8V regulator */
 532         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
 533 
 534         twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8");
 535         if (IS_ERR(twl->usb1v8))
 536                 return -ENODEV;
 537 
 538         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 539 
 540         /* disable access to power configuration registers */
 541         twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
 542                          TWL4030_PM_MASTER_PROTECT_KEY);
 543 
 544         return 0;
 545 }
 546 
 547 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 548                 struct device_attribute *attr, char *buf)
 549 {
 550         struct twl4030_usb *twl = dev_get_drvdata(dev);
 551         int ret = -EINVAL;
 552 
 553         mutex_lock(&twl->lock);
 554         ret = sprintf(buf, "%s\n",
 555                         twl->vbus_supplied ? "on" : "off");
 556         mutex_unlock(&twl->lock);
 557 
 558         return ret;
 559 }
 560 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 561 
 562 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 563 {
 564         struct twl4030_usb *twl = _twl;
 565         enum musb_vbus_id_status status;
 566         int err;
 567 
 568         status = twl4030_usb_linkstat(twl);
 569 
 570         mutex_lock(&twl->lock);
 571         twl->linkstat = status;
 572         mutex_unlock(&twl->lock);
 573 
 574         if (cable_present(status)) {
 575                 if (atomic_add_unless(&twl->connected, 1, 1)) {
 576                         dev_dbg(twl->dev, "%s: cable connected %i\n",
 577                                 __func__, status);
 578                         pm_runtime_get_sync(twl->dev);
 579                         twl->musb_mailbox_pending = true;
 580                 }
 581         } else {
 582                 if (atomic_add_unless(&twl->connected, -1, 0)) {
 583                         dev_dbg(twl->dev, "%s: cable disconnected %i\n",
 584                                 __func__, status);
 585                         pm_runtime_mark_last_busy(twl->dev);
 586                         pm_runtime_put_autosuspend(twl->dev);
 587                         twl->musb_mailbox_pending = true;
 588                 }
 589         }
 590         if (twl->musb_mailbox_pending) {
 591                 err = musb_mailbox(status);
 592                 if (!err)
 593                         twl->musb_mailbox_pending = false;
 594         }
 595 
 596         /* don't schedule during sleep - irq works right then */
 597         if (status == MUSB_ID_GROUND && pm_runtime_active(twl->dev)) {
 598                 cancel_delayed_work(&twl->id_workaround_work);
 599                 schedule_delayed_work(&twl->id_workaround_work, HZ);
 600         }
 601 
 602         if (irq)
 603                 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 604 
 605         return IRQ_HANDLED;
 606 }
 607 
 608 static void twl4030_id_workaround_work(struct work_struct *work)
 609 {
 610         struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
 611                 id_workaround_work.work);
 612 
 613         twl4030_usb_irq(0, twl);
 614 }
 615 
 616 static int twl4030_phy_init(struct phy *phy)
 617 {
 618         struct twl4030_usb *twl = phy_get_drvdata(phy);
 619 
 620         pm_runtime_get_sync(twl->dev);
 621         twl->linkstat = MUSB_UNKNOWN;
 622         schedule_delayed_work(&twl->id_workaround_work, HZ);
 623         pm_runtime_mark_last_busy(twl->dev);
 624         pm_runtime_put_autosuspend(twl->dev);
 625 
 626         return 0;
 627 }
 628 
 629 static int twl4030_set_peripheral(struct usb_otg *otg,
 630                                         struct usb_gadget *gadget)
 631 {
 632         if (!otg)
 633                 return -ENODEV;
 634 
 635         otg->gadget = gadget;
 636         if (!gadget)
 637                 otg->state = OTG_STATE_UNDEFINED;
 638 
 639         return 0;
 640 }
 641 
 642 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
 643 {
 644         if (!otg)
 645                 return -ENODEV;
 646 
 647         otg->host = host;
 648         if (!host)
 649                 otg->state = OTG_STATE_UNDEFINED;
 650 
 651         return 0;
 652 }
 653 
 654 static const struct phy_ops ops = {
 655         .init           = twl4030_phy_init,
 656         .power_on       = twl4030_phy_power_on,
 657         .power_off      = twl4030_phy_power_off,
 658         .owner          = THIS_MODULE,
 659 };
 660 
 661 static const struct dev_pm_ops twl4030_usb_pm_ops = {
 662         SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend,
 663                            twl4030_usb_runtime_resume, NULL)
 664         SET_SYSTEM_SLEEP_PM_OPS(twl4030_usb_suspend, twl4030_usb_resume)
 665 };
 666 
 667 static int twl4030_usb_probe(struct platform_device *pdev)
 668 {
 669         struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev);
 670         struct twl4030_usb      *twl;
 671         struct phy              *phy;
 672         int                     status, err;
 673         struct usb_otg          *otg;
 674         struct device_node      *np = pdev->dev.of_node;
 675         struct phy_provider     *phy_provider;
 676 
 677         twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL);
 678         if (!twl)
 679                 return -ENOMEM;
 680 
 681         if (np)
 682                 of_property_read_u32(np, "usb_mode",
 683                                 (enum twl4030_usb_mode *)&twl->usb_mode);
 684         else if (pdata) {
 685                 twl->usb_mode = pdata->usb_mode;
 686         } else {
 687                 dev_err(&pdev->dev, "twl4030 initialized without pdata\n");
 688                 return -EINVAL;
 689         }
 690 
 691         otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
 692         if (!otg)
 693                 return -ENOMEM;
 694 
 695         twl->dev                = &pdev->dev;
 696         twl->irq                = platform_get_irq(pdev, 0);
 697         twl->vbus_supplied      = false;
 698         twl->linkstat           = MUSB_UNKNOWN;
 699         twl->musb_mailbox_pending = false;
 700 
 701         twl->phy.dev            = twl->dev;
 702         twl->phy.label          = "twl4030";
 703         twl->phy.otg            = otg;
 704         twl->phy.type           = USB_PHY_TYPE_USB2;
 705 
 706         otg->usb_phy            = &twl->phy;
 707         otg->set_host           = twl4030_set_host;
 708         otg->set_peripheral     = twl4030_set_peripheral;
 709 
 710         phy = devm_phy_create(twl->dev, NULL, &ops);
 711         if (IS_ERR(phy)) {
 712                 dev_dbg(&pdev->dev, "Failed to create PHY\n");
 713                 return PTR_ERR(phy);
 714         }
 715 
 716         phy_set_drvdata(phy, twl);
 717 
 718         phy_provider = devm_of_phy_provider_register(twl->dev,
 719                 of_phy_simple_xlate);
 720         if (IS_ERR(phy_provider))
 721                 return PTR_ERR(phy_provider);
 722 
 723         /* init mutex for workqueue */
 724         mutex_init(&twl->lock);
 725 
 726         INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
 727 
 728         err = twl4030_usb_ldo_init(twl);
 729         if (err) {
 730                 dev_err(&pdev->dev, "ldo init failed\n");
 731                 return err;
 732         }
 733         usb_add_phy_dev(&twl->phy);
 734 
 735         platform_set_drvdata(pdev, twl);
 736         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 737                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 738 
 739         ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier);
 740 
 741         pm_runtime_use_autosuspend(&pdev->dev);
 742         pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
 743         pm_runtime_enable(&pdev->dev);
 744         pm_runtime_get_sync(&pdev->dev);
 745 
 746         /* Our job is to use irqs and status from the power module
 747          * to keep the transceiver disabled when nothing's connected.
 748          *
 749          * FIXME we actually shouldn't start enabling it until the
 750          * USB controller drivers have said they're ready, by calling
 751          * set_host() and/or set_peripheral() ... OTG_capable boards
 752          * need both handles, otherwise just one suffices.
 753          */
 754         status = devm_request_threaded_irq(twl->dev, twl->irq, NULL,
 755                         twl4030_usb_irq, IRQF_TRIGGER_FALLING |
 756                         IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl);
 757         if (status < 0) {
 758                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 759                         twl->irq, status);
 760                 return status;
 761         }
 762 
 763         if (pdata)
 764                 err = phy_create_lookup(phy, "usb", "musb-hdrc.0");
 765         if (err)
 766                 return err;
 767 
 768         pm_runtime_mark_last_busy(&pdev->dev);
 769         pm_runtime_put_autosuspend(twl->dev);
 770 
 771         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 772         return 0;
 773 }
 774 
 775 static int twl4030_usb_remove(struct platform_device *pdev)
 776 {
 777         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 778         int val;
 779 
 780         usb_remove_phy(&twl->phy);
 781         pm_runtime_get_sync(twl->dev);
 782         cancel_delayed_work(&twl->id_workaround_work);
 783         device_remove_file(twl->dev, &dev_attr_vbus);
 784 
 785         /* set transceiver mode to power on defaults */
 786         twl4030_usb_set_mode(twl, -1);
 787 
 788         /* idle ulpi before powering off */
 789         if (cable_present(twl->linkstat))
 790                 pm_runtime_put_noidle(twl->dev);
 791         pm_runtime_mark_last_busy(twl->dev);
 792         pm_runtime_dont_use_autosuspend(&pdev->dev);
 793         pm_runtime_put_sync(twl->dev);
 794         pm_runtime_disable(twl->dev);
 795 
 796         /* autogate 60MHz ULPI clock,
 797          * clear dpll clock request for i2c access,
 798          * disable 32KHz
 799          */
 800         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 801         if (val >= 0) {
 802                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 803                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 804                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 805         }
 806 
 807         /* disable complete OTG block */
 808         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 809 
 810         return 0;
 811 }
 812 
 813 #ifdef CONFIG_OF
 814 static const struct of_device_id twl4030_usb_id_table[] = {
 815         { .compatible = "ti,twl4030-usb" },
 816         {}
 817 };
 818 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table);
 819 #endif
 820 
 821 static struct platform_driver twl4030_usb_driver = {
 822         .probe          = twl4030_usb_probe,
 823         .remove         = twl4030_usb_remove,
 824         .driver         = {
 825                 .name   = "twl4030_usb",
 826                 .pm     = &twl4030_usb_pm_ops,
 827                 .of_match_table = of_match_ptr(twl4030_usb_id_table),
 828         },
 829 };
 830 
 831 static int __init twl4030_usb_init(void)
 832 {
 833         return platform_driver_register(&twl4030_usb_driver);
 834 }
 835 subsys_initcall(twl4030_usb_init);
 836 
 837 static void __exit twl4030_usb_exit(void)
 838 {
 839         platform_driver_unregister(&twl4030_usb_driver);
 840 }
 841 module_exit(twl4030_usb_exit);
 842 
 843 MODULE_ALIAS("platform:twl4030_usb");
 844 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 845 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 846 MODULE_LICENSE("GPL");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/phy/ti/phy-twl4030-usb.c

DEFINITIONS
