This source file includes following definitions.
- clk_memmap_writel
- _clk_rmw
- clk_memmap_rmw
- clk_memmap_readl
- ti_clk_setup_ll_ops
- ti_dt_clocks_register
- ti_clk_retry_init
- ti_clk_get_reg_addr
- ti_clk_latch
- omap2_clk_provider_init
- omap2_clk_legacy_provider_init
- ti_dt_clk_init_retry_clks
- ti_clk_add_aliases
- ti_clk_setup_features
- ti_clk_get_features
- omap2_clk_enable_init_clocks
- ti_clk_add_alias
- ti_clk_register
- ti_clk_register_omap_hw
- omap2_clk_for_each
- omap2_clk_is_hw_omap
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18 #include <linux/clk.h>
19 #include <linux/clk-provider.h>
20 #include <linux/clkdev.h>
21 #include <linux/clk/ti.h>
22 #include <linux/io.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/list.h>
26 #include <linux/regmap.h>
27 #include <linux/memblock.h>
28 #include <linux/device.h>
29
30 #include "clock.h"
31
32 #undef pr_fmt
33 #define pr_fmt(fmt) "%s: " fmt, __func__
34
35 static LIST_HEAD(clk_hw_omap_clocks);
36 struct ti_clk_ll_ops *ti_clk_ll_ops;
37 static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
38
39 struct ti_clk_features ti_clk_features;
40
41 struct clk_iomap {
42 struct regmap *regmap;
43 void __iomem *mem;
44 };
45
46 static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
47
48 static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
49 {
50 struct clk_iomap *io = clk_memmaps[reg->index];
51
52 if (reg->ptr)
53 writel_relaxed(val, reg->ptr);
54 else if (io->regmap)
55 regmap_write(io->regmap, reg->offset, val);
56 else
57 writel_relaxed(val, io->mem + reg->offset);
58 }
59
60 static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
61 {
62 u32 v;
63
64 v = readl_relaxed(ptr);
65 v &= ~mask;
66 v |= val;
67 writel_relaxed(v, ptr);
68 }
69
70 static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
71 {
72 struct clk_iomap *io = clk_memmaps[reg->index];
73
74 if (reg->ptr) {
75 _clk_rmw(val, mask, reg->ptr);
76 } else if (io->regmap) {
77 regmap_update_bits(io->regmap, reg->offset, mask, val);
78 } else {
79 _clk_rmw(val, mask, io->mem + reg->offset);
80 }
81 }
82
83 static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
84 {
85 u32 val;
86 struct clk_iomap *io = clk_memmaps[reg->index];
87
88 if (reg->ptr)
89 val = readl_relaxed(reg->ptr);
90 else if (io->regmap)
91 regmap_read(io->regmap, reg->offset, &val);
92 else
93 val = readl_relaxed(io->mem + reg->offset);
94
95 return val;
96 }
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107 int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
108 {
109 if (ti_clk_ll_ops) {
110 pr_err("Attempt to register ll_ops multiple times.\n");
111 return -EBUSY;
112 }
113
114 ti_clk_ll_ops = ops;
115 ops->clk_readl = clk_memmap_readl;
116 ops->clk_writel = clk_memmap_writel;
117 ops->clk_rmw = clk_memmap_rmw;
118
119 return 0;
120 }
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130
131 void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
132 {
133 struct ti_dt_clk *c;
134 struct device_node *node, *parent;
135 struct clk *clk;
136 struct of_phandle_args clkspec;
137 char buf[64];
138 char *ptr;
139 char *tags[2];
140 int i;
141 int num_args;
142 int ret;
143 static bool clkctrl_nodes_missing;
144 static bool has_clkctrl_data;
145 static bool compat_mode;
146
147 compat_mode = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;
148
149 for (c = oclks; c->node_name != NULL; c++) {
150 strcpy(buf, c->node_name);
151 ptr = buf;
152 for (i = 0; i < 2; i++)
153 tags[i] = NULL;
154 num_args = 0;
155 while (*ptr) {
156 if (*ptr == ':') {
157 if (num_args >= 2) {
158 pr_warn("Bad number of tags on %s\n",
159 c->node_name);
160 return;
161 }
162 tags[num_args++] = ptr + 1;
163 *ptr = 0;
164 }
165 ptr++;
166 }
167
168 if (num_args && clkctrl_nodes_missing)
169 continue;
170
171 node = of_find_node_by_name(NULL, buf);
172 if (num_args && compat_mode) {
173 parent = node;
174 node = of_get_child_by_name(parent, "clk");
175 of_node_put(parent);
176 }
177
178 clkspec.np = node;
179 clkspec.args_count = num_args;
180 for (i = 0; i < num_args; i++) {
181 ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
182 if (ret) {
183 pr_warn("Bad tag in %s at %d: %s\n",
184 c->node_name, i, tags[i]);
185 of_node_put(node);
186 return;
187 }
188 }
189 clk = of_clk_get_from_provider(&clkspec);
190 of_node_put(node);
191 if (!IS_ERR(clk)) {
192 c->lk.clk = clk;
193 clkdev_add(&c->lk);
194 } else {
195 if (num_args && !has_clkctrl_data) {
196 struct device_node *np;
197
198 np = of_find_compatible_node(NULL, NULL,
199 "ti,clkctrl");
200 if (np) {
201 has_clkctrl_data = true;
202 of_node_put(np);
203 } else {
204 clkctrl_nodes_missing = true;
205
206 pr_warn("missing clkctrl nodes, please update your dts.\n");
207 continue;
208 }
209 }
210
211 pr_warn("failed to lookup clock node %s, ret=%ld\n",
212 c->node_name, PTR_ERR(clk));
213 }
214 }
215 }
216
217 struct clk_init_item {
218 struct device_node *node;
219 void *user;
220 ti_of_clk_init_cb_t func;
221 struct list_head link;
222 };
223
224 static LIST_HEAD(retry_list);
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234
235 int __init ti_clk_retry_init(struct device_node *node, void *user,
236 ti_of_clk_init_cb_t func)
237 {
238 struct clk_init_item *retry;
239
240 pr_debug("%pOFn: adding to retry list...\n", node);
241 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
242 if (!retry)
243 return -ENOMEM;
244
245 retry->node = node;
246 retry->func = func;
247 retry->user = user;
248 list_add(&retry->link, &retry_list);
249
250 return 0;
251 }
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262
263 int ti_clk_get_reg_addr(struct device_node *node, int index,
264 struct clk_omap_reg *reg)
265 {
266 u32 val;
267 int i;
268
269 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
270 if (clocks_node_ptr[i] == node->parent)
271 break;
272 }
273
274 if (i == CLK_MAX_MEMMAPS) {
275 pr_err("clk-provider not found for %pOFn!\n", node);
276 return -ENOENT;
277 }
278
279 reg->index = i;
280
281 if (of_property_read_u32_index(node, "reg", index, &val)) {
282 pr_err("%pOFn must have reg[%d]!\n", node, index);
283 return -EINVAL;
284 }
285
286 reg->offset = val;
287 reg->ptr = NULL;
288
289 return 0;
290 }
291
292 void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
293 {
294 u32 latch;
295
296 if (shift < 0)
297 return;
298
299 latch = 1 << shift;
300
301 ti_clk_ll_ops->clk_rmw(latch, latch, reg);
302 ti_clk_ll_ops->clk_rmw(0, latch, reg);
303 ti_clk_ll_ops->clk_readl(reg);
304 }
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320 int __init omap2_clk_provider_init(struct device_node *parent, int index,
321 struct regmap *syscon, void __iomem *mem)
322 {
323 struct device_node *clocks;
324 struct clk_iomap *io;
325
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327 clocks = of_get_child_by_name(parent, "clocks");
328 if (!clocks) {
329 pr_err("%pOFn missing 'clocks' child node.\n", parent);
330 return -EINVAL;
331 }
332
333
334 clocks_node_ptr[index] = clocks;
335
336 io = kzalloc(sizeof(*io), GFP_KERNEL);
337 if (!io)
338 return -ENOMEM;
339
340 io->regmap = syscon;
341 io->mem = mem;
342
343 clk_memmaps[index] = io;
344
345 return 0;
346 }
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355 void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
356 {
357 struct clk_iomap *io;
358
359 io = memblock_alloc(sizeof(*io), SMP_CACHE_BYTES);
360 if (!io)
361 panic("%s: Failed to allocate %zu bytes\n", __func__,
362 sizeof(*io));
363
364 io->mem = mem;
365
366 clk_memmaps[index] = io;
367 }
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377 void ti_dt_clk_init_retry_clks(void)
378 {
379 struct clk_init_item *retry;
380 struct clk_init_item *tmp;
381 int retries = 5;
382
383 while (!list_empty(&retry_list) && retries) {
384 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
385 pr_debug("retry-init: %pOFn\n", retry->node);
386 retry->func(retry->user, retry->node);
387 list_del(&retry->link);
388 kfree(retry);
389 }
390 retries--;
391 }
392 }
393
394 static const struct of_device_id simple_clk_match_table[] __initconst = {
395 { .compatible = "fixed-clock" },
396 { .compatible = "fixed-factor-clock" },
397 { }
398 };
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405 void __init ti_clk_add_aliases(void)
406 {
407 struct device_node *np;
408 struct clk *clk;
409
410 for_each_matching_node(np, simple_clk_match_table) {
411 struct of_phandle_args clkspec;
412
413 clkspec.np = np;
414 clk = of_clk_get_from_provider(&clkspec);
415
416 ti_clk_add_alias(NULL, clk, np->name);
417 }
418 }
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427 void __init ti_clk_setup_features(struct ti_clk_features *features)
428 {
429 memcpy(&ti_clk_features, features, sizeof(*features));
430 }
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438 const struct ti_clk_features *ti_clk_get_features(void)
439 {
440 return &ti_clk_features;
441 }
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453 void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
454 {
455 struct clk *init_clk;
456 int i;
457
458 for (i = 0; i < num_clocks; i++) {
459 init_clk = clk_get(NULL, clk_names[i]);
460 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
461 clk_names[i]))
462 continue;
463 clk_prepare_enable(init_clk);
464 }
465 }
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477 int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
478 {
479 struct clk_lookup *cl;
480
481 if (!clk)
482 return 0;
483
484 if (IS_ERR(clk))
485 return PTR_ERR(clk);
486
487 cl = kzalloc(sizeof(*cl), GFP_KERNEL);
488 if (!cl)
489 return -ENOMEM;
490
491 if (dev)
492 cl->dev_id = dev_name(dev);
493 cl->con_id = con;
494 cl->clk = clk;
495
496 clkdev_add(cl);
497
498 return 0;
499 }
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511 struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
512 const char *con)
513 {
514 struct clk *clk;
515 int ret;
516
517 clk = clk_register(dev, hw);
518 if (IS_ERR(clk))
519 return clk;
520
521 ret = ti_clk_add_alias(dev, clk, con);
522 if (ret) {
523 clk_unregister(clk);
524 return ERR_PTR(ret);
525 }
526
527 return clk;
528 }
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541 struct clk *ti_clk_register_omap_hw(struct device *dev, struct clk_hw *hw,
542 const char *con)
543 {
544 struct clk *clk;
545 struct clk_hw_omap *oclk;
546
547 clk = ti_clk_register(dev, hw, con);
548 if (IS_ERR(clk))
549 return clk;
550
551 oclk = to_clk_hw_omap(hw);
552
553 list_add(&oclk->node, &clk_hw_omap_clocks);
554
555 return clk;
556 }
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568 int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw))
569 {
570 int ret;
571 struct clk_hw_omap *hw;
572
573 list_for_each_entry(hw, &clk_hw_omap_clocks, node) {
574 ret = (*fn)(hw);
575 if (ret)
576 break;
577 }
578
579 return ret;
580 }
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589 bool omap2_clk_is_hw_omap(struct clk_hw *hw)
590 {
591 struct clk_hw_omap *oclk;
592
593 list_for_each_entry(oclk, &clk_hw_omap_clocks, node) {
594 if (&oclk->hw == hw)
595 return true;
596 }
597
598 return false;
599 }