This source file includes following definitions.
- pmc_register_id
- pmc_register_pck
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8 #ifndef __PMC_H_
9 #define __PMC_H_
10
11 #include <linux/io.h>
12 #include <linux/irqdomain.h>
13 #include <linux/regmap.h>
14 #include <linux/spinlock.h>
15
16 extern spinlock_t pmc_pcr_lock;
17
18 struct pmc_data {
19 unsigned int ncore;
20 struct clk_hw **chws;
21 unsigned int nsystem;
22 struct clk_hw **shws;
23 unsigned int nperiph;
24 struct clk_hw **phws;
25 unsigned int ngck;
26 struct clk_hw **ghws;
27 };
28
29 struct clk_range {
30 unsigned long min;
31 unsigned long max;
32 };
33
34 #define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}
35
36 struct clk_master_layout {
37 u32 offset;
38 u32 mask;
39 u8 pres_shift;
40 };
41
42 extern const struct clk_master_layout at91rm9200_master_layout;
43 extern const struct clk_master_layout at91sam9x5_master_layout;
44
45 struct clk_master_characteristics {
46 struct clk_range output;
47 u32 divisors[4];
48 u8 have_div3_pres;
49 };
50
51 struct clk_pll_layout {
52 u32 pllr_mask;
53 u16 mul_mask;
54 u8 mul_shift;
55 };
56
57 extern const struct clk_pll_layout at91rm9200_pll_layout;
58 extern const struct clk_pll_layout at91sam9g45_pll_layout;
59 extern const struct clk_pll_layout at91sam9g20_pllb_layout;
60 extern const struct clk_pll_layout sama5d3_pll_layout;
61
62 struct clk_pll_characteristics {
63 struct clk_range input;
64 int num_output;
65 const struct clk_range *output;
66 u16 *icpll;
67 u8 *out;
68 u8 upll : 1;
69 };
70
71 struct clk_programmable_layout {
72 u8 pres_mask;
73 u8 pres_shift;
74 u8 css_mask;
75 u8 have_slck_mck;
76 u8 is_pres_direct;
77 };
78
79 extern const struct clk_programmable_layout at91rm9200_programmable_layout;
80 extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
81 extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
82
83 struct clk_pcr_layout {
84 u32 offset;
85 u32 cmd;
86 u32 div_mask;
87 u32 gckcss_mask;
88 u32 pid_mask;
89 };
90
91 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
92 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
93
94 #define ndck(a, s) (a[s - 1].id + 1)
95 #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1)
96 struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem,
97 unsigned int nperiph, unsigned int ngck);
98 void pmc_data_free(struct pmc_data *pmc_data);
99
100 int of_at91_get_clk_range(struct device_node *np, const char *propname,
101 struct clk_range *range);
102
103 struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data);
104
105 struct clk_hw * __init
106 at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
107 const char *parent_name);
108
109 struct clk_hw * __init
110 at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
111 const char *parent_name);
112
113 struct clk_hw * __init
114 at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
115 const char *parent_name);
116
117 struct clk_hw * __init
118 at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
119 const struct clk_pcr_layout *layout,
120 const char *name, const char **parent_names,
121 u8 num_parents, u8 id, bool pll_audio,
122 const struct clk_range *range);
123
124 struct clk_hw * __init
125 at91_clk_register_h32mx(struct regmap *regmap, const char *name,
126 const char *parent_name);
127
128 struct clk_hw * __init
129 at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
130 const char * const *parent_names,
131 unsigned int num_parents, u8 bus_id);
132
133 struct clk_hw * __init
134 at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name,
135 u32 frequency, u32 accuracy);
136 struct clk_hw * __init
137 at91_clk_register_main_osc(struct regmap *regmap, const char *name,
138 const char *parent_name, bool bypass);
139 struct clk_hw * __init
140 at91_clk_register_rm9200_main(struct regmap *regmap,
141 const char *name,
142 const char *parent_name);
143 struct clk_hw * __init
144 at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
145 const char **parent_names, int num_parents);
146
147 struct clk_hw * __init
148 at91_clk_register_master(struct regmap *regmap, const char *name,
149 int num_parents, const char **parent_names,
150 const struct clk_master_layout *layout,
151 const struct clk_master_characteristics *characteristics);
152
153 struct clk_hw * __init
154 at91_clk_register_peripheral(struct regmap *regmap, const char *name,
155 const char *parent_name, u32 id);
156 struct clk_hw * __init
157 at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
158 const struct clk_pcr_layout *layout,
159 const char *name, const char *parent_name,
160 u32 id, const struct clk_range *range);
161
162 struct clk_hw * __init
163 at91_clk_register_pll(struct regmap *regmap, const char *name,
164 const char *parent_name, u8 id,
165 const struct clk_pll_layout *layout,
166 const struct clk_pll_characteristics *characteristics);
167 struct clk_hw * __init
168 at91_clk_register_plldiv(struct regmap *regmap, const char *name,
169 const char *parent_name);
170
171 struct clk_hw * __init
172 sam9x60_clk_register_pll(struct regmap *regmap, spinlock_t *lock,
173 const char *name, const char *parent_name, u8 id,
174 const struct clk_pll_characteristics *characteristics);
175
176 struct clk_hw * __init
177 at91_clk_register_programmable(struct regmap *regmap, const char *name,
178 const char **parent_names, u8 num_parents, u8 id,
179 const struct clk_programmable_layout *layout);
180
181 struct clk_hw * __init
182 at91_clk_register_sam9260_slow(struct regmap *regmap,
183 const char *name,
184 const char **parent_names,
185 int num_parents);
186
187 struct clk_hw * __init
188 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
189 const char **parent_names, u8 num_parents);
190
191 struct clk_hw * __init
192 at91_clk_register_system(struct regmap *regmap, const char *name,
193 const char *parent_name, u8 id);
194
195 struct clk_hw * __init
196 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
197 const char **parent_names, u8 num_parents);
198 struct clk_hw * __init
199 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
200 const char *parent_name);
201 struct clk_hw * __init
202 sam9x60_clk_register_usb(struct regmap *regmap, const char *name,
203 const char **parent_names, u8 num_parents);
204 struct clk_hw * __init
205 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
206 const char *parent_name, const u32 *divisors);
207
208 struct clk_hw * __init
209 at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
210 const char *name, const char *parent_name);
211
212 #ifdef CONFIG_PM
213 void pmc_register_id(u8 id);
214 void pmc_register_pck(u8 pck);
215 #else
216 static inline void pmc_register_id(u8 id) {}
217 static inline void pmc_register_pck(u8 pck) {}
218 #endif
219
220 #endif