root/drivers/clk/bcm/clk-bcm2835-aux.c

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DEFINITIONS

This source file includes following definitions.
  1. bcm2835_aux_clk_probe

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Broadcom
   4  */
   5 
   6 #include <linux/clk.h>
   7 #include <linux/clk-provider.h>
   8 #include <linux/io.h>
   9 #include <linux/module.h>
  10 #include <linux/platform_device.h>
  11 #include <dt-bindings/clock/bcm2835-aux.h>
  12 
  13 #define BCM2835_AUXIRQ          0x00
  14 #define BCM2835_AUXENB          0x04
  15 
  16 static int bcm2835_aux_clk_probe(struct platform_device *pdev)
  17 {
  18         struct device *dev = &pdev->dev;
  19         struct clk_hw_onecell_data *onecell;
  20         const char *parent;
  21         struct clk *parent_clk;
  22         struct resource *res;
  23         void __iomem *reg, *gate;
  24 
  25         parent_clk = devm_clk_get(dev, NULL);
  26         if (IS_ERR(parent_clk))
  27                 return PTR_ERR(parent_clk);
  28         parent = __clk_get_name(parent_clk);
  29 
  30         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  31         reg = devm_ioremap_resource(dev, res);
  32         if (IS_ERR(reg))
  33                 return PTR_ERR(reg);
  34 
  35         onecell = devm_kmalloc(dev,
  36                                struct_size(onecell, hws,
  37                                            BCM2835_AUX_CLOCK_COUNT),
  38                                GFP_KERNEL);
  39         if (!onecell)
  40                 return -ENOMEM;
  41         onecell->num = BCM2835_AUX_CLOCK_COUNT;
  42 
  43         gate = reg + BCM2835_AUXENB;
  44         onecell->hws[BCM2835_AUX_CLOCK_UART] =
  45                 clk_hw_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
  46 
  47         onecell->hws[BCM2835_AUX_CLOCK_SPI1] =
  48                 clk_hw_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
  49 
  50         onecell->hws[BCM2835_AUX_CLOCK_SPI2] =
  51                 clk_hw_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
  52 
  53         return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
  54                                       onecell);
  55 }
  56 
  57 static const struct of_device_id bcm2835_aux_clk_of_match[] = {
  58         { .compatible = "brcm,bcm2835-aux", },
  59         {},
  60 };
  61 MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match);
  62 
  63 static struct platform_driver bcm2835_aux_clk_driver = {
  64         .driver = {
  65                 .name = "bcm2835-aux-clk",
  66                 .of_match_table = bcm2835_aux_clk_of_match,
  67         },
  68         .probe          = bcm2835_aux_clk_probe,
  69 };
  70 builtin_platform_driver(bcm2835_aux_clk_driver);
  71 
  72 MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
  73 MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
  74 MODULE_LICENSE("GPL");

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