root/drivers/clk/bcm/clk-kona-setup.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. ccu_data_offsets_valid
  2. clk_requires_trigger
  3. peri_clk_data_offsets_valid
  4. bit_posn_valid
  5. bitfield_valid
  6. ccu_policy_valid
  7. policy_valid
  8. gate_valid
  9. hyst_valid
  10. sel_valid
  11. div_valid
  12. kona_dividers_valid
  13. trig_valid
  14. peri_clk_data_valid
  15. kona_clk_valid
  16. parent_process
  17. clk_sel_setup
  18. clk_sel_teardown
  19. peri_clk_teardown
  20. peri_clk_setup
  21. bcm_clk_teardown
  22. kona_clk_teardown
  23. kona_clk_setup
  24. ccu_clks_teardown
  25. kona_ccu_teardown
  26. ccu_data_valid
  27. of_clk_kona_onecell_get
  28. kona_dt_ccu_setup

   1 /*
   2  * Copyright (C) 2013 Broadcom Corporation
   3  * Copyright 2013 Linaro Limited
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation version 2.
   8  *
   9  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  10  * kind, whether express or implied; without even the implied warranty
  11  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14 
  15 #include <linux/io.h>
  16 #include <linux/of_address.h>
  17 
  18 #include "clk-kona.h"
  19 
  20 /* These are used when a selector or trigger is found to be unneeded */
  21 #define selector_clear_exists(sel)      ((sel)->width = 0)
  22 #define trigger_clear_exists(trig)      FLAG_CLEAR(trig, TRIG, EXISTS)
  23 
  24 /* Validity checking */
  25 
  26 static bool ccu_data_offsets_valid(struct ccu_data *ccu)
  27 {
  28         struct ccu_policy *ccu_policy = &ccu->policy;
  29         u32 limit;
  30 
  31         limit = ccu->range - sizeof(u32);
  32         limit = round_down(limit, sizeof(u32));
  33         if (ccu_policy_exists(ccu_policy)) {
  34                 if (ccu_policy->enable.offset > limit) {
  35                         pr_err("%s: bad policy enable offset for %s "
  36                                         "(%u > %u)\n", __func__,
  37                                 ccu->name, ccu_policy->enable.offset, limit);
  38                         return false;
  39                 }
  40                 if (ccu_policy->control.offset > limit) {
  41                         pr_err("%s: bad policy control offset for %s "
  42                                         "(%u > %u)\n", __func__,
  43                                 ccu->name, ccu_policy->control.offset, limit);
  44                         return false;
  45                 }
  46         }
  47 
  48         return true;
  49 }
  50 
  51 static bool clk_requires_trigger(struct kona_clk *bcm_clk)
  52 {
  53         struct peri_clk_data *peri = bcm_clk->u.peri;
  54         struct bcm_clk_sel *sel;
  55         struct bcm_clk_div *div;
  56 
  57         if (bcm_clk->type != bcm_clk_peri)
  58                 return false;
  59 
  60         sel = &peri->sel;
  61         if (sel->parent_count && selector_exists(sel))
  62                 return true;
  63 
  64         div = &peri->div;
  65         if (!divider_exists(div))
  66                 return false;
  67 
  68         /* Fixed dividers don't need triggers */
  69         if (!divider_is_fixed(div))
  70                 return true;
  71 
  72         div = &peri->pre_div;
  73 
  74         return divider_exists(div) && !divider_is_fixed(div);
  75 }
  76 
  77 static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk)
  78 {
  79         struct peri_clk_data *peri;
  80         struct bcm_clk_policy *policy;
  81         struct bcm_clk_gate *gate;
  82         struct bcm_clk_hyst *hyst;
  83         struct bcm_clk_div *div;
  84         struct bcm_clk_sel *sel;
  85         struct bcm_clk_trig *trig;
  86         const char *name;
  87         u32 range;
  88         u32 limit;
  89 
  90         BUG_ON(bcm_clk->type != bcm_clk_peri);
  91         peri = bcm_clk->u.peri;
  92         name = bcm_clk->init_data.name;
  93         range = bcm_clk->ccu->range;
  94 
  95         limit = range - sizeof(u32);
  96         limit = round_down(limit, sizeof(u32));
  97 
  98         policy = &peri->policy;
  99         if (policy_exists(policy)) {
 100                 if (policy->offset > limit) {
 101                         pr_err("%s: bad policy offset for %s (%u > %u)\n",
 102                                 __func__, name, policy->offset, limit);
 103                         return false;
 104                 }
 105         }
 106 
 107         gate = &peri->gate;
 108         hyst = &peri->hyst;
 109         if (gate_exists(gate)) {
 110                 if (gate->offset > limit) {
 111                         pr_err("%s: bad gate offset for %s (%u > %u)\n",
 112                                 __func__, name, gate->offset, limit);
 113                         return false;
 114                 }
 115 
 116                 if (hyst_exists(hyst)) {
 117                         if (hyst->offset > limit) {
 118                                 pr_err("%s: bad hysteresis offset for %s "
 119                                         "(%u > %u)\n", __func__,
 120                                         name, hyst->offset, limit);
 121                                 return false;
 122                         }
 123                 }
 124         } else if (hyst_exists(hyst)) {
 125                 pr_err("%s: hysteresis but no gate for %s\n", __func__, name);
 126                 return false;
 127         }
 128 
 129         div = &peri->div;
 130         if (divider_exists(div)) {
 131                 if (div->u.s.offset > limit) {
 132                         pr_err("%s: bad divider offset for %s (%u > %u)\n",
 133                                 __func__, name, div->u.s.offset, limit);
 134                         return false;
 135                 }
 136         }
 137 
 138         div = &peri->pre_div;
 139         if (divider_exists(div)) {
 140                 if (div->u.s.offset > limit) {
 141                         pr_err("%s: bad pre-divider offset for %s "
 142                                         "(%u > %u)\n",
 143                                 __func__, name, div->u.s.offset, limit);
 144                         return false;
 145                 }
 146         }
 147 
 148         sel = &peri->sel;
 149         if (selector_exists(sel)) {
 150                 if (sel->offset > limit) {
 151                         pr_err("%s: bad selector offset for %s (%u > %u)\n",
 152                                 __func__, name, sel->offset, limit);
 153                         return false;
 154                 }
 155         }
 156 
 157         trig = &peri->trig;
 158         if (trigger_exists(trig)) {
 159                 if (trig->offset > limit) {
 160                         pr_err("%s: bad trigger offset for %s (%u > %u)\n",
 161                                 __func__, name, trig->offset, limit);
 162                         return false;
 163                 }
 164         }
 165 
 166         trig = &peri->pre_trig;
 167         if (trigger_exists(trig)) {
 168                 if (trig->offset > limit) {
 169                         pr_err("%s: bad pre-trigger offset for %s (%u > %u)\n",
 170                                 __func__, name, trig->offset, limit);
 171                         return false;
 172                 }
 173         }
 174 
 175         return true;
 176 }
 177 
 178 /* A bit position must be less than the number of bits in a 32-bit register. */
 179 static bool bit_posn_valid(u32 bit_posn, const char *field_name,
 180                         const char *clock_name)
 181 {
 182         u32 limit = BITS_PER_BYTE * sizeof(u32) - 1;
 183 
 184         if (bit_posn > limit) {
 185                 pr_err("%s: bad %s bit for %s (%u > %u)\n", __func__,
 186                         field_name, clock_name, bit_posn, limit);
 187                 return false;
 188         }
 189         return true;
 190 }
 191 
 192 /*
 193  * A bitfield must be at least 1 bit wide.  Both the low-order and
 194  * high-order bits must lie within a 32-bit register.  We require
 195  * fields to be less than 32 bits wide, mainly because we use
 196  * shifting to produce field masks, and shifting a full word width
 197  * is not well-defined by the C standard.
 198  */
 199 static bool bitfield_valid(u32 shift, u32 width, const char *field_name,
 200                         const char *clock_name)
 201 {
 202         u32 limit = BITS_PER_BYTE * sizeof(u32);
 203 
 204         if (!width) {
 205                 pr_err("%s: bad %s field width 0 for %s\n", __func__,
 206                         field_name, clock_name);
 207                 return false;
 208         }
 209         if (shift + width > limit) {
 210                 pr_err("%s: bad %s for %s (%u + %u > %u)\n", __func__,
 211                         field_name, clock_name, shift, width, limit);
 212                 return false;
 213         }
 214         return true;
 215 }
 216 
 217 static bool
 218 ccu_policy_valid(struct ccu_policy *ccu_policy, const char *ccu_name)
 219 {
 220         struct bcm_lvm_en *enable = &ccu_policy->enable;
 221         struct bcm_policy_ctl *control;
 222 
 223         if (!bit_posn_valid(enable->bit, "policy enable", ccu_name))
 224                 return false;
 225 
 226         control = &ccu_policy->control;
 227         if (!bit_posn_valid(control->go_bit, "policy control GO", ccu_name))
 228                 return false;
 229 
 230         if (!bit_posn_valid(control->atl_bit, "policy control ATL", ccu_name))
 231                 return false;
 232 
 233         if (!bit_posn_valid(control->ac_bit, "policy control AC", ccu_name))
 234                 return false;
 235 
 236         return true;
 237 }
 238 
 239 static bool policy_valid(struct bcm_clk_policy *policy, const char *clock_name)
 240 {
 241         if (!bit_posn_valid(policy->bit, "policy", clock_name))
 242                 return false;
 243 
 244         return true;
 245 }
 246 
 247 /*
 248  * All gates, if defined, have a status bit, and for hardware-only
 249  * gates, that's it.  Gates that can be software controlled also
 250  * have an enable bit.  And a gate that can be hardware or software
 251  * controlled will have a hardware/software select bit.
 252  */
 253 static bool gate_valid(struct bcm_clk_gate *gate, const char *field_name,
 254                         const char *clock_name)
 255 {
 256         if (!bit_posn_valid(gate->status_bit, "gate status", clock_name))
 257                 return false;
 258 
 259         if (gate_is_sw_controllable(gate)) {
 260                 if (!bit_posn_valid(gate->en_bit, "gate enable", clock_name))
 261                         return false;
 262 
 263                 if (gate_is_hw_controllable(gate)) {
 264                         if (!bit_posn_valid(gate->hw_sw_sel_bit,
 265                                                 "gate hw/sw select",
 266                                                 clock_name))
 267                                 return false;
 268                 }
 269         } else {
 270                 BUG_ON(!gate_is_hw_controllable(gate));
 271         }
 272 
 273         return true;
 274 }
 275 
 276 static bool hyst_valid(struct bcm_clk_hyst *hyst, const char *clock_name)
 277 {
 278         if (!bit_posn_valid(hyst->en_bit, "hysteresis enable", clock_name))
 279                 return false;
 280 
 281         if (!bit_posn_valid(hyst->val_bit, "hysteresis value", clock_name))
 282                 return false;
 283 
 284         return true;
 285 }
 286 
 287 /*
 288  * A selector bitfield must be valid.  Its parent_sel array must
 289  * also be reasonable for the field.
 290  */
 291 static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name,
 292                         const char *clock_name)
 293 {
 294         if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name))
 295                 return false;
 296 
 297         if (sel->parent_count) {
 298                 u32 max_sel;
 299                 u32 limit;
 300 
 301                 /*
 302                  * Make sure the selector field can hold all the
 303                  * selector values we expect to be able to use.  A
 304                  * clock only needs to have a selector defined if it
 305                  * has more than one parent.  And in that case the
 306                  * highest selector value will be in the last entry
 307                  * in the array.
 308                  */
 309                 max_sel = sel->parent_sel[sel->parent_count - 1];
 310                 limit = (1 << sel->width) - 1;
 311                 if (max_sel > limit) {
 312                         pr_err("%s: bad selector for %s "
 313                                         "(%u needs > %u bits)\n",
 314                                 __func__, clock_name, max_sel,
 315                                 sel->width);
 316                         return false;
 317                 }
 318         } else {
 319                 pr_warn("%s: ignoring selector for %s (no parents)\n",
 320                         __func__, clock_name);
 321                 selector_clear_exists(sel);
 322                 kfree(sel->parent_sel);
 323                 sel->parent_sel = NULL;
 324         }
 325 
 326         return true;
 327 }
 328 
 329 /*
 330  * A fixed divider just needs to be non-zero.  A variable divider
 331  * has to have a valid divider bitfield, and if it has a fraction,
 332  * the width of the fraction must not be no more than the width of
 333  * the divider as a whole.
 334  */
 335 static bool div_valid(struct bcm_clk_div *div, const char *field_name,
 336                         const char *clock_name)
 337 {
 338         if (divider_is_fixed(div)) {
 339                 /* Any fixed divider value but 0 is OK */
 340                 if (div->u.fixed == 0) {
 341                         pr_err("%s: bad %s fixed value 0 for %s\n", __func__,
 342                                 field_name, clock_name);
 343                         return false;
 344                 }
 345                 return true;
 346         }
 347         if (!bitfield_valid(div->u.s.shift, div->u.s.width,
 348                                 field_name, clock_name))
 349                 return false;
 350 
 351         if (divider_has_fraction(div))
 352                 if (div->u.s.frac_width > div->u.s.width) {
 353                         pr_warn("%s: bad %s fraction width for %s (%u > %u)\n",
 354                                 __func__, field_name, clock_name,
 355                                 div->u.s.frac_width, div->u.s.width);
 356                         return false;
 357                 }
 358 
 359         return true;
 360 }
 361 
 362 /*
 363  * If a clock has two dividers, the combined number of fractional
 364  * bits must be representable in a 32-bit unsigned value.  This
 365  * is because we scale up a dividend using both dividers before
 366  * dividing to improve accuracy, and we need to avoid overflow.
 367  */
 368 static bool kona_dividers_valid(struct kona_clk *bcm_clk)
 369 {
 370         struct peri_clk_data *peri = bcm_clk->u.peri;
 371         struct bcm_clk_div *div;
 372         struct bcm_clk_div *pre_div;
 373         u32 limit;
 374 
 375         BUG_ON(bcm_clk->type != bcm_clk_peri);
 376 
 377         if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div))
 378                 return true;
 379 
 380         div = &peri->div;
 381         pre_div = &peri->pre_div;
 382         if (divider_is_fixed(div) || divider_is_fixed(pre_div))
 383                 return true;
 384 
 385         limit = BITS_PER_BYTE * sizeof(u32);
 386 
 387         return div->u.s.frac_width + pre_div->u.s.frac_width <= limit;
 388 }
 389 
 390 
 391 /* A trigger just needs to represent a valid bit position */
 392 static bool trig_valid(struct bcm_clk_trig *trig, const char *field_name,
 393                         const char *clock_name)
 394 {
 395         return bit_posn_valid(trig->bit, field_name, clock_name);
 396 }
 397 
 398 /* Determine whether the set of peripheral clock registers are valid. */
 399 static bool
 400 peri_clk_data_valid(struct kona_clk *bcm_clk)
 401 {
 402         struct peri_clk_data *peri;
 403         struct bcm_clk_policy *policy;
 404         struct bcm_clk_gate *gate;
 405         struct bcm_clk_hyst *hyst;
 406         struct bcm_clk_sel *sel;
 407         struct bcm_clk_div *div;
 408         struct bcm_clk_div *pre_div;
 409         struct bcm_clk_trig *trig;
 410         const char *name;
 411 
 412         BUG_ON(bcm_clk->type != bcm_clk_peri);
 413 
 414         /*
 415          * First validate register offsets.  This is the only place
 416          * where we need something from the ccu, so we do these
 417          * together.
 418          */
 419         if (!peri_clk_data_offsets_valid(bcm_clk))
 420                 return false;
 421 
 422         peri = bcm_clk->u.peri;
 423         name = bcm_clk->init_data.name;
 424 
 425         policy = &peri->policy;
 426         if (policy_exists(policy) && !policy_valid(policy, name))
 427                 return false;
 428 
 429         gate = &peri->gate;
 430         if (gate_exists(gate) && !gate_valid(gate, "gate", name))
 431                 return false;
 432 
 433         hyst = &peri->hyst;
 434         if (hyst_exists(hyst) && !hyst_valid(hyst, name))
 435                 return false;
 436 
 437         sel = &peri->sel;
 438         if (selector_exists(sel)) {
 439                 if (!sel_valid(sel, "selector", name))
 440                         return false;
 441 
 442         } else if (sel->parent_count > 1) {
 443                 pr_err("%s: multiple parents but no selector for %s\n",
 444                         __func__, name);
 445 
 446                 return false;
 447         }
 448 
 449         div = &peri->div;
 450         pre_div = &peri->pre_div;
 451         if (divider_exists(div)) {
 452                 if (!div_valid(div, "divider", name))
 453                         return false;
 454 
 455                 if (divider_exists(pre_div))
 456                         if (!div_valid(pre_div, "pre-divider", name))
 457                                 return false;
 458         } else if (divider_exists(pre_div)) {
 459                 pr_err("%s: pre-divider but no divider for %s\n", __func__,
 460                         name);
 461                 return false;
 462         }
 463 
 464         trig = &peri->trig;
 465         if (trigger_exists(trig)) {
 466                 if (!trig_valid(trig, "trigger", name))
 467                         return false;
 468 
 469                 if (trigger_exists(&peri->pre_trig)) {
 470                         if (!trig_valid(trig, "pre-trigger", name)) {
 471                                 return false;
 472                         }
 473                 }
 474                 if (!clk_requires_trigger(bcm_clk)) {
 475                         pr_warn("%s: ignoring trigger for %s (not needed)\n",
 476                                 __func__, name);
 477                         trigger_clear_exists(trig);
 478                 }
 479         } else if (trigger_exists(&peri->pre_trig)) {
 480                 pr_err("%s: pre-trigger but no trigger for %s\n", __func__,
 481                         name);
 482                 return false;
 483         } else if (clk_requires_trigger(bcm_clk)) {
 484                 pr_err("%s: required trigger missing for %s\n", __func__,
 485                         name);
 486                 return false;
 487         }
 488 
 489         return kona_dividers_valid(bcm_clk);
 490 }
 491 
 492 static bool kona_clk_valid(struct kona_clk *bcm_clk)
 493 {
 494         switch (bcm_clk->type) {
 495         case bcm_clk_peri:
 496                 if (!peri_clk_data_valid(bcm_clk))
 497                         return false;
 498                 break;
 499         default:
 500                 pr_err("%s: unrecognized clock type (%d)\n", __func__,
 501                         (int)bcm_clk->type);
 502                 return false;
 503         }
 504         return true;
 505 }
 506 
 507 /*
 508  * Scan an array of parent clock names to determine whether there
 509  * are any entries containing BAD_CLK_NAME.  Such entries are
 510  * placeholders for non-supported clocks.  Keep track of the
 511  * position of each clock name in the original array.
 512  *
 513  * Allocates an array of pointers to to hold the names of all
 514  * non-null entries in the original array, and returns a pointer to
 515  * that array in *names.  This will be used for registering the
 516  * clock with the common clock code.  On successful return,
 517  * *count indicates how many entries are in that names array.
 518  *
 519  * If there is more than one entry in the resulting names array,
 520  * another array is allocated to record the parent selector value
 521  * for each (defined) parent clock.  This is the value that
 522  * represents this parent clock in the clock's source selector
 523  * register.  The position of the clock in the original parent array
 524  * defines that selector value.  The number of entries in this array
 525  * is the same as the number of entries in the parent names array.
 526  *
 527  * The array of selector values is returned.  If the clock has no
 528  * parents, no selector is required and a null pointer is returned.
 529  *
 530  * Returns a null pointer if the clock names array supplied was
 531  * null.  (This is not an error.)
 532  *
 533  * Returns a pointer-coded error if an error occurs.
 534  */
 535 static u32 *parent_process(const char *clocks[],
 536                         u32 *count, const char ***names)
 537 {
 538         static const char **parent_names;
 539         static u32 *parent_sel;
 540         const char **clock;
 541         u32 parent_count;
 542         u32 bad_count = 0;
 543         u32 orig_count;
 544         u32 i;
 545         u32 j;
 546 
 547         *count = 0;     /* In case of early return */
 548         *names = NULL;
 549         if (!clocks)
 550                 return NULL;
 551 
 552         /*
 553          * Count the number of names in the null-terminated array,
 554          * and find out how many of those are actually clock names.
 555          */
 556         for (clock = clocks; *clock; clock++)
 557                 if (*clock == BAD_CLK_NAME)
 558                         bad_count++;
 559         orig_count = (u32)(clock - clocks);
 560         parent_count = orig_count - bad_count;
 561 
 562         /* If all clocks are unsupported, we treat it as no clock */
 563         if (!parent_count)
 564                 return NULL;
 565 
 566         /* Avoid exceeding our parent clock limit */
 567         if (parent_count > PARENT_COUNT_MAX) {
 568                 pr_err("%s: too many parents (%u > %u)\n", __func__,
 569                         parent_count, PARENT_COUNT_MAX);
 570                 return ERR_PTR(-EINVAL);
 571         }
 572 
 573         /*
 574          * There is one parent name for each defined parent clock.
 575          * We also maintain an array containing the selector value
 576          * for each defined clock.  If there's only one clock, the
 577          * selector is not required, but we allocate space for the
 578          * array anyway to keep things simple.
 579          */
 580         parent_names = kmalloc_array(parent_count, sizeof(*parent_names),
 581                                GFP_KERNEL);
 582         if (!parent_names)
 583                 return ERR_PTR(-ENOMEM);
 584 
 585         /* There is at least one parent, so allocate a selector array */
 586         parent_sel = kmalloc_array(parent_count, sizeof(*parent_sel),
 587                                    GFP_KERNEL);
 588         if (!parent_sel) {
 589                 kfree(parent_names);
 590 
 591                 return ERR_PTR(-ENOMEM);
 592         }
 593 
 594         /* Now fill in the parent names and selector arrays */
 595         for (i = 0, j = 0; i < orig_count; i++) {
 596                 if (clocks[i] != BAD_CLK_NAME) {
 597                         parent_names[j] = clocks[i];
 598                         parent_sel[j] = i;
 599                         j++;
 600                 }
 601         }
 602         *names = parent_names;
 603         *count = parent_count;
 604 
 605         return parent_sel;
 606 }
 607 
 608 static int
 609 clk_sel_setup(const char **clocks, struct bcm_clk_sel *sel,
 610                 struct clk_init_data *init_data)
 611 {
 612         const char **parent_names = NULL;
 613         u32 parent_count = 0;
 614         u32 *parent_sel;
 615 
 616         /*
 617          * If a peripheral clock has multiple parents, the value
 618          * used by the hardware to select that parent is represented
 619          * by the parent clock's position in the "clocks" list.  Some
 620          * values don't have defined or supported clocks; these will
 621          * have BAD_CLK_NAME entries in the parents[] array.  The
 622          * list is terminated by a NULL entry.
 623          *
 624          * We need to supply (only) the names of defined parent
 625          * clocks when registering a clock though, so we use an
 626          * array of parent selector values to map between the
 627          * indexes the common clock code uses and the selector
 628          * values we need.
 629          */
 630         parent_sel = parent_process(clocks, &parent_count, &parent_names);
 631         if (IS_ERR(parent_sel)) {
 632                 int ret = PTR_ERR(parent_sel);
 633 
 634                 pr_err("%s: error processing parent clocks for %s (%d)\n",
 635                         __func__, init_data->name, ret);
 636 
 637                 return ret;
 638         }
 639 
 640         init_data->parent_names = parent_names;
 641         init_data->num_parents = parent_count;
 642 
 643         sel->parent_count = parent_count;
 644         sel->parent_sel = parent_sel;
 645 
 646         return 0;
 647 }
 648 
 649 static void clk_sel_teardown(struct bcm_clk_sel *sel,
 650                 struct clk_init_data *init_data)
 651 {
 652         kfree(sel->parent_sel);
 653         sel->parent_sel = NULL;
 654         sel->parent_count = 0;
 655 
 656         init_data->num_parents = 0;
 657         kfree(init_data->parent_names);
 658         init_data->parent_names = NULL;
 659 }
 660 
 661 static void peri_clk_teardown(struct peri_clk_data *data,
 662                                 struct clk_init_data *init_data)
 663 {
 664         clk_sel_teardown(&data->sel, init_data);
 665 }
 666 
 667 /*
 668  * Caller is responsible for freeing the parent_names[] and
 669  * parent_sel[] arrays in the peripheral clock's "data" structure
 670  * that can be assigned if the clock has one or more parent clocks
 671  * associated with it.
 672  */
 673 static int
 674 peri_clk_setup(struct peri_clk_data *data, struct clk_init_data *init_data)
 675 {
 676         init_data->flags = CLK_IGNORE_UNUSED;
 677 
 678         return clk_sel_setup(data->clocks, &data->sel, init_data);
 679 }
 680 
 681 static void bcm_clk_teardown(struct kona_clk *bcm_clk)
 682 {
 683         switch (bcm_clk->type) {
 684         case bcm_clk_peri:
 685                 peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data);
 686                 break;
 687         default:
 688                 break;
 689         }
 690         bcm_clk->u.data = NULL;
 691         bcm_clk->type = bcm_clk_none;
 692 }
 693 
 694 static void kona_clk_teardown(struct clk_hw *hw)
 695 {
 696         struct kona_clk *bcm_clk;
 697 
 698         if (!hw)
 699                 return;
 700 
 701         clk_hw_unregister(hw);
 702 
 703         bcm_clk = to_kona_clk(hw);
 704         bcm_clk_teardown(bcm_clk);
 705 }
 706 
 707 static int kona_clk_setup(struct kona_clk *bcm_clk)
 708 {
 709         int ret;
 710         struct clk_init_data *init_data = &bcm_clk->init_data;
 711 
 712         switch (bcm_clk->type) {
 713         case bcm_clk_peri:
 714                 ret = peri_clk_setup(bcm_clk->u.data, init_data);
 715                 if (ret)
 716                         return ret;
 717                 break;
 718         default:
 719                 pr_err("%s: clock type %d invalid for %s\n", __func__,
 720                         (int)bcm_clk->type, init_data->name);
 721                 return -EINVAL;
 722         }
 723 
 724         /* Make sure everything makes sense before we set it up */
 725         if (!kona_clk_valid(bcm_clk)) {
 726                 pr_err("%s: clock data invalid for %s\n", __func__,
 727                         init_data->name);
 728                 ret = -EINVAL;
 729                 goto out_teardown;
 730         }
 731 
 732         bcm_clk->hw.init = init_data;
 733         ret = clk_hw_register(NULL, &bcm_clk->hw);
 734         if (ret) {
 735                 pr_err("%s: error registering clock %s (%d)\n", __func__,
 736                         init_data->name, ret);
 737                 goto out_teardown;
 738         }
 739 
 740         return 0;
 741 out_teardown:
 742         bcm_clk_teardown(bcm_clk);
 743 
 744         return ret;
 745 }
 746 
 747 static void ccu_clks_teardown(struct ccu_data *ccu)
 748 {
 749         u32 i;
 750 
 751         for (i = 0; i < ccu->clk_num; i++)
 752                 kona_clk_teardown(&ccu->kona_clks[i].hw);
 753 }
 754 
 755 static void kona_ccu_teardown(struct ccu_data *ccu)
 756 {
 757         if (!ccu->base)
 758                 return;
 759 
 760         of_clk_del_provider(ccu->node); /* safe if never added */
 761         ccu_clks_teardown(ccu);
 762         of_node_put(ccu->node);
 763         ccu->node = NULL;
 764         iounmap(ccu->base);
 765         ccu->base = NULL;
 766 }
 767 
 768 static bool ccu_data_valid(struct ccu_data *ccu)
 769 {
 770         struct ccu_policy *ccu_policy;
 771 
 772         if (!ccu_data_offsets_valid(ccu))
 773                 return false;
 774 
 775         ccu_policy = &ccu->policy;
 776         if (ccu_policy_exists(ccu_policy))
 777                 if (!ccu_policy_valid(ccu_policy, ccu->name))
 778                         return false;
 779 
 780         return true;
 781 }
 782 
 783 static struct clk_hw *
 784 of_clk_kona_onecell_get(struct of_phandle_args *clkspec, void *data)
 785 {
 786         struct ccu_data *ccu = data;
 787         unsigned int idx = clkspec->args[0];
 788 
 789         if (idx >= ccu->clk_num) {
 790                 pr_err("%s: invalid index %u\n", __func__, idx);
 791                 return ERR_PTR(-EINVAL);
 792         }
 793 
 794         return &ccu->kona_clks[idx].hw;
 795 }
 796 
 797 /*
 798  * Set up a CCU.  Call the provided ccu_clks_setup callback to
 799  * initialize the array of clocks provided by the CCU.
 800  */
 801 void __init kona_dt_ccu_setup(struct ccu_data *ccu,
 802                         struct device_node *node)
 803 {
 804         struct resource res = { 0 };
 805         resource_size_t range;
 806         unsigned int i;
 807         int ret;
 808 
 809         ret = of_address_to_resource(node, 0, &res);
 810         if (ret) {
 811                 pr_err("%s: no valid CCU registers found for %pOFn\n", __func__,
 812                         node);
 813                 goto out_err;
 814         }
 815 
 816         range = resource_size(&res);
 817         if (range > (resource_size_t)U32_MAX) {
 818                 pr_err("%s: address range too large for %pOFn\n", __func__,
 819                         node);
 820                 goto out_err;
 821         }
 822 
 823         ccu->range = (u32)range;
 824 
 825         if (!ccu_data_valid(ccu)) {
 826                 pr_err("%s: ccu data not valid for %pOFn\n", __func__, node);
 827                 goto out_err;
 828         }
 829 
 830         ccu->base = ioremap(res.start, ccu->range);
 831         if (!ccu->base) {
 832                 pr_err("%s: unable to map CCU registers for %pOFn\n", __func__,
 833                         node);
 834                 goto out_err;
 835         }
 836         ccu->node = of_node_get(node);
 837 
 838         /*
 839          * Set up each defined kona clock and save the result in
 840          * the clock framework clock array (in ccu->data).  Then
 841          * register as a provider for these clocks.
 842          */
 843         for (i = 0; i < ccu->clk_num; i++) {
 844                 if (!ccu->kona_clks[i].ccu)
 845                         continue;
 846                 kona_clk_setup(&ccu->kona_clks[i]);
 847         }
 848 
 849         ret = of_clk_add_hw_provider(node, of_clk_kona_onecell_get, ccu);
 850         if (ret) {
 851                 pr_err("%s: error adding ccu %pOFn as provider (%d)\n", __func__,
 852                                 node, ret);
 853                 goto out_err;
 854         }
 855 
 856         if (!kona_ccu_init(ccu))
 857                 pr_err("Broadcom %pOFn initialization had errors\n", node);
 858 
 859         return;
 860 out_err:
 861         kona_ccu_teardown(ccu);
 862         pr_err("Broadcom %pOFn setup aborted\n", node);
 863 }

/* [<][>][^][v][top][bottom][index][help] */