This source file includes following definitions.
- bmc150_magn_is_writeable_reg
- bmc150_magn_is_volatile_reg
- bmc150_magn_set_power_mode
- bmc150_magn_set_power_state
- bmc150_magn_get_odr
- bmc150_magn_set_odr
- bmc150_magn_set_max_odr
- bmc150_magn_compensate_x
- bmc150_magn_compensate_y
- bmc150_magn_compensate_z
- bmc150_magn_read_xyz
- bmc150_magn_read_raw
- bmc150_magn_write_raw
- bmc150_magn_show_samp_freq_avail
- bmc150_magn_get_mount_matrix
- bmc150_magn_trigger_handler
- bmc150_magn_init
- bmc150_magn_reset_intr
- bmc150_magn_trig_try_reen
- bmc150_magn_data_rdy_trigger_set_state
- bmc150_magn_buffer_preenable
- bmc150_magn_buffer_postdisable
- bmc150_magn_match_acpi_device
- bmc150_magn_probe
- bmc150_magn_remove
- bmc150_magn_runtime_suspend
- bmc150_magn_runtime_resume
- bmc150_magn_suspend
- bmc150_magn_resume
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12 #include <linux/module.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/delay.h>
16 #include <linux/slab.h>
17 #include <linux/acpi.h>
18 #include <linux/pm.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/events.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/regmap.h>
28
29 #include "bmc150_magn.h"
30
31 #define BMC150_MAGN_DRV_NAME "bmc150_magn"
32 #define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
33
34 #define BMC150_MAGN_REG_CHIP_ID 0x40
35 #define BMC150_MAGN_CHIP_ID_VAL 0x32
36
37 #define BMC150_MAGN_REG_X_L 0x42
38 #define BMC150_MAGN_REG_X_M 0x43
39 #define BMC150_MAGN_REG_Y_L 0x44
40 #define BMC150_MAGN_REG_Y_M 0x45
41 #define BMC150_MAGN_SHIFT_XY_L 3
42 #define BMC150_MAGN_REG_Z_L 0x46
43 #define BMC150_MAGN_REG_Z_M 0x47
44 #define BMC150_MAGN_SHIFT_Z_L 1
45 #define BMC150_MAGN_REG_RHALL_L 0x48
46 #define BMC150_MAGN_REG_RHALL_M 0x49
47 #define BMC150_MAGN_SHIFT_RHALL_L 2
48
49 #define BMC150_MAGN_REG_INT_STATUS 0x4A
50
51 #define BMC150_MAGN_REG_POWER 0x4B
52 #define BMC150_MAGN_MASK_POWER_CTL BIT(0)
53
54 #define BMC150_MAGN_REG_OPMODE_ODR 0x4C
55 #define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
56 #define BMC150_MAGN_SHIFT_OPMODE 1
57 #define BMC150_MAGN_MODE_NORMAL 0x00
58 #define BMC150_MAGN_MODE_FORCED 0x01
59 #define BMC150_MAGN_MODE_SLEEP 0x03
60 #define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
61 #define BMC150_MAGN_SHIFT_ODR 3
62
63 #define BMC150_MAGN_REG_INT 0x4D
64
65 #define BMC150_MAGN_REG_INT_DRDY 0x4E
66 #define BMC150_MAGN_MASK_DRDY_EN BIT(7)
67 #define BMC150_MAGN_SHIFT_DRDY_EN 7
68 #define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
69 #define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
70 #define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
71 #define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
72 #define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
73 #define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
74 #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
75
76 #define BMC150_MAGN_REG_LOW_THRESH 0x4F
77 #define BMC150_MAGN_REG_HIGH_THRESH 0x50
78 #define BMC150_MAGN_REG_REP_XY 0x51
79 #define BMC150_MAGN_REG_REP_Z 0x52
80 #define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
81
82 #define BMC150_MAGN_REG_TRIM_START 0x5D
83 #define BMC150_MAGN_REG_TRIM_END 0x71
84
85 #define BMC150_MAGN_XY_OVERFLOW_VAL -4096
86 #define BMC150_MAGN_Z_OVERFLOW_VAL -16384
87
88
89 #define BMC150_MAGN_START_UP_TIME_MS 3
90
91 #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
92
93 #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
94 #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
95 #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
96 #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
97
98 enum bmc150_magn_axis {
99 AXIS_X,
100 AXIS_Y,
101 AXIS_Z,
102 RHALL,
103 AXIS_XYZ_MAX = RHALL,
104 AXIS_XYZR_MAX,
105 };
106
107 enum bmc150_magn_power_modes {
108 BMC150_MAGN_POWER_MODE_SUSPEND,
109 BMC150_MAGN_POWER_MODE_SLEEP,
110 BMC150_MAGN_POWER_MODE_NORMAL,
111 };
112
113 struct bmc150_magn_trim_regs {
114 s8 x1;
115 s8 y1;
116 __le16 reserved1;
117 u8 reserved2;
118 __le16 z4;
119 s8 x2;
120 s8 y2;
121 __le16 reserved3;
122 __le16 z2;
123 __le16 z1;
124 __le16 xyz1;
125 __le16 z3;
126 s8 xy2;
127 u8 xy1;
128 } __packed;
129
130 struct bmc150_magn_data {
131 struct device *dev;
132
133
134
135
136 struct mutex mutex;
137 struct regmap *regmap;
138 struct iio_mount_matrix orientation;
139
140 s32 buffer[6];
141 struct iio_trigger *dready_trig;
142 bool dready_trigger_on;
143 int max_odr;
144 int irq;
145 };
146
147 static const struct {
148 int freq;
149 u8 reg_val;
150 } bmc150_magn_samp_freq_table[] = { {2, 0x01},
151 {6, 0x02},
152 {8, 0x03},
153 {10, 0x00},
154 {15, 0x04},
155 {20, 0x05},
156 {25, 0x06},
157 {30, 0x07} };
158
159 enum bmc150_magn_presets {
160 LOW_POWER_PRESET,
161 REGULAR_PRESET,
162 ENHANCED_REGULAR_PRESET,
163 HIGH_ACCURACY_PRESET
164 };
165
166 static const struct bmc150_magn_preset {
167 u8 rep_xy;
168 u8 rep_z;
169 u8 odr;
170 } bmc150_magn_presets_table[] = {
171 [LOW_POWER_PRESET] = {3, 3, 10},
172 [REGULAR_PRESET] = {9, 15, 10},
173 [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
174 [HIGH_ACCURACY_PRESET] = {47, 83, 20},
175 };
176
177 #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
178
179 static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
180 {
181 switch (reg) {
182 case BMC150_MAGN_REG_POWER:
183 case BMC150_MAGN_REG_OPMODE_ODR:
184 case BMC150_MAGN_REG_INT:
185 case BMC150_MAGN_REG_INT_DRDY:
186 case BMC150_MAGN_REG_LOW_THRESH:
187 case BMC150_MAGN_REG_HIGH_THRESH:
188 case BMC150_MAGN_REG_REP_XY:
189 case BMC150_MAGN_REG_REP_Z:
190 return true;
191 default:
192 return false;
193 };
194 }
195
196 static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
197 {
198 switch (reg) {
199 case BMC150_MAGN_REG_X_L:
200 case BMC150_MAGN_REG_X_M:
201 case BMC150_MAGN_REG_Y_L:
202 case BMC150_MAGN_REG_Y_M:
203 case BMC150_MAGN_REG_Z_L:
204 case BMC150_MAGN_REG_Z_M:
205 case BMC150_MAGN_REG_RHALL_L:
206 case BMC150_MAGN_REG_RHALL_M:
207 case BMC150_MAGN_REG_INT_STATUS:
208 return true;
209 default:
210 return false;
211 }
212 }
213
214 const struct regmap_config bmc150_magn_regmap_config = {
215 .reg_bits = 8,
216 .val_bits = 8,
217
218 .max_register = BMC150_MAGN_REG_TRIM_END,
219 .cache_type = REGCACHE_RBTREE,
220
221 .writeable_reg = bmc150_magn_is_writeable_reg,
222 .volatile_reg = bmc150_magn_is_volatile_reg,
223 };
224 EXPORT_SYMBOL(bmc150_magn_regmap_config);
225
226 static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
227 enum bmc150_magn_power_modes mode,
228 bool state)
229 {
230 int ret;
231
232 switch (mode) {
233 case BMC150_MAGN_POWER_MODE_SUSPEND:
234 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
235 BMC150_MAGN_MASK_POWER_CTL, !state);
236 if (ret < 0)
237 return ret;
238 usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
239 return 0;
240 case BMC150_MAGN_POWER_MODE_SLEEP:
241 return regmap_update_bits(data->regmap,
242 BMC150_MAGN_REG_OPMODE_ODR,
243 BMC150_MAGN_MASK_OPMODE,
244 BMC150_MAGN_MODE_SLEEP <<
245 BMC150_MAGN_SHIFT_OPMODE);
246 case BMC150_MAGN_POWER_MODE_NORMAL:
247 return regmap_update_bits(data->regmap,
248 BMC150_MAGN_REG_OPMODE_ODR,
249 BMC150_MAGN_MASK_OPMODE,
250 BMC150_MAGN_MODE_NORMAL <<
251 BMC150_MAGN_SHIFT_OPMODE);
252 }
253
254 return -EINVAL;
255 }
256
257 static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
258 {
259 #ifdef CONFIG_PM
260 int ret;
261
262 if (on) {
263 ret = pm_runtime_get_sync(data->dev);
264 } else {
265 pm_runtime_mark_last_busy(data->dev);
266 ret = pm_runtime_put_autosuspend(data->dev);
267 }
268
269 if (ret < 0) {
270 dev_err(data->dev,
271 "failed to change power state to %d\n", on);
272 if (on)
273 pm_runtime_put_noidle(data->dev);
274
275 return ret;
276 }
277 #endif
278
279 return 0;
280 }
281
282 static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
283 {
284 int ret, reg_val;
285 u8 i, odr_val;
286
287 ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, ®_val);
288 if (ret < 0)
289 return ret;
290 odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
291
292 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
293 if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
294 *val = bmc150_magn_samp_freq_table[i].freq;
295 return 0;
296 }
297
298 return -EINVAL;
299 }
300
301 static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
302 {
303 int ret;
304 u8 i;
305
306 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
307 if (bmc150_magn_samp_freq_table[i].freq == val) {
308 ret = regmap_update_bits(data->regmap,
309 BMC150_MAGN_REG_OPMODE_ODR,
310 BMC150_MAGN_MASK_ODR,
311 bmc150_magn_samp_freq_table[i].
312 reg_val <<
313 BMC150_MAGN_SHIFT_ODR);
314 if (ret < 0)
315 return ret;
316 return 0;
317 }
318 }
319
320 return -EINVAL;
321 }
322
323 static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
324 int rep_z, int odr)
325 {
326 int ret, reg_val, max_odr;
327
328 if (rep_xy <= 0) {
329 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
330 ®_val);
331 if (ret < 0)
332 return ret;
333 rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
334 }
335 if (rep_z <= 0) {
336 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
337 ®_val);
338 if (ret < 0)
339 return ret;
340 rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
341 }
342 if (odr <= 0) {
343 ret = bmc150_magn_get_odr(data, &odr);
344 if (ret < 0)
345 return ret;
346 }
347
348 max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
349 if (odr > max_odr) {
350 dev_err(data->dev,
351 "Can't set oversampling with sampling freq %d\n",
352 odr);
353 return -EINVAL;
354 }
355 data->max_odr = max_odr;
356
357 return 0;
358 }
359
360 static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
361 u16 rhall)
362 {
363 s16 val;
364 u16 xyz1 = le16_to_cpu(tregs->xyz1);
365
366 if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
367 return S32_MIN;
368
369 if (!rhall)
370 rhall = xyz1;
371
372 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
373 val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
374 ((s32)val)) >> 7)) + (((s32)val) *
375 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
376 ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
377 (((s16)tregs->x1) << 3);
378
379 return (s32)val;
380 }
381
382 static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
383 u16 rhall)
384 {
385 s16 val;
386 u16 xyz1 = le16_to_cpu(tregs->xyz1);
387
388 if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
389 return S32_MIN;
390
391 if (!rhall)
392 rhall = xyz1;
393
394 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
395 val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
396 ((s32)val)) >> 7)) + (((s32)val) *
397 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
398 ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
399 (((s16)tregs->y1) << 3);
400
401 return (s32)val;
402 }
403
404 static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
405 u16 rhall)
406 {
407 s32 val;
408 u16 xyz1 = le16_to_cpu(tregs->xyz1);
409 u16 z1 = le16_to_cpu(tregs->z1);
410 s16 z2 = le16_to_cpu(tregs->z2);
411 s16 z3 = le16_to_cpu(tregs->z3);
412 s16 z4 = le16_to_cpu(tregs->z4);
413
414 if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
415 return S32_MIN;
416
417 val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
418 ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
419 ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
420
421 return val;
422 }
423
424 static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
425 {
426 int ret;
427 __le16 values[AXIS_XYZR_MAX];
428 s16 raw_x, raw_y, raw_z;
429 u16 rhall;
430 struct bmc150_magn_trim_regs tregs;
431
432 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
433 values, sizeof(values));
434 if (ret < 0)
435 return ret;
436
437 raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
438 raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
439 raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
440 rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
441
442 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
443 &tregs, sizeof(tregs));
444 if (ret < 0)
445 return ret;
446
447 buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
448 buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
449 buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
450
451 return 0;
452 }
453
454 static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
455 struct iio_chan_spec const *chan,
456 int *val, int *val2, long mask)
457 {
458 struct bmc150_magn_data *data = iio_priv(indio_dev);
459 int ret, tmp;
460 s32 values[AXIS_XYZ_MAX];
461
462 switch (mask) {
463 case IIO_CHAN_INFO_RAW:
464 if (iio_buffer_enabled(indio_dev))
465 return -EBUSY;
466 mutex_lock(&data->mutex);
467
468 ret = bmc150_magn_set_power_state(data, true);
469 if (ret < 0) {
470 mutex_unlock(&data->mutex);
471 return ret;
472 }
473
474 ret = bmc150_magn_read_xyz(data, values);
475 if (ret < 0) {
476 bmc150_magn_set_power_state(data, false);
477 mutex_unlock(&data->mutex);
478 return ret;
479 }
480 *val = values[chan->scan_index];
481
482 ret = bmc150_magn_set_power_state(data, false);
483 if (ret < 0) {
484 mutex_unlock(&data->mutex);
485 return ret;
486 }
487
488 mutex_unlock(&data->mutex);
489 return IIO_VAL_INT;
490 case IIO_CHAN_INFO_SCALE:
491
492
493
494
495
496 *val = 0;
497 *val2 = 625;
498 return IIO_VAL_INT_PLUS_MICRO;
499 case IIO_CHAN_INFO_SAMP_FREQ:
500 ret = bmc150_magn_get_odr(data, val);
501 if (ret < 0)
502 return ret;
503 return IIO_VAL_INT;
504 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
505 switch (chan->channel2) {
506 case IIO_MOD_X:
507 case IIO_MOD_Y:
508 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
509 &tmp);
510 if (ret < 0)
511 return ret;
512 *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
513 return IIO_VAL_INT;
514 case IIO_MOD_Z:
515 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
516 &tmp);
517 if (ret < 0)
518 return ret;
519 *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
520 return IIO_VAL_INT;
521 default:
522 return -EINVAL;
523 }
524 default:
525 return -EINVAL;
526 }
527 }
528
529 static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
530 struct iio_chan_spec const *chan,
531 int val, int val2, long mask)
532 {
533 struct bmc150_magn_data *data = iio_priv(indio_dev);
534 int ret;
535
536 switch (mask) {
537 case IIO_CHAN_INFO_SAMP_FREQ:
538 if (val > data->max_odr)
539 return -EINVAL;
540 mutex_lock(&data->mutex);
541 ret = bmc150_magn_set_odr(data, val);
542 mutex_unlock(&data->mutex);
543 return ret;
544 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
545 switch (chan->channel2) {
546 case IIO_MOD_X:
547 case IIO_MOD_Y:
548 if (val < 1 || val > 511)
549 return -EINVAL;
550 mutex_lock(&data->mutex);
551 ret = bmc150_magn_set_max_odr(data, val, 0, 0);
552 if (ret < 0) {
553 mutex_unlock(&data->mutex);
554 return ret;
555 }
556 ret = regmap_update_bits(data->regmap,
557 BMC150_MAGN_REG_REP_XY,
558 BMC150_MAGN_REG_REP_DATAMASK,
559 BMC150_MAGN_REPXY_TO_REGVAL
560 (val));
561 mutex_unlock(&data->mutex);
562 return ret;
563 case IIO_MOD_Z:
564 if (val < 1 || val > 256)
565 return -EINVAL;
566 mutex_lock(&data->mutex);
567 ret = bmc150_magn_set_max_odr(data, 0, val, 0);
568 if (ret < 0) {
569 mutex_unlock(&data->mutex);
570 return ret;
571 }
572 ret = regmap_update_bits(data->regmap,
573 BMC150_MAGN_REG_REP_Z,
574 BMC150_MAGN_REG_REP_DATAMASK,
575 BMC150_MAGN_REPZ_TO_REGVAL
576 (val));
577 mutex_unlock(&data->mutex);
578 return ret;
579 default:
580 return -EINVAL;
581 }
582 default:
583 return -EINVAL;
584 }
585 }
586
587 static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
588 struct device_attribute *attr,
589 char *buf)
590 {
591 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
592 struct bmc150_magn_data *data = iio_priv(indio_dev);
593 size_t len = 0;
594 u8 i;
595
596 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
597 if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
598 break;
599 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
600 bmc150_magn_samp_freq_table[i].freq);
601 }
602
603 buf[len - 1] = '\n';
604
605 return len;
606 }
607
608 static const struct iio_mount_matrix *
609 bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
610 const struct iio_chan_spec *chan)
611 {
612 struct bmc150_magn_data *data = iio_priv(indio_dev);
613
614 return &data->orientation;
615 }
616
617 static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
618 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
619 { }
620 };
621
622 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
623
624 static struct attribute *bmc150_magn_attributes[] = {
625 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
626 NULL,
627 };
628
629 static const struct attribute_group bmc150_magn_attrs_group = {
630 .attrs = bmc150_magn_attributes,
631 };
632
633 #define BMC150_MAGN_CHANNEL(_axis) { \
634 .type = IIO_MAGN, \
635 .modified = 1, \
636 .channel2 = IIO_MOD_##_axis, \
637 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
638 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
639 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
640 BIT(IIO_CHAN_INFO_SCALE), \
641 .scan_index = AXIS_##_axis, \
642 .scan_type = { \
643 .sign = 's', \
644 .realbits = 32, \
645 .storagebits = 32, \
646 .endianness = IIO_LE \
647 }, \
648 .ext_info = bmc150_magn_ext_info, \
649 }
650
651 static const struct iio_chan_spec bmc150_magn_channels[] = {
652 BMC150_MAGN_CHANNEL(X),
653 BMC150_MAGN_CHANNEL(Y),
654 BMC150_MAGN_CHANNEL(Z),
655 IIO_CHAN_SOFT_TIMESTAMP(3),
656 };
657
658 static const struct iio_info bmc150_magn_info = {
659 .attrs = &bmc150_magn_attrs_group,
660 .read_raw = bmc150_magn_read_raw,
661 .write_raw = bmc150_magn_write_raw,
662 };
663
664 static const unsigned long bmc150_magn_scan_masks[] = {
665 BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
666 0};
667
668 static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
669 {
670 struct iio_poll_func *pf = p;
671 struct iio_dev *indio_dev = pf->indio_dev;
672 struct bmc150_magn_data *data = iio_priv(indio_dev);
673 int ret;
674
675 mutex_lock(&data->mutex);
676 ret = bmc150_magn_read_xyz(data, data->buffer);
677 if (ret < 0)
678 goto err;
679
680 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
681 pf->timestamp);
682
683 err:
684 mutex_unlock(&data->mutex);
685 iio_trigger_notify_done(indio_dev->trig);
686
687 return IRQ_HANDLED;
688 }
689
690 static int bmc150_magn_init(struct bmc150_magn_data *data)
691 {
692 int ret, chip_id;
693 struct bmc150_magn_preset preset;
694
695 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
696 false);
697 if (ret < 0) {
698 dev_err(data->dev,
699 "Failed to bring up device from suspend mode\n");
700 return ret;
701 }
702
703 ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
704 if (ret < 0) {
705 dev_err(data->dev, "Failed reading chip id\n");
706 goto err_poweroff;
707 }
708 if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
709 dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
710 ret = -ENODEV;
711 goto err_poweroff;
712 }
713 dev_dbg(data->dev, "Chip id %x\n", chip_id);
714
715 preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
716 ret = bmc150_magn_set_odr(data, preset.odr);
717 if (ret < 0) {
718 dev_err(data->dev, "Failed to set ODR to %d\n",
719 preset.odr);
720 goto err_poweroff;
721 }
722
723 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
724 BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
725 if (ret < 0) {
726 dev_err(data->dev, "Failed to set REP XY to %d\n",
727 preset.rep_xy);
728 goto err_poweroff;
729 }
730
731 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
732 BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
733 if (ret < 0) {
734 dev_err(data->dev, "Failed to set REP Z to %d\n",
735 preset.rep_z);
736 goto err_poweroff;
737 }
738
739 ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
740 preset.odr);
741 if (ret < 0)
742 goto err_poweroff;
743
744 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
745 true);
746 if (ret < 0) {
747 dev_err(data->dev, "Failed to power on device\n");
748 goto err_poweroff;
749 }
750
751 return 0;
752
753 err_poweroff:
754 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
755 return ret;
756 }
757
758 static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
759 {
760 int tmp;
761
762
763
764
765
766 return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
767 }
768
769 static int bmc150_magn_trig_try_reen(struct iio_trigger *trig)
770 {
771 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
772 struct bmc150_magn_data *data = iio_priv(indio_dev);
773 int ret;
774
775 if (!data->dready_trigger_on)
776 return 0;
777
778 mutex_lock(&data->mutex);
779 ret = bmc150_magn_reset_intr(data);
780 mutex_unlock(&data->mutex);
781
782 return ret;
783 }
784
785 static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
786 bool state)
787 {
788 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
789 struct bmc150_magn_data *data = iio_priv(indio_dev);
790 int ret = 0;
791
792 mutex_lock(&data->mutex);
793 if (state == data->dready_trigger_on)
794 goto err_unlock;
795
796 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
797 BMC150_MAGN_MASK_DRDY_EN,
798 state << BMC150_MAGN_SHIFT_DRDY_EN);
799 if (ret < 0)
800 goto err_unlock;
801
802 data->dready_trigger_on = state;
803
804 if (state) {
805 ret = bmc150_magn_reset_intr(data);
806 if (ret < 0)
807 goto err_unlock;
808 }
809 mutex_unlock(&data->mutex);
810
811 return 0;
812
813 err_unlock:
814 mutex_unlock(&data->mutex);
815 return ret;
816 }
817
818 static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
819 .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
820 .try_reenable = bmc150_magn_trig_try_reen,
821 };
822
823 static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
824 {
825 struct bmc150_magn_data *data = iio_priv(indio_dev);
826
827 return bmc150_magn_set_power_state(data, true);
828 }
829
830 static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
831 {
832 struct bmc150_magn_data *data = iio_priv(indio_dev);
833
834 return bmc150_magn_set_power_state(data, false);
835 }
836
837 static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
838 .preenable = bmc150_magn_buffer_preenable,
839 .postenable = iio_triggered_buffer_postenable,
840 .predisable = iio_triggered_buffer_predisable,
841 .postdisable = bmc150_magn_buffer_postdisable,
842 };
843
844 static const char *bmc150_magn_match_acpi_device(struct device *dev)
845 {
846 const struct acpi_device_id *id;
847
848 id = acpi_match_device(dev->driver->acpi_match_table, dev);
849 if (!id)
850 return NULL;
851
852 return dev_name(dev);
853 }
854
855 int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
856 int irq, const char *name)
857 {
858 struct bmc150_magn_data *data;
859 struct iio_dev *indio_dev;
860 int ret;
861
862 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
863 if (!indio_dev)
864 return -ENOMEM;
865
866 data = iio_priv(indio_dev);
867 dev_set_drvdata(dev, indio_dev);
868 data->regmap = regmap;
869 data->irq = irq;
870 data->dev = dev;
871
872 ret = iio_read_mount_matrix(dev, "mount-matrix",
873 &data->orientation);
874 if (ret)
875 return ret;
876
877 if (!name && ACPI_HANDLE(dev))
878 name = bmc150_magn_match_acpi_device(dev);
879
880 mutex_init(&data->mutex);
881
882 ret = bmc150_magn_init(data);
883 if (ret < 0)
884 return ret;
885
886 indio_dev->dev.parent = dev;
887 indio_dev->channels = bmc150_magn_channels;
888 indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
889 indio_dev->available_scan_masks = bmc150_magn_scan_masks;
890 indio_dev->name = name;
891 indio_dev->modes = INDIO_DIRECT_MODE;
892 indio_dev->info = &bmc150_magn_info;
893
894 if (irq > 0) {
895 data->dready_trig = devm_iio_trigger_alloc(dev,
896 "%s-dev%d",
897 indio_dev->name,
898 indio_dev->id);
899 if (!data->dready_trig) {
900 ret = -ENOMEM;
901 dev_err(dev, "iio trigger alloc failed\n");
902 goto err_poweroff;
903 }
904
905 data->dready_trig->dev.parent = dev;
906 data->dready_trig->ops = &bmc150_magn_trigger_ops;
907 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
908 ret = iio_trigger_register(data->dready_trig);
909 if (ret) {
910 dev_err(dev, "iio trigger register failed\n");
911 goto err_poweroff;
912 }
913
914 ret = request_threaded_irq(irq,
915 iio_trigger_generic_data_rdy_poll,
916 NULL,
917 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
918 BMC150_MAGN_IRQ_NAME,
919 data->dready_trig);
920 if (ret < 0) {
921 dev_err(dev, "request irq %d failed\n", irq);
922 goto err_trigger_unregister;
923 }
924 }
925
926 ret = iio_triggered_buffer_setup(indio_dev,
927 iio_pollfunc_store_time,
928 bmc150_magn_trigger_handler,
929 &bmc150_magn_buffer_setup_ops);
930 if (ret < 0) {
931 dev_err(dev, "iio triggered buffer setup failed\n");
932 goto err_free_irq;
933 }
934
935 ret = pm_runtime_set_active(dev);
936 if (ret)
937 goto err_buffer_cleanup;
938
939 pm_runtime_enable(dev);
940 pm_runtime_set_autosuspend_delay(dev,
941 BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
942 pm_runtime_use_autosuspend(dev);
943
944 ret = iio_device_register(indio_dev);
945 if (ret < 0) {
946 dev_err(dev, "unable to register iio device\n");
947 goto err_buffer_cleanup;
948 }
949
950 dev_dbg(dev, "Registered device %s\n", name);
951 return 0;
952
953 err_buffer_cleanup:
954 iio_triggered_buffer_cleanup(indio_dev);
955 err_free_irq:
956 if (irq > 0)
957 free_irq(irq, data->dready_trig);
958 err_trigger_unregister:
959 if (data->dready_trig)
960 iio_trigger_unregister(data->dready_trig);
961 err_poweroff:
962 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
963 return ret;
964 }
965 EXPORT_SYMBOL(bmc150_magn_probe);
966
967 int bmc150_magn_remove(struct device *dev)
968 {
969 struct iio_dev *indio_dev = dev_get_drvdata(dev);
970 struct bmc150_magn_data *data = iio_priv(indio_dev);
971
972 iio_device_unregister(indio_dev);
973
974 pm_runtime_disable(dev);
975 pm_runtime_set_suspended(dev);
976 pm_runtime_put_noidle(dev);
977
978 iio_triggered_buffer_cleanup(indio_dev);
979
980 if (data->irq > 0)
981 free_irq(data->irq, data->dready_trig);
982
983 if (data->dready_trig)
984 iio_trigger_unregister(data->dready_trig);
985
986 mutex_lock(&data->mutex);
987 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
988 mutex_unlock(&data->mutex);
989
990 return 0;
991 }
992 EXPORT_SYMBOL(bmc150_magn_remove);
993
994 #ifdef CONFIG_PM
995 static int bmc150_magn_runtime_suspend(struct device *dev)
996 {
997 struct iio_dev *indio_dev = dev_get_drvdata(dev);
998 struct bmc150_magn_data *data = iio_priv(indio_dev);
999 int ret;
1000
1001 mutex_lock(&data->mutex);
1002 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1003 true);
1004 mutex_unlock(&data->mutex);
1005 if (ret < 0) {
1006 dev_err(dev, "powering off device failed\n");
1007 return ret;
1008 }
1009 return 0;
1010 }
1011
1012
1013
1014
1015 static int bmc150_magn_runtime_resume(struct device *dev)
1016 {
1017 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1018 struct bmc150_magn_data *data = iio_priv(indio_dev);
1019
1020 return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1021 true);
1022 }
1023 #endif
1024
1025 #ifdef CONFIG_PM_SLEEP
1026 static int bmc150_magn_suspend(struct device *dev)
1027 {
1028 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1029 struct bmc150_magn_data *data = iio_priv(indio_dev);
1030 int ret;
1031
1032 mutex_lock(&data->mutex);
1033 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1034 true);
1035 mutex_unlock(&data->mutex);
1036
1037 return ret;
1038 }
1039
1040 static int bmc150_magn_resume(struct device *dev)
1041 {
1042 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1043 struct bmc150_magn_data *data = iio_priv(indio_dev);
1044 int ret;
1045
1046 mutex_lock(&data->mutex);
1047 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1048 true);
1049 mutex_unlock(&data->mutex);
1050
1051 return ret;
1052 }
1053 #endif
1054
1055 const struct dev_pm_ops bmc150_magn_pm_ops = {
1056 SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
1057 SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
1058 bmc150_magn_runtime_resume, NULL)
1059 };
1060 EXPORT_SYMBOL(bmc150_magn_pm_ops);
1061
1062 MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
1063 MODULE_LICENSE("GPL v2");
1064 MODULE_DESCRIPTION("BMC150 magnetometer core driver");