1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * AD7606 ADC driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8 #ifndef IIO_ADC_AD7606_H_
9 #define IIO_ADC_AD7606_H_
10
11 #define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all) { \
12 .type = IIO_VOLTAGE, \
13 .indexed = 1, \
14 .channel = num, \
15 .address = num, \
16 .info_mask_separate = mask_sep, \
17 .info_mask_shared_by_type = mask_type, \
18 .info_mask_shared_by_all = mask_all, \
19 .scan_index = num, \
20 .scan_type = { \
21 .sign = 's', \
22 .realbits = 16, \
23 .storagebits = 16, \
24 .endianness = IIO_CPU, \
25 }, \
26 }
27
28 #define AD7605_CHANNEL(num) \
29 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
30 BIT(IIO_CHAN_INFO_SCALE), 0)
31
32 #define AD7606_CHANNEL(num) \
33 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
34 BIT(IIO_CHAN_INFO_SCALE), \
35 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO))
36
37 #define AD7616_CHANNEL(num) \
38 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\
39 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO))
40
41 /**
42 * struct ad7606_chip_info - chip specific information
43 * @channels: channel specification
44 * @num_channels: number of channels
45 * @oversampling_avail pointer to the array which stores the available
46 * oversampling ratios.
47 * @oversampling_num number of elements stored in oversampling_avail array
48 * @os_req_reset some devices require a reset to update oversampling
49 * @init_delay_ms required delay in miliseconds for initialization
50 * after a restart
51 */
52 struct ad7606_chip_info {
53 const struct iio_chan_spec *channels;
54 unsigned int num_channels;
55 const unsigned int *oversampling_avail;
56 unsigned int oversampling_num;
57 bool os_req_reset;
58 unsigned long init_delay_ms;
59 };
60
61 /**
62 * struct ad7606_state - driver instance specific data
63 * @dev pointer to kernel device
64 * @chip_info entry in the table of chips that describes this device
65 * @reg regulator info for the the power supply of the device
66 * @bops bus operations (SPI or parallel)
67 * @range voltage range selection, selects which scale to apply
68 * @oversampling oversampling selection
69 * @base_address address from where to read data in parallel operation
70 * @sw_mode_en software mode enabled
71 * @scale_avail pointer to the array which stores the available scales
72 * @num_scales number of elements stored in the scale_avail array
73 * @oversampling_avail pointer to the array which stores the available
74 * oversampling ratios.
75 * @num_os_ratios number of elements stored in oversampling_avail array
76 * @write_scale pointer to the function which writes the scale
77 * @write_os pointer to the function which writes the os
78 * @lock protect sensor state from concurrent accesses to GPIOs
79 * @gpio_convst GPIO descriptor for conversion start signal (CONVST)
80 * @gpio_reset GPIO descriptor for device hard-reset
81 * @gpio_range GPIO descriptor for range selection
82 * @gpio_standby GPIO descriptor for stand-by signal (STBY),
83 * controls power-down mode of device
84 * @gpio_frstdata GPIO descriptor for reading from device when data
85 * is being read on the first channel
86 * @gpio_os GPIO descriptors to control oversampling on the device
87 * @complete completion to indicate end of conversion
88 * @trig The IIO trigger associated with the device.
89 * @data buffer for reading data from the device
90 * @d16 be16 buffer for reading data from the device
91 */
92 struct ad7606_state {
93 struct device *dev;
94 const struct ad7606_chip_info *chip_info;
95 struct regulator *reg;
96 const struct ad7606_bus_ops *bops;
97 unsigned int range[16];
98 unsigned int oversampling;
99 void __iomem *base_address;
100 bool sw_mode_en;
101 const unsigned int *scale_avail;
102 unsigned int num_scales;
103 const unsigned int *oversampling_avail;
104 unsigned int num_os_ratios;
105 int (*write_scale)(struct iio_dev *indio_dev, int ch, int val);
106 int (*write_os)(struct iio_dev *indio_dev, int val);
107
108 struct mutex lock; /* protect sensor state */
109 struct gpio_desc *gpio_convst;
110 struct gpio_desc *gpio_reset;
111 struct gpio_desc *gpio_range;
112 struct gpio_desc *gpio_standby;
113 struct gpio_desc *gpio_frstdata;
114 struct gpio_descs *gpio_os;
115 struct iio_trigger *trig;
116 struct completion completion;
117
118 /*
119 * DMA (thus cache coherency maintenance) requires the
120 * transfer buffers to live in their own cache lines.
121 * 16 * 16-bit samples + 64-bit timestamp
122 */
123 unsigned short data[20] ____cacheline_aligned;
124 __be16 d16[2];
125 };
126
127 /**
128 * struct ad7606_bus_ops - driver bus operations
129 * @read_block function pointer for reading blocks of data
130 * @sw_mode_config: pointer to a function which configured the device
131 * for software mode
132 * @reg_read function pointer for reading spi register
133 * @reg_write function pointer for writing spi register
134 * @write_mask function pointer for write spi register with mask
135 * @rd_wr_cmd pointer to the function which calculates the spi address
136 */
137 struct ad7606_bus_ops {
138 /* more methods added in future? */
139 int (*read_block)(struct device *dev, int num, void *data);
140 int (*sw_mode_config)(struct iio_dev *indio_dev);
141 int (*reg_read)(struct ad7606_state *st, unsigned int addr);
142 int (*reg_write)(struct ad7606_state *st,
143 unsigned int addr,
144 unsigned int val);
145 int (*write_mask)(struct ad7606_state *st,
146 unsigned int addr,
147 unsigned long mask,
148 unsigned int val);
149 u16 (*rd_wr_cmd)(int addr, char isWriteOp);
150 };
151
152 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
153 const char *name, unsigned int id,
154 const struct ad7606_bus_ops *bops);
155
156 enum ad7606_supported_device_ids {
157 ID_AD7605_4,
158 ID_AD7606_8,
159 ID_AD7606_6,
160 ID_AD7606_4,
161 ID_AD7606B,
162 ID_AD7616,
163 };
164
165 #ifdef CONFIG_PM_SLEEP
166 extern const struct dev_pm_ops ad7606_pm_ops;
167 #define AD7606_PM_OPS (&ad7606_pm_ops)
168 #else
169 #define AD7606_PM_OPS NULL
170 #endif
171
172 #endif /* IIO_ADC_AD7606_H_ */