drivers/iio/imu/inv_mpu6050/inv_mpu

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This source file includes following definitions.
inv_mpu6050_switch_engine
inv_mpu6050_set_power_itg
inv_mpu6050_set_lpf_regs
inv_mpu6050_init_config
inv_mpu6050_sensor_set
inv_mpu6050_sensor_show
inv_mpu6050_read_channel_data
inv_mpu6050_read_raw
inv_mpu6050_write_gyro_scale
inv_write_raw_get_fmt
inv_mpu6050_write_accel_scale
inv_mpu6050_write_raw
inv_mpu6050_set_lpf
inv_mpu6050_fifo_rate_store
inv_fifo_rate_show
inv_attr_show
inv_mpu6050_validate_trigger
inv_get_mount_matrix
inv_check_and_setup_chip
inv_mpu_core_enable_regulator
inv_mpu_core_disable_regulator
inv_mpu_core_disable_regulator_action
inv_mpu_core_probe
inv_mpu_resume
inv_mpu_suspend
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3 * Copyright (C) 2012 Invensense, Inc.
   4 */
   5 
   6 #include <linux/module.h>
   7 #include <linux/slab.h>
   8 #include <linux/i2c.h>
   9 #include <linux/err.h>
  10 #include <linux/delay.h>
  11 #include <linux/sysfs.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/irq.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/iio/iio.h>
  16 #include <linux/acpi.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/regulator/consumer.h>
  19 #include "inv_mpu_iio.h"
  20 
  21 /*
  22  * this is the gyro scale translated from dynamic range plus/minus
  23  * {250, 500, 1000, 2000} to rad/s
  24  */
  25 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
  26 
  27 /*
  28  * this is the accel scale translated from dynamic range plus/minus
  29  * {2, 4, 8, 16} to m/s^2
  30  */
  31 static const int accel_scale[] = {598, 1196, 2392, 4785};
  32 
  33 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
  34         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  35         .lpf                    = INV_MPU6050_REG_CONFIG,
  36         .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
  37         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  38         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  39         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  40         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  41         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  42         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  43         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  44         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  45         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  46         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  47         .int_status             = INV_MPU6050_REG_INT_STATUS,
  48         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  49         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  50         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  51         .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
  52         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  53         .i2c_if                 = INV_ICM20602_REG_I2C_IF,
  54 };
  55 
  56 static const struct inv_mpu6050_reg_map reg_set_6500 = {
  57         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  58         .lpf                    = INV_MPU6050_REG_CONFIG,
  59         .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
  60         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  61         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  62         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  63         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  64         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  65         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  66         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  67         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  68         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  69         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  70         .int_status             = INV_MPU6050_REG_INT_STATUS,
  71         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  72         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  73         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  74         .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
  75         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  76         .i2c_if                 = 0,
  77 };
  78 
  79 static const struct inv_mpu6050_reg_map reg_set_6050 = {
  80         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  81         .lpf                    = INV_MPU6050_REG_CONFIG,
  82         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  83         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  84         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  85         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  86         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  87         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  88         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  89         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  90         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  91         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  92         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  93         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  94         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  95         .accl_offset            = INV_MPU6050_REG_ACCEL_OFFSET,
  96         .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  97         .i2c_if                 = 0,
  98 };
  99 
 100 static const struct inv_mpu6050_chip_config chip_config_6050 = {
 101         .fsr = INV_MPU6050_FSR_2000DPS,
 102         .lpf = INV_MPU6050_FILTER_20HZ,
 103         .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE),
 104         .gyro_fifo_enable = false,
 105         .accl_fifo_enable = false,
 106         .accl_fs = INV_MPU6050_FS_02G,
 107         .user_ctrl = 0,
 108 };
 109 
 110 /* Indexed by enum inv_devices */
 111 static const struct inv_mpu6050_hw hw_info[] = {
 112         {
 113                 .whoami = INV_MPU6050_WHOAMI_VALUE,
 114                 .name = "MPU6050",
 115                 .reg = &reg_set_6050,
 116                 .config = &chip_config_6050,
 117                 .fifo_size = 1024,
 118                 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
 119         },
 120         {
 121                 .whoami = INV_MPU6500_WHOAMI_VALUE,
 122                 .name = "MPU6500",
 123                 .reg = &reg_set_6500,
 124                 .config = &chip_config_6050,
 125                 .fifo_size = 512,
 126                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 127         },
 128         {
 129                 .whoami = INV_MPU6515_WHOAMI_VALUE,
 130                 .name = "MPU6515",
 131                 .reg = &reg_set_6500,
 132                 .config = &chip_config_6050,
 133                 .fifo_size = 512,
 134                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 135         },
 136         {
 137                 .whoami = INV_MPU6000_WHOAMI_VALUE,
 138                 .name = "MPU6000",
 139                 .reg = &reg_set_6050,
 140                 .config = &chip_config_6050,
 141                 .fifo_size = 1024,
 142                 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
 143         },
 144         {
 145                 .whoami = INV_MPU9150_WHOAMI_VALUE,
 146                 .name = "MPU9150",
 147                 .reg = &reg_set_6050,
 148                 .config = &chip_config_6050,
 149                 .fifo_size = 1024,
 150                 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
 151         },
 152         {
 153                 .whoami = INV_MPU9250_WHOAMI_VALUE,
 154                 .name = "MPU9250",
 155                 .reg = &reg_set_6500,
 156                 .config = &chip_config_6050,
 157                 .fifo_size = 512,
 158                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 159         },
 160         {
 161                 .whoami = INV_MPU9255_WHOAMI_VALUE,
 162                 .name = "MPU9255",
 163                 .reg = &reg_set_6500,
 164                 .config = &chip_config_6050,
 165                 .fifo_size = 512,
 166                 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
 167         },
 168         {
 169                 .whoami = INV_ICM20608_WHOAMI_VALUE,
 170                 .name = "ICM20608",
 171                 .reg = &reg_set_6500,
 172                 .config = &chip_config_6050,
 173                 .fifo_size = 512,
 174                 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
 175         },
 176         {
 177                 .whoami = INV_ICM20602_WHOAMI_VALUE,
 178                 .name = "ICM20602",
 179                 .reg = &reg_set_icm20602,
 180                 .config = &chip_config_6050,
 181                 .fifo_size = 1008,
 182                 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
 183         },
 184 };
 185 
 186 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
 187 {
 188         unsigned int d, mgmt_1;
 189         int result;
 190         /*
 191          * switch clock needs to be careful. Only when gyro is on, can
 192          * clock source be switched to gyro. Otherwise, it must be set to
 193          * internal clock
 194          */
 195         if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 196                 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
 197                 if (result)
 198                         return result;
 199 
 200                 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
 201         }
 202 
 203         if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
 204                 /*
 205                  * turning off gyro requires switch to internal clock first.
 206                  * Then turn off gyro engine
 207                  */
 208                 mgmt_1 |= INV_CLK_INTERNAL;
 209                 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
 210                 if (result)
 211                         return result;
 212         }
 213 
 214         result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
 215         if (result)
 216                 return result;
 217         if (en)
 218                 d &= ~mask;
 219         else
 220                 d |= mask;
 221         result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
 222         if (result)
 223                 return result;
 224 
 225         if (en) {
 226                 /* Wait for output to stabilize */
 227                 msleep(INV_MPU6050_TEMP_UP_TIME);
 228                 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 229                         /* switch internal clock to PLL */
 230                         mgmt_1 |= INV_CLK_PLL;
 231                         result = regmap_write(st->map,
 232                                               st->reg->pwr_mgmt_1, mgmt_1);
 233                         if (result)
 234                                 return result;
 235                 }
 236         }
 237 
 238         return 0;
 239 }
 240 
 241 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
 242 {
 243         int result;
 244 
 245         if (power_on) {
 246                 if (!st->powerup_count) {
 247                         result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
 248                         if (result)
 249                                 return result;
 250                         usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
 251                                      INV_MPU6050_REG_UP_TIME_MAX);
 252                 }
 253                 st->powerup_count++;
 254         } else {
 255                 if (st->powerup_count == 1) {
 256                         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 257                                               INV_MPU6050_BIT_SLEEP);
 258                         if (result)
 259                                 return result;
 260                 }
 261                 st->powerup_count--;
 262         }
 263 
 264         dev_dbg(regmap_get_device(st->map), "set power %d, count=%u\n",
 265                 power_on, st->powerup_count);
 266 
 267         return 0;
 268 }
 269 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
 270 
 271 /**
 272  *  inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
 273  *
 274  *  MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
 275  *  MPU6500 and above have a dedicated register for accelerometer
 276  */
 277 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
 278                                     enum inv_mpu6050_filter_e val)
 279 {
 280         int result;
 281 
 282         result = regmap_write(st->map, st->reg->lpf, val);
 283         if (result)
 284                 return result;
 285 
 286         switch (st->chip_type) {
 287         case INV_MPU6050:
 288         case INV_MPU6000:
 289         case INV_MPU9150:
 290                 /* old chips, nothing to do */
 291                 result = 0;
 292                 break;
 293         default:
 294                 /* set accel lpf */
 295                 result = regmap_write(st->map, st->reg->accel_lpf, val);
 296                 break;
 297         }
 298 
 299         return result;
 300 }
 301 
 302 /**
 303  *  inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
 304  *
 305  *  Initial configuration:
 306  *  FSR: ± 2000DPS
 307  *  DLPF: 20Hz
 308  *  FIFO rate: 50Hz
 309  *  Clock source: Gyro PLL
 310  */
 311 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
 312 {
 313         int result;
 314         u8 d;
 315         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 316 
 317         result = inv_mpu6050_set_power_itg(st, true);
 318         if (result)
 319                 return result;
 320         d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 321         result = regmap_write(st->map, st->reg->gyro_config, d);
 322         if (result)
 323                 goto error_power_off;
 324 
 325         result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
 326         if (result)
 327                 goto error_power_off;
 328 
 329         d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE);
 330         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 331         if (result)
 332                 goto error_power_off;
 333 
 334         d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 335         result = regmap_write(st->map, st->reg->accl_config, d);
 336         if (result)
 337                 goto error_power_off;
 338 
 339         result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
 340         if (result)
 341                 return result;
 342 
 343         memcpy(&st->chip_config, hw_info[st->chip_type].config,
 344                sizeof(struct inv_mpu6050_chip_config));
 345 
 346         /*
 347          * Internal chip period is 1ms (1kHz).
 348          * Let's use at the beginning the theorical value before measuring
 349          * with interrupt timestamps.
 350          */
 351         st->chip_period = NSEC_PER_MSEC;
 352 
 353         return inv_mpu6050_set_power_itg(st, false);
 354 
 355 error_power_off:
 356         inv_mpu6050_set_power_itg(st, false);
 357         return result;
 358 }
 359 
 360 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state  *st, int reg,
 361                                 int axis, int val)
 362 {
 363         int ind, result;
 364         __be16 d = cpu_to_be16(val);
 365 
 366         ind = (axis - IIO_MOD_X) * 2;
 367         result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
 368         if (result)
 369                 return -EINVAL;
 370 
 371         return 0;
 372 }
 373 
 374 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state  *st, int reg,
 375                                    int axis, int *val)
 376 {
 377         int ind, result;
 378         __be16 d;
 379 
 380         ind = (axis - IIO_MOD_X) * 2;
 381         result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
 382         if (result)
 383                 return -EINVAL;
 384         *val = (short)be16_to_cpup(&d);
 385 
 386         return IIO_VAL_INT;
 387 }
 388 
 389 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
 390                                          struct iio_chan_spec const *chan,
 391                                          int *val)
 392 {
 393         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 394         int result;
 395         int ret;
 396 
 397         result = inv_mpu6050_set_power_itg(st, true);
 398         if (result)
 399                 return result;
 400 
 401         switch (chan->type) {
 402         case IIO_ANGL_VEL:
 403                 result = inv_mpu6050_switch_engine(st, true,
 404                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 405                 if (result)
 406                         goto error_power_off;
 407                 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
 408                                               chan->channel2, val);
 409                 result = inv_mpu6050_switch_engine(st, false,
 410                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 411                 if (result)
 412                         goto error_power_off;
 413                 break;
 414         case IIO_ACCEL:
 415                 result = inv_mpu6050_switch_engine(st, true,
 416                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 417                 if (result)
 418                         goto error_power_off;
 419                 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
 420                                               chan->channel2, val);
 421                 result = inv_mpu6050_switch_engine(st, false,
 422                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 423                 if (result)
 424                         goto error_power_off;
 425                 break;
 426         case IIO_TEMP:
 427                 /* wait for stablization */
 428                 msleep(INV_MPU6050_SENSOR_UP_TIME);
 429                 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
 430                                               IIO_MOD_X, val);
 431                 break;
 432         default:
 433                 ret = -EINVAL;
 434                 break;
 435         }
 436 
 437         result = inv_mpu6050_set_power_itg(st, false);
 438         if (result)
 439                 goto error_power_off;
 440 
 441         return ret;
 442 
 443 error_power_off:
 444         inv_mpu6050_set_power_itg(st, false);
 445         return result;
 446 }
 447 
 448 static int
 449 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
 450                      struct iio_chan_spec const *chan,
 451                      int *val, int *val2, long mask)
 452 {
 453         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 454         int ret = 0;
 455 
 456         switch (mask) {
 457         case IIO_CHAN_INFO_RAW:
 458                 ret = iio_device_claim_direct_mode(indio_dev);
 459                 if (ret)
 460                         return ret;
 461                 mutex_lock(&st->lock);
 462                 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
 463                 mutex_unlock(&st->lock);
 464                 iio_device_release_direct_mode(indio_dev);
 465                 return ret;
 466         case IIO_CHAN_INFO_SCALE:
 467                 switch (chan->type) {
 468                 case IIO_ANGL_VEL:
 469                         mutex_lock(&st->lock);
 470                         *val  = 0;
 471                         *val2 = gyro_scale_6050[st->chip_config.fsr];
 472                         mutex_unlock(&st->lock);
 473 
 474                         return IIO_VAL_INT_PLUS_NANO;
 475                 case IIO_ACCEL:
 476                         mutex_lock(&st->lock);
 477                         *val = 0;
 478                         *val2 = accel_scale[st->chip_config.accl_fs];
 479                         mutex_unlock(&st->lock);
 480 
 481                         return IIO_VAL_INT_PLUS_MICRO;
 482                 case IIO_TEMP:
 483                         *val = st->hw->temp.scale / 1000000;
 484                         *val2 = st->hw->temp.scale % 1000000;
 485                         return IIO_VAL_INT_PLUS_MICRO;
 486                 default:
 487                         return -EINVAL;
 488                 }
 489         case IIO_CHAN_INFO_OFFSET:
 490                 switch (chan->type) {
 491                 case IIO_TEMP:
 492                         *val = st->hw->temp.offset;
 493                         return IIO_VAL_INT;
 494                 default:
 495                         return -EINVAL;
 496                 }
 497         case IIO_CHAN_INFO_CALIBBIAS:
 498                 switch (chan->type) {
 499                 case IIO_ANGL_VEL:
 500                         mutex_lock(&st->lock);
 501                         ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
 502                                                 chan->channel2, val);
 503                         mutex_unlock(&st->lock);
 504                         return IIO_VAL_INT;
 505                 case IIO_ACCEL:
 506                         mutex_lock(&st->lock);
 507                         ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
 508                                                 chan->channel2, val);
 509                         mutex_unlock(&st->lock);
 510                         return IIO_VAL_INT;
 511 
 512                 default:
 513                         return -EINVAL;
 514                 }
 515         default:
 516                 return -EINVAL;
 517         }
 518 }
 519 
 520 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
 521 {
 522         int result, i;
 523         u8 d;
 524 
 525         for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
 526                 if (gyro_scale_6050[i] == val) {
 527                         d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 528                         result = regmap_write(st->map, st->reg->gyro_config, d);
 529                         if (result)
 530                                 return result;
 531 
 532                         st->chip_config.fsr = i;
 533                         return 0;
 534                 }
 535         }
 536 
 537         return -EINVAL;
 538 }
 539 
 540 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
 541                                  struct iio_chan_spec const *chan, long mask)
 542 {
 543         switch (mask) {
 544         case IIO_CHAN_INFO_SCALE:
 545                 switch (chan->type) {
 546                 case IIO_ANGL_VEL:
 547                         return IIO_VAL_INT_PLUS_NANO;
 548                 default:
 549                         return IIO_VAL_INT_PLUS_MICRO;
 550                 }
 551         default:
 552                 return IIO_VAL_INT_PLUS_MICRO;
 553         }
 554 
 555         return -EINVAL;
 556 }
 557 
 558 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
 559 {
 560         int result, i;
 561         u8 d;
 562 
 563         for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
 564                 if (accel_scale[i] == val) {
 565                         d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 566                         result = regmap_write(st->map, st->reg->accl_config, d);
 567                         if (result)
 568                                 return result;
 569 
 570                         st->chip_config.accl_fs = i;
 571                         return 0;
 572                 }
 573         }
 574 
 575         return -EINVAL;
 576 }
 577 
 578 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
 579                                  struct iio_chan_spec const *chan,
 580                                  int val, int val2, long mask)
 581 {
 582         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 583         int result;
 584 
 585         /*
 586          * we should only update scale when the chip is disabled, i.e.
 587          * not running
 588          */
 589         result = iio_device_claim_direct_mode(indio_dev);
 590         if (result)
 591                 return result;
 592 
 593         mutex_lock(&st->lock);
 594         result = inv_mpu6050_set_power_itg(st, true);
 595         if (result)
 596                 goto error_write_raw_unlock;
 597 
 598         switch (mask) {
 599         case IIO_CHAN_INFO_SCALE:
 600                 switch (chan->type) {
 601                 case IIO_ANGL_VEL:
 602                         result = inv_mpu6050_write_gyro_scale(st, val2);
 603                         break;
 604                 case IIO_ACCEL:
 605                         result = inv_mpu6050_write_accel_scale(st, val2);
 606                         break;
 607                 default:
 608                         result = -EINVAL;
 609                         break;
 610                 }
 611                 break;
 612         case IIO_CHAN_INFO_CALIBBIAS:
 613                 switch (chan->type) {
 614                 case IIO_ANGL_VEL:
 615                         result = inv_mpu6050_sensor_set(st,
 616                                                         st->reg->gyro_offset,
 617                                                         chan->channel2, val);
 618                         break;
 619                 case IIO_ACCEL:
 620                         result = inv_mpu6050_sensor_set(st,
 621                                                         st->reg->accl_offset,
 622                                                         chan->channel2, val);
 623                         break;
 624                 default:
 625                         result = -EINVAL;
 626                         break;
 627                 }
 628                 break;
 629         default:
 630                 result = -EINVAL;
 631                 break;
 632         }
 633 
 634         result |= inv_mpu6050_set_power_itg(st, false);
 635 error_write_raw_unlock:
 636         mutex_unlock(&st->lock);
 637         iio_device_release_direct_mode(indio_dev);
 638 
 639         return result;
 640 }
 641 
 642 /**
 643  *  inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
 644  *
 645  *                  Based on the Nyquist principle, the sampling rate must
 646  *                  exceed twice of the bandwidth of the signal, or there
 647  *                  would be alising. This function basically search for the
 648  *                  correct low pass parameters based on the fifo rate, e.g,
 649  *                  sampling frequency.
 650  *
 651  *  lpf is set automatically when setting sampling rate to avoid any aliases.
 652  */
 653 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
 654 {
 655         static const int hz[] = {188, 98, 42, 20, 10, 5};
 656         static const int d[] = {
 657                 INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
 658                 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
 659                 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
 660         };
 661         int i, h, result;
 662         u8 data;
 663 
 664         h = (rate >> 1);
 665         i = 0;
 666         while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
 667                 i++;
 668         data = d[i];
 669         result = inv_mpu6050_set_lpf_regs(st, data);
 670         if (result)
 671                 return result;
 672         st->chip_config.lpf = data;
 673 
 674         return 0;
 675 }
 676 
 677 /**
 678  * inv_mpu6050_fifo_rate_store() - Set fifo rate.
 679  */
 680 static ssize_t
 681 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
 682                             const char *buf, size_t count)
 683 {
 684         int fifo_rate;
 685         u8 d;
 686         int result;
 687         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 688         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 689 
 690         if (kstrtoint(buf, 10, &fifo_rate))
 691                 return -EINVAL;
 692         if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
 693             fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
 694                 return -EINVAL;
 695 
 696         result = iio_device_claim_direct_mode(indio_dev);
 697         if (result)
 698                 return result;
 699 
 700         /* compute the chip sample rate divider */
 701         d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
 702         /* compute back the fifo rate to handle truncation cases */
 703         fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
 704 
 705         mutex_lock(&st->lock);
 706         if (d == st->chip_config.divider) {
 707                 result = 0;
 708                 goto fifo_rate_fail_unlock;
 709         }
 710         result = inv_mpu6050_set_power_itg(st, true);
 711         if (result)
 712                 goto fifo_rate_fail_unlock;
 713 
 714         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 715         if (result)
 716                 goto fifo_rate_fail_power_off;
 717         st->chip_config.divider = d;
 718 
 719         result = inv_mpu6050_set_lpf(st, fifo_rate);
 720         if (result)
 721                 goto fifo_rate_fail_power_off;
 722 
 723 fifo_rate_fail_power_off:
 724         result |= inv_mpu6050_set_power_itg(st, false);
 725 fifo_rate_fail_unlock:
 726         mutex_unlock(&st->lock);
 727         iio_device_release_direct_mode(indio_dev);
 728         if (result)
 729                 return result;
 730 
 731         return count;
 732 }
 733 
 734 /**
 735  * inv_fifo_rate_show() - Get the current sampling rate.
 736  */
 737 static ssize_t
 738 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
 739                    char *buf)
 740 {
 741         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 742         unsigned fifo_rate;
 743 
 744         mutex_lock(&st->lock);
 745         fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
 746         mutex_unlock(&st->lock);
 747 
 748         return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
 749 }
 750 
 751 /**
 752  * inv_attr_show() - calling this function will show current
 753  *                    parameters.
 754  *
 755  * Deprecated in favor of IIO mounting matrix API.
 756  *
 757  * See inv_get_mount_matrix()
 758  */
 759 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
 760                              char *buf)
 761 {
 762         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 763         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 764         s8 *m;
 765 
 766         switch (this_attr->address) {
 767         /*
 768          * In MPU6050, the two matrix are the same because gyro and accel
 769          * are integrated in one chip
 770          */
 771         case ATTR_GYRO_MATRIX:
 772         case ATTR_ACCL_MATRIX:
 773                 m = st->plat_data.orientation;
 774 
 775                 return scnprintf(buf, PAGE_SIZE,
 776                         "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
 777                         m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
 778         default:
 779                 return -EINVAL;
 780         }
 781 }
 782 
 783 /**
 784  * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
 785  *                                  MPU6050 device.
 786  * @indio_dev: The IIO device
 787  * @trig: The new trigger
 788  *
 789  * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
 790  * device, -EINVAL otherwise.
 791  */
 792 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
 793                                         struct iio_trigger *trig)
 794 {
 795         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 796 
 797         if (st->trig != trig)
 798                 return -EINVAL;
 799 
 800         return 0;
 801 }
 802 
 803 static const struct iio_mount_matrix *
 804 inv_get_mount_matrix(const struct iio_dev *indio_dev,
 805                      const struct iio_chan_spec *chan)
 806 {
 807         struct inv_mpu6050_state *data = iio_priv(indio_dev);
 808 
 809         return &data->orientation;
 810 }
 811 
 812 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
 813         IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
 814         { }
 815 };
 816 
 817 #define INV_MPU6050_CHAN(_type, _channel2, _index)                    \
 818         {                                                             \
 819                 .type = _type,                                        \
 820                 .modified = 1,                                        \
 821                 .channel2 = _channel2,                                \
 822                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 823                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |        \
 824                                       BIT(IIO_CHAN_INFO_CALIBBIAS),   \
 825                 .scan_index = _index,                                 \
 826                 .scan_type = {                                        \
 827                                 .sign = 's',                          \
 828                                 .realbits = 16,                       \
 829                                 .storagebits = 16,                    \
 830                                 .shift = 0,                           \
 831                                 .endianness = IIO_BE,                 \
 832                              },                                       \
 833                 .ext_info = inv_ext_info,                             \
 834         }
 835 
 836 static const struct iio_chan_spec inv_mpu_channels[] = {
 837         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
 838         /*
 839          * Note that temperature should only be via polled reading only,
 840          * not the final scan elements output.
 841          */
 842         {
 843                 .type = IIO_TEMP,
 844                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
 845                                 | BIT(IIO_CHAN_INFO_OFFSET)
 846                                 | BIT(IIO_CHAN_INFO_SCALE),
 847                 .scan_index = -1,
 848         },
 849         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 850         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 851         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 852 
 853         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 854         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 855         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 856 };
 857 
 858 static const unsigned long inv_mpu_scan_masks[] = {
 859         /* 3-axis accel */
 860         BIT(INV_MPU6050_SCAN_ACCL_X)
 861                 | BIT(INV_MPU6050_SCAN_ACCL_Y)
 862                 | BIT(INV_MPU6050_SCAN_ACCL_Z),
 863         /* 3-axis gyro */
 864         BIT(INV_MPU6050_SCAN_GYRO_X)
 865                 | BIT(INV_MPU6050_SCAN_GYRO_Y)
 866                 | BIT(INV_MPU6050_SCAN_GYRO_Z),
 867         /* 6-axis accel + gyro */
 868         BIT(INV_MPU6050_SCAN_ACCL_X)
 869                 | BIT(INV_MPU6050_SCAN_ACCL_Y)
 870                 | BIT(INV_MPU6050_SCAN_ACCL_Z)
 871                 | BIT(INV_MPU6050_SCAN_GYRO_X)
 872                 | BIT(INV_MPU6050_SCAN_GYRO_Y)
 873                 | BIT(INV_MPU6050_SCAN_GYRO_Z),
 874         0,
 875 };
 876 
 877 static const struct iio_chan_spec inv_icm20602_channels[] = {
 878         IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
 879         {
 880                 .type = IIO_TEMP,
 881                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
 882                                 | BIT(IIO_CHAN_INFO_OFFSET)
 883                                 | BIT(IIO_CHAN_INFO_SCALE),
 884                 .scan_index = INV_ICM20602_SCAN_TEMP,
 885                 .scan_type = {
 886                                 .sign = 's',
 887                                 .realbits = 16,
 888                                 .storagebits = 16,
 889                                 .shift = 0,
 890                                 .endianness = IIO_BE,
 891                              },
 892         },
 893 
 894         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_ICM20602_SCAN_GYRO_X),
 895         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_ICM20602_SCAN_GYRO_Y),
 896         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_ICM20602_SCAN_GYRO_Z),
 897 
 898         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_ICM20602_SCAN_ACCL_Y),
 899         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_ICM20602_SCAN_ACCL_X),
 900         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
 901 };
 902 
 903 static const unsigned long inv_icm20602_scan_masks[] = {
 904         /* 3-axis accel + temp (mandatory) */
 905         BIT(INV_ICM20602_SCAN_ACCL_X)
 906                 | BIT(INV_ICM20602_SCAN_ACCL_Y)
 907                 | BIT(INV_ICM20602_SCAN_ACCL_Z)
 908                 | BIT(INV_ICM20602_SCAN_TEMP),
 909         /* 3-axis gyro + temp (mandatory) */
 910         BIT(INV_ICM20602_SCAN_GYRO_X)
 911                 | BIT(INV_ICM20602_SCAN_GYRO_Y)
 912                 | BIT(INV_ICM20602_SCAN_GYRO_Z)
 913                 | BIT(INV_ICM20602_SCAN_TEMP),
 914         /* 6-axis accel + gyro + temp (mandatory) */
 915         BIT(INV_ICM20602_SCAN_ACCL_X)
 916                 | BIT(INV_ICM20602_SCAN_ACCL_Y)
 917                 | BIT(INV_ICM20602_SCAN_ACCL_Z)
 918                 | BIT(INV_ICM20602_SCAN_GYRO_X)
 919                 | BIT(INV_ICM20602_SCAN_GYRO_Y)
 920                 | BIT(INV_ICM20602_SCAN_GYRO_Z)
 921                 | BIT(INV_ICM20602_SCAN_TEMP),
 922         0,
 923 };
 924 
 925 /*
 926  * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
 927  * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
 928  * low-pass filter. Specifically, each of these sampling rates are about twice
 929  * the bandwidth of a corresponding low-pass filter, which should eliminate
 930  * aliasing following the Nyquist principle. By picking a frequency different
 931  * from these, the user risks aliasing effects.
 932  */
 933 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
 934 static IIO_CONST_ATTR(in_anglvel_scale_available,
 935                                           "0.000133090 0.000266181 0.000532362 0.001064724");
 936 static IIO_CONST_ATTR(in_accel_scale_available,
 937                                           "0.000598 0.001196 0.002392 0.004785");
 938 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
 939         inv_mpu6050_fifo_rate_store);
 940 
 941 /* Deprecated: kept for userspace backward compatibility. */
 942 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
 943         ATTR_GYRO_MATRIX);
 944 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
 945         ATTR_ACCL_MATRIX);
 946 
 947 static struct attribute *inv_attributes[] = {
 948         &iio_dev_attr_in_gyro_matrix.dev_attr.attr,  /* deprecated */
 949         &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
 950         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 951         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 952         &iio_const_attr_in_accel_scale_available.dev_attr.attr,
 953         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 954         NULL,
 955 };
 956 
 957 static const struct attribute_group inv_attribute_group = {
 958         .attrs = inv_attributes
 959 };
 960 
 961 static const struct iio_info mpu_info = {
 962         .read_raw = &inv_mpu6050_read_raw,
 963         .write_raw = &inv_mpu6050_write_raw,
 964         .write_raw_get_fmt = &inv_write_raw_get_fmt,
 965         .attrs = &inv_attribute_group,
 966         .validate_trigger = inv_mpu6050_validate_trigger,
 967 };
 968 
 969 /**
 970  *  inv_check_and_setup_chip() - check and setup chip.
 971  */
 972 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
 973 {
 974         int result;
 975         unsigned int regval;
 976         int i;
 977 
 978         st->hw  = &hw_info[st->chip_type];
 979         st->reg = hw_info[st->chip_type].reg;
 980 
 981         /* check chip self-identification */
 982         result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, &regval);
 983         if (result)
 984                 return result;
 985         if (regval != st->hw->whoami) {
 986                 /* check whoami against all possible values */
 987                 for (i = 0; i < INV_NUM_PARTS; ++i) {
 988                         if (regval == hw_info[i].whoami) {
 989                                 dev_warn(regmap_get_device(st->map),
 990                                         "whoami mismatch got %#02x (%s)"
 991                                         "expected %#02hhx (%s)\n",
 992                                         regval, hw_info[i].name,
 993                                         st->hw->whoami, st->hw->name);
 994                                 break;
 995                         }
 996                 }
 997                 if (i >= INV_NUM_PARTS) {
 998                         dev_err(regmap_get_device(st->map),
 999                                 "invalid whoami %#02x expected %#02hhx (%s)\n",
1000                                 regval, st->hw->whoami, st->hw->name);
1001                         return -ENODEV;
1002                 }
1003         }
1004 
1005         /* reset to make sure previous state are not there */
1006         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1007                               INV_MPU6050_BIT_H_RESET);
1008         if (result)
1009                 return result;
1010         msleep(INV_MPU6050_POWER_UP_TIME);
1011 
1012         /*
1013          * Turn power on. After reset, the sleep bit could be on
1014          * or off depending on the OTP settings. Turning power on
1015          * make it in a definite state as well as making the hardware
1016          * state align with the software state
1017          */
1018         result = inv_mpu6050_set_power_itg(st, true);
1019         if (result)
1020                 return result;
1021 
1022         result = inv_mpu6050_switch_engine(st, false,
1023                                            INV_MPU6050_BIT_PWR_ACCL_STBY);
1024         if (result)
1025                 goto error_power_off;
1026         result = inv_mpu6050_switch_engine(st, false,
1027                                            INV_MPU6050_BIT_PWR_GYRO_STBY);
1028         if (result)
1029                 goto error_power_off;
1030 
1031         return inv_mpu6050_set_power_itg(st, false);
1032 
1033 error_power_off:
1034         inv_mpu6050_set_power_itg(st, false);
1035         return result;
1036 }
1037 
1038 static int inv_mpu_core_enable_regulator(struct inv_mpu6050_state *st)
1039 {
1040         int result;
1041 
1042         result = regulator_enable(st->vddio_supply);
1043         if (result) {
1044                 dev_err(regmap_get_device(st->map),
1045                         "Failed to enable regulator: %d\n", result);
1046         } else {
1047                 /* Give the device a little bit of time to start up. */
1048                 usleep_range(35000, 70000);
1049         }
1050 
1051         return result;
1052 }
1053 
1054 static int inv_mpu_core_disable_regulator(struct inv_mpu6050_state *st)
1055 {
1056         int result;
1057 
1058         result = regulator_disable(st->vddio_supply);
1059         if (result)
1060                 dev_err(regmap_get_device(st->map),
1061                         "Failed to disable regulator: %d\n", result);
1062 
1063         return result;
1064 }
1065 
1066 static void inv_mpu_core_disable_regulator_action(void *_data)
1067 {
1068         inv_mpu_core_disable_regulator(_data);
1069 }
1070 
1071 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1072                 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1073 {
1074         struct inv_mpu6050_state *st;
1075         struct iio_dev *indio_dev;
1076         struct inv_mpu6050_platform_data *pdata;
1077         struct device *dev = regmap_get_device(regmap);
1078         int result;
1079         struct irq_data *desc;
1080         int irq_type;
1081 
1082         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1083         if (!indio_dev)
1084                 return -ENOMEM;
1085 
1086         BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1087         if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1088                 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1089                                 chip_type, name);
1090                 return -ENODEV;
1091         }
1092         st = iio_priv(indio_dev);
1093         mutex_init(&st->lock);
1094         st->chip_type = chip_type;
1095         st->powerup_count = 0;
1096         st->irq = irq;
1097         st->map = regmap;
1098 
1099         pdata = dev_get_platdata(dev);
1100         if (!pdata) {
1101                 result = iio_read_mount_matrix(dev, "mount-matrix",
1102                                                &st->orientation);
1103                 if (result) {
1104                         dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1105                                 result);
1106                         return result;
1107                 }
1108         } else {
1109                 st->plat_data = *pdata;
1110         }
1111 
1112         desc = irq_get_irq_data(irq);
1113         if (!desc) {
1114                 dev_err(dev, "Could not find IRQ %d\n", irq);
1115                 return -EINVAL;
1116         }
1117 
1118         irq_type = irqd_get_trigger_type(desc);
1119         if (!irq_type)
1120                 irq_type = IRQF_TRIGGER_RISING;
1121         if (irq_type == IRQF_TRIGGER_RISING)
1122                 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1123         else if (irq_type == IRQF_TRIGGER_FALLING)
1124                 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1125         else if (irq_type == IRQF_TRIGGER_HIGH)
1126                 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1127                         INV_MPU6050_LATCH_INT_EN;
1128         else if (irq_type == IRQF_TRIGGER_LOW)
1129                 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1130                         INV_MPU6050_LATCH_INT_EN;
1131         else {
1132                 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1133                         irq_type);
1134                 return -EINVAL;
1135         }
1136 
1137         st->vddio_supply = devm_regulator_get(dev, "vddio");
1138         if (IS_ERR(st->vddio_supply)) {
1139                 if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER)
1140                         dev_err(dev, "Failed to get vddio regulator %d\n",
1141                                 (int)PTR_ERR(st->vddio_supply));
1142 
1143                 return PTR_ERR(st->vddio_supply);
1144         }
1145 
1146         result = inv_mpu_core_enable_regulator(st);
1147         if (result)
1148                 return result;
1149 
1150         result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1151                                  st);
1152         if (result) {
1153                 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1154                         result);
1155                 return result;
1156         }
1157 
1158         /* power is turned on inside check chip type*/
1159         result = inv_check_and_setup_chip(st);
1160         if (result)
1161                 return result;
1162 
1163         result = inv_mpu6050_init_config(indio_dev);
1164         if (result) {
1165                 dev_err(dev, "Could not initialize device.\n");
1166                 return result;
1167         }
1168 
1169         if (inv_mpu_bus_setup)
1170                 inv_mpu_bus_setup(indio_dev);
1171 
1172         dev_set_drvdata(dev, indio_dev);
1173         indio_dev->dev.parent = dev;
1174         /* name will be NULL when enumerated via ACPI */
1175         if (name)
1176                 indio_dev->name = name;
1177         else
1178                 indio_dev->name = dev_name(dev);
1179 
1180         if (chip_type == INV_ICM20602) {
1181                 indio_dev->channels = inv_icm20602_channels;
1182                 indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
1183                 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1184         } else {
1185                 indio_dev->channels = inv_mpu_channels;
1186                 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1187                 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1188         }
1189 
1190         indio_dev->info = &mpu_info;
1191         indio_dev->modes = INDIO_BUFFER_TRIGGERED;
1192 
1193         result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1194                                                  iio_pollfunc_store_time,
1195                                                  inv_mpu6050_read_fifo,
1196                                                  NULL);
1197         if (result) {
1198                 dev_err(dev, "configure buffer fail %d\n", result);
1199                 return result;
1200         }
1201         result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1202         if (result) {
1203                 dev_err(dev, "trigger probe fail %d\n", result);
1204                 return result;
1205         }
1206 
1207         result = devm_iio_device_register(dev, indio_dev);
1208         if (result) {
1209                 dev_err(dev, "IIO register fail %d\n", result);
1210                 return result;
1211         }
1212 
1213         return 0;
1214 }
1215 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1216 
1217 #ifdef CONFIG_PM_SLEEP
1218 
1219 static int inv_mpu_resume(struct device *dev)
1220 {
1221         struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1222         int result;
1223 
1224         mutex_lock(&st->lock);
1225         result = inv_mpu_core_enable_regulator(st);
1226         if (result)
1227                 goto out_unlock;
1228 
1229         result = inv_mpu6050_set_power_itg(st, true);
1230 out_unlock:
1231         mutex_unlock(&st->lock);
1232 
1233         return result;
1234 }
1235 
1236 static int inv_mpu_suspend(struct device *dev)
1237 {
1238         struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1239         int result;
1240 
1241         mutex_lock(&st->lock);
1242         result = inv_mpu6050_set_power_itg(st, false);
1243         inv_mpu_core_disable_regulator(st);
1244         mutex_unlock(&st->lock);
1245 
1246         return result;
1247 }
1248 #endif /* CONFIG_PM_SLEEP */
1249 
1250 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
1251 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1252 
1253 MODULE_AUTHOR("Invensense Corporation");
1254 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1255 MODULE_LICENSE("GPL");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

DEFINITIONS
