1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * viking.h: Defines specific to the GNU/Viking MBUS module.
4 * This is SRMMU stuff.
5 *
6 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
7 */
8 #ifndef _SPARC_VIKING_H
9 #define _SPARC_VIKING_H
10
11 #include <asm/asi.h>
12 #include <asm/mxcc.h>
13 #include <asm/pgtsrmmu.h>
14
15 /* Bits in the SRMMU control register for GNU/Viking modules.
16 *
17 * -----------------------------------------------------------
18 * |impl-vers| RSV |TC|AC|SP|BM|PC|MBM|SB|IC|DC|PSO|RSV|NF|ME|
19 * -----------------------------------------------------------
20 * 31 24 23-17 16 15 14 13 12 11 10 9 8 7 6-2 1 0
21 *
22 * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache
23 * 1 = Twalks are cacheable in E-cache
24 *
25 * GNU/Viking will only cache tablewalks in the E-cache (mxcc) if present
26 * and never caches them internally (or so states the docs). Therefore
27 * for machines lacking an E-cache (ie. in MBUS mode) this bit must
28 * remain cleared.
29 *
30 * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable
31 * 1 = Passthru physical accesses cacheable
32 *
33 * This indicates whether accesses are cacheable when no cachable bit
34 * is present in the pte when the processor is in boot-mode or the
35 * access does not need pte's for translation (ie. pass-thru ASI's).
36 * "Cachable" is only referring to E-cache (if present) and not the
37 * on chip split I/D caches of the GNU/Viking.
38 *
39 * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on
40 *
41 * This enables snooping on the GNU/Viking bus. This must be on
42 * for the hardware cache consistency mechanisms of the GNU/Viking
43 * to work at all. On non-mxcc GNU/Viking modules the split I/D
44 * caches will snoop regardless of whether they are enabled, this
45 * takes care of the case where the I or D or both caches are turned
46 * off yet still contain valid data. Note also that this bit does
47 * not affect GNU/Viking store-buffer snoops, those happen if the
48 * store-buffer is enabled no matter what.
49 *
50 * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode
51 *
52 * This indicates whether the GNU/Viking is in boot-mode or not,
53 * if it is then all instruction fetch physical addresses are
54 * computed as 0xff0000000 + low 28 bits of requested address.
55 * GNU/Viking boot-mode does not affect data accesses. Also,
56 * in boot mode instruction accesses bypass the split on chip I/D
57 * caches, they may be cached by the GNU/MXCC if present and enabled.
58 *
59 * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode
60 *
61 * This indicated the GNU/Viking configuration present. If in
62 * MBUS mode, the GNU/Viking lacks a GNU/MXCC E-cache. If it is
63 * not then the GNU/Viking is on a module VBUS connected directly
64 * to a GNU/MXCC cache controller. The GNU/MXCC can be thus connected
65 * to either an GNU/MBUS (sun4m) or the packet-switched GNU/XBus (sun4d).
66 *
67 * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on
68 *
69 * The GNU/Viking store buffer allows the chip to continue execution
70 * after a store even if the data cannot be placed in one of the
71 * caches during that cycle. If disabled, all stores operations
72 * occur synchronously.
73 *
74 * IC: Instruction Cache -- 0 = off, 1 = on
75 * DC: Data Cache -- 0 = off, 1 = 0n
76 *
77 * These bits enable the on-cpu GNU/Viking split I/D caches. Note,
78 * as mentioned above, these caches will snoop the bus in GNU/MBUS
79 * configurations even when disabled to avoid data corruption.
80 *
81 * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap
82 * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating
83 *
84 */
85
86 #define VIKING_MMUENABLE 0x00000001
87 #define VIKING_NOFAULT 0x00000002
88 #define VIKING_PSO 0x00000080
89 #define VIKING_DCENABLE 0x00000100 /* Enable data cache */
90 #define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */
91 #define VIKING_SBENABLE 0x00000400 /* Enable store buffer */
92 #define VIKING_MMODE 0x00000800 /* MBUS mode */
93 #define VIKING_PCENABLE 0x00001000 /* Enable parity checking */
94 #define VIKING_BMODE 0x00002000
95 #define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */
96 #define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */
97 #define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */
98 #define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */
99
100 /*
101 * GNU/Viking Breakpoint Action Register fields.
102 */
103 #define VIKING_ACTION_MIX 0x00001000 /* Enable multiple instructions */
104
105 /*
106 * GNU/Viking Cache Tags.
107 */
108 #define VIKING_PTAG_VALID 0x01000000 /* Cache block is valid */
109 #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */
110 #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */
111
112 #ifndef __ASSEMBLY__
113
114 static inline void viking_flush_icache(void)
115 {
116 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
117 : /* no outputs */
118 : "i" (ASI_M_IC_FLCLEAR)
119 : "memory");
120 }
121
122 static inline void viking_flush_dcache(void)
123 {
124 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
125 : /* no outputs */
126 : "i" (ASI_M_DC_FLCLEAR)
127 : "memory");
128 }
129
130 static inline void viking_unlock_icache(void)
131 {
132 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"
133 : /* no outputs */
134 : "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR)
135 : "memory");
136 }
137
138 static inline void viking_unlock_dcache(void)
139 {
140 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"
141 : /* no outputs */
142 : "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR)
143 : "memory");
144 }
145
146 static inline void viking_set_bpreg(unsigned long regval)
147 {
148 __asm__ __volatile__("sta %0, [%%g0] %1\n\t"
149 : /* no outputs */
150 : "r" (regval), "i" (ASI_M_ACTION)
151 : "memory");
152 }
153
154 static inline unsigned long viking_get_bpreg(void)
155 {
156 unsigned long regval;
157
158 __asm__ __volatile__("lda [%%g0] %1, %0\n\t"
159 : "=r" (regval)
160 : "i" (ASI_M_ACTION));
161 return regval;
162 }
163
164 static inline void viking_get_dcache_ptag(int set, int block,
165 unsigned long *data)
166 {
167 unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) |
168 0x80000000;
169 unsigned long info, page;
170
171 __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t"
172 "or %%g0, %%g2, %0\n\t"
173 "or %%g0, %%g3, %1\n\t"
174 : "=r" (info), "=r" (page)
175 : "r" (ptag), "i" (ASI_M_DATAC_TAG)
176 : "g2", "g3");
177 data[0] = info;
178 data[1] = page;
179 }
180
181 static inline void viking_mxcc_turn_off_parity(unsigned long *mregp,
182 unsigned long *mxcc_cregp)
183 {
184 unsigned long mreg = *mregp;
185 unsigned long mxcc_creg = *mxcc_cregp;
186
187 mreg &= ~(VIKING_PCENABLE);
188 mxcc_creg &= ~(MXCC_CTL_PARE);
189
190 __asm__ __volatile__ ("set 1f, %%g2\n\t"
191 "andcc %%g2, 4, %%g0\n\t"
192 "bne 2f\n\t"
193 " nop\n"
194 "1:\n\t"
195 "sta %0, [%%g0] %3\n\t"
196 "sta %1, [%2] %4\n\t"
197 "b 1f\n\t"
198 " nop\n\t"
199 "nop\n"
200 "2:\n\t"
201 "sta %0, [%%g0] %3\n\t"
202 "sta %1, [%2] %4\n"
203 "1:\n\t"
204 : /* no output */
205 : "r" (mreg), "r" (mxcc_creg),
206 "r" (MXCC_CREG), "i" (ASI_M_MMUREGS),
207 "i" (ASI_M_MXCC)
208 : "g2", "memory", "cc");
209 *mregp = mreg;
210 *mxcc_cregp = mxcc_creg;
211 }
212
213 static inline unsigned long viking_hwprobe(unsigned long vaddr)
214 {
215 unsigned long val;
216
217 vaddr &= PAGE_MASK;
218 /* Probe all MMU entries. */
219 __asm__ __volatile__("lda [%1] %2, %0\n\t"
220 : "=r" (val)
221 : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));
222 if (!val)
223 return 0;
224
225 /* Probe region. */
226 __asm__ __volatile__("lda [%1] %2, %0\n\t"
227 : "=r" (val)
228 : "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE));
229 if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
230 vaddr &= ~SRMMU_PGDIR_MASK;
231 vaddr >>= PAGE_SHIFT;
232 return val | (vaddr << 8);
233 }
234
235 /* Probe segment. */
236 __asm__ __volatile__("lda [%1] %2, %0\n\t"
237 : "=r" (val)
238 : "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE));
239 if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
240 vaddr &= ~SRMMU_REAL_PMD_MASK;
241 vaddr >>= PAGE_SHIFT;
242 return val | (vaddr << 8);
243 }
244
245 /* Probe page. */
246 __asm__ __volatile__("lda [%1] %2, %0\n\t"
247 : "=r" (val)
248 : "r" (vaddr), "i" (ASI_M_FLUSH_PROBE));
249 return val;
250 }
251
252 #endif /* !__ASSEMBLY__ */
253
254 #endif /* !(_SPARC_VIKING_H) */