This source file includes following definitions.
- kxcjk1013_set_mode
- kxcjk1013_get_mode
- kxcjk1013_set_range
- kxcjk1013_chip_init
- kxcjk1013_get_startup_times
- kxcjk1013_set_power_state
- kxcjk1013_chip_update_thresholds
- kxcjk1013_setup_any_motion_interrupt
- kxcjk1013_setup_new_data_interrupt
- kxcjk1013_find_odr_value
- kxcjk1013_convert_odr_value
- kxcjk1013_set_odr
- kxcjk1013_get_odr
- kxcjk1013_get_acc_reg
- kxcjk1013_set_scale
- kxcjk1013_read_raw
- kxcjk1013_write_raw
- kxcjk1013_read_event
- kxcjk1013_write_event
- kxcjk1013_read_event_config
- kxcjk1013_write_event_config
- kxcjk1013_buffer_preenable
- kxcjk1013_buffer_postdisable
- kxcjk1013_get_samp_freq_avail
- kxcjk1013_trigger_handler
- kxcjk1013_trig_try_reen
- kxcjk1013_data_rdy_trigger_set_state
- kxcjk1013_report_motion_event
- kxcjk1013_event_handler
- kxcjk1013_data_rdy_trig_poll
- kxcjk1013_match_acpi_device
- kxcjk1013_probe
- kxcjk1013_remove
- kxcjk1013_suspend
- kxcjk1013_resume
- kxcjk1013_runtime_suspend
- kxcjk1013_runtime_resume
1
2
3
4
5
6
7 #include <linux/module.h>
8 #include <linux/i2c.h>
9 #include <linux/interrupt.h>
10 #include <linux/delay.h>
11 #include <linux/bitops.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include <linux/acpi.h>
15 #include <linux/pm.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19 #include <linux/iio/buffer.h>
20 #include <linux/iio/trigger.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/trigger_consumer.h>
23 #include <linux/iio/triggered_buffer.h>
24 #include <linux/iio/accel/kxcjk_1013.h>
25
26 #define KXCJK1013_DRV_NAME "kxcjk1013"
27 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
28
29 #define KXTF9_REG_HP_XOUT_L 0x00
30 #define KXTF9_REG_HP_XOUT_H 0x01
31 #define KXTF9_REG_HP_YOUT_L 0x02
32 #define KXTF9_REG_HP_YOUT_H 0x03
33 #define KXTF9_REG_HP_ZOUT_L 0x04
34 #define KXTF9_REG_HP_ZOUT_H 0x05
35
36 #define KXCJK1013_REG_XOUT_L 0x06
37
38
39
40
41
42 #define KXCJK1013_REG_XOUT_H 0x07
43 #define KXCJK1013_REG_YOUT_L 0x08
44 #define KXCJK1013_REG_YOUT_H 0x09
45 #define KXCJK1013_REG_ZOUT_L 0x0A
46 #define KXCJK1013_REG_ZOUT_H 0x0B
47
48 #define KXCJK1013_REG_DCST_RESP 0x0C
49 #define KXCJK1013_REG_WHO_AM_I 0x0F
50 #define KXTF9_REG_TILT_POS_CUR 0x10
51 #define KXTF9_REG_TILT_POS_PREV 0x11
52 #define KXTF9_REG_INT_SRC1 0x15
53 #define KXCJK1013_REG_INT_SRC1 0x16
54 #define KXCJK1013_REG_INT_SRC2 0x17
55 #define KXCJK1013_REG_STATUS_REG 0x18
56 #define KXCJK1013_REG_INT_REL 0x1A
57 #define KXCJK1013_REG_CTRL1 0x1B
58 #define KXTF9_REG_CTRL2 0x1C
59 #define KXCJK1013_REG_CTRL2 0x1D
60 #define KXCJK1013_REG_INT_CTRL1 0x1E
61 #define KXCJK1013_REG_INT_CTRL2 0x1F
62 #define KXTF9_REG_INT_CTRL3 0x20
63 #define KXCJK1013_REG_DATA_CTRL 0x21
64 #define KXTF9_REG_TILT_TIMER 0x28
65 #define KXCJK1013_REG_WAKE_TIMER 0x29
66 #define KXTF9_REG_TDT_TIMER 0x2B
67 #define KXTF9_REG_TDT_THRESH_H 0x2C
68 #define KXTF9_REG_TDT_THRESH_L 0x2D
69 #define KXTF9_REG_TDT_TAP_TIMER 0x2E
70 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
71 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30
72 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31
73 #define KXCJK1013_REG_SELF_TEST 0x3A
74 #define KXTF9_REG_WAKE_THRESH 0x5A
75 #define KXTF9_REG_TILT_ANGLE 0x5C
76 #define KXTF9_REG_HYST_SET 0x5F
77 #define KXCJK1013_REG_WAKE_THRES 0x6A
78
79 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
80 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
81 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
82 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
83 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
84 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
85
86 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2)
87 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
88 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
89 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
90
91 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
92 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
93 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
94 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
95 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
96 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
97
98 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
99 #define KXCJK1013_MAX_STARTUP_TIME_US 100000
100
101 #define KXCJK1013_SLEEP_DELAY_MS 2000
102
103 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0)
104 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
105 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3))
106 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
107 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
108 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
109 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
110
111
112 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
113 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
114 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
115 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
116 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
117 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
118
119 #define KXCJK1013_DEFAULT_WAKE_THRES 1
120
121 enum kx_chipset {
122 KXCJK1013,
123 KXCJ91008,
124 KXTJ21009,
125 KXTF9,
126 KX_MAX_CHIPS
127 };
128
129 struct kxcjk1013_data {
130 struct i2c_client *client;
131 struct iio_trigger *dready_trig;
132 struct iio_trigger *motion_trig;
133 struct mutex mutex;
134 s16 buffer[8];
135 u8 odr_bits;
136 u8 range;
137 int wake_thres;
138 int wake_dur;
139 bool active_high_intr;
140 bool dready_trigger_on;
141 int ev_enable_state;
142 bool motion_trigger_on;
143 int64_t timestamp;
144 enum kx_chipset chipset;
145 bool is_smo8500_device;
146 };
147
148 enum kxcjk1013_axis {
149 AXIS_X,
150 AXIS_Y,
151 AXIS_Z,
152 AXIS_MAX,
153 };
154
155 enum kxcjk1013_mode {
156 STANDBY,
157 OPERATION,
158 };
159
160 enum kxcjk1013_range {
161 KXCJK1013_RANGE_2G,
162 KXCJK1013_RANGE_4G,
163 KXCJK1013_RANGE_8G,
164 };
165
166 struct kx_odr_map {
167 int val;
168 int val2;
169 int odr_bits;
170 int wuf_bits;
171 };
172
173 static const struct kx_odr_map samp_freq_table[] = {
174 { 0, 781000, 0x08, 0x00 },
175 { 1, 563000, 0x09, 0x01 },
176 { 3, 125000, 0x0A, 0x02 },
177 { 6, 250000, 0x0B, 0x03 },
178 { 12, 500000, 0x00, 0x04 },
179 { 25, 0, 0x01, 0x05 },
180 { 50, 0, 0x02, 0x06 },
181 { 100, 0, 0x03, 0x06 },
182 { 200, 0, 0x04, 0x06 },
183 { 400, 0, 0x05, 0x06 },
184 { 800, 0, 0x06, 0x06 },
185 { 1600, 0, 0x07, 0x06 },
186 };
187
188 static const char *const kxcjk1013_samp_freq_avail =
189 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
190
191 static const struct kx_odr_map kxtf9_samp_freq_table[] = {
192 { 25, 0, 0x01, 0x00 },
193 { 50, 0, 0x02, 0x01 },
194 { 100, 0, 0x03, 0x01 },
195 { 200, 0, 0x04, 0x01 },
196 { 400, 0, 0x05, 0x01 },
197 { 800, 0, 0x06, 0x01 },
198 };
199
200 static const char *const kxtf9_samp_freq_avail =
201 "25 50 100 200 400 800";
202
203
204 static const struct {
205 int odr_bits;
206 int usec;
207 } odr_start_up_times[KX_MAX_CHIPS][12] = {
208
209 {
210 {0x08, 100000},
211 {0x09, 100000},
212 {0x0A, 100000},
213 {0x0B, 100000},
214 {0, 80000},
215 {0x01, 41000},
216 {0x02, 21000},
217 {0x03, 11000},
218 {0x04, 6400},
219 {0x05, 3900},
220 {0x06, 2700},
221 {0x07, 2100},
222 },
223
224 {
225 {0x08, 100000},
226 {0x09, 100000},
227 {0x0A, 100000},
228 {0x0B, 100000},
229 {0, 80000},
230 {0x01, 41000},
231 {0x02, 21000},
232 {0x03, 11000},
233 {0x04, 6400},
234 {0x05, 3900},
235 {0x06, 2700},
236 {0x07, 2100},
237 },
238
239 {
240 {0x08, 1240000},
241 {0x09, 621000},
242 {0x0A, 309000},
243 {0x0B, 151000},
244 {0, 80000},
245 {0x01, 41000},
246 {0x02, 21000},
247 {0x03, 11000},
248 {0x04, 6000},
249 {0x05, 4000},
250 {0x06, 3000},
251 {0x07, 2000},
252 },
253
254 {
255 {0x01, 81000},
256 {0x02, 41000},
257 {0x03, 21000},
258 {0x04, 11000},
259 {0x05, 5100},
260 {0x06, 2700},
261 },
262 };
263
264 static const struct {
265 u16 scale;
266 u8 gsel_0;
267 u8 gsel_1;
268 } KXCJK1013_scale_table[] = { {9582, 0, 0},
269 {19163, 1, 0},
270 {38326, 0, 1} };
271
272 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
273 enum kxcjk1013_mode mode)
274 {
275 int ret;
276
277 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
278 if (ret < 0) {
279 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
280 return ret;
281 }
282
283 if (mode == STANDBY)
284 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
285 else
286 ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
287
288 ret = i2c_smbus_write_byte_data(data->client,
289 KXCJK1013_REG_CTRL1, ret);
290 if (ret < 0) {
291 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
292 return ret;
293 }
294
295 return 0;
296 }
297
298 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
299 enum kxcjk1013_mode *mode)
300 {
301 int ret;
302
303 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
304 if (ret < 0) {
305 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
306 return ret;
307 }
308
309 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
310 *mode = OPERATION;
311 else
312 *mode = STANDBY;
313
314 return 0;
315 }
316
317 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
318 {
319 int ret;
320
321 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
322 if (ret < 0) {
323 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
324 return ret;
325 }
326
327 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
328 KXCJK1013_REG_CTRL1_BIT_GSEL1);
329 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
330 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
331
332 ret = i2c_smbus_write_byte_data(data->client,
333 KXCJK1013_REG_CTRL1,
334 ret);
335 if (ret < 0) {
336 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
337 return ret;
338 }
339
340 data->range = range_index;
341
342 return 0;
343 }
344
345 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
346 {
347 int ret;
348
349 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
350 if (ret < 0) {
351 dev_err(&data->client->dev, "Error reading who_am_i\n");
352 return ret;
353 }
354
355 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
356
357 ret = kxcjk1013_set_mode(data, STANDBY);
358 if (ret < 0)
359 return ret;
360
361 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
362 if (ret < 0) {
363 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
364 return ret;
365 }
366
367
368 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
369
370 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
371 ret);
372 if (ret < 0) {
373 dev_err(&data->client->dev, "Error reading reg_ctrl\n");
374 return ret;
375 }
376
377
378 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
379 if (ret < 0)
380 return ret;
381
382 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
383 if (ret < 0) {
384 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
385 return ret;
386 }
387
388 data->odr_bits = ret;
389
390
391 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
392 if (ret < 0) {
393 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
394 return ret;
395 }
396
397 if (data->active_high_intr)
398 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
399 else
400 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
401
402 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
403 ret);
404 if (ret < 0) {
405 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
406 return ret;
407 }
408
409 ret = kxcjk1013_set_mode(data, OPERATION);
410 if (ret < 0)
411 return ret;
412
413 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
414
415 return 0;
416 }
417
418 #ifdef CONFIG_PM
419 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
420 {
421 int i;
422 int idx = data->chipset;
423
424 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
425 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
426 return odr_start_up_times[idx][i].usec;
427 }
428
429 return KXCJK1013_MAX_STARTUP_TIME_US;
430 }
431 #endif
432
433 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
434 {
435 #ifdef CONFIG_PM
436 int ret;
437
438 if (on)
439 ret = pm_runtime_get_sync(&data->client->dev);
440 else {
441 pm_runtime_mark_last_busy(&data->client->dev);
442 ret = pm_runtime_put_autosuspend(&data->client->dev);
443 }
444 if (ret < 0) {
445 dev_err(&data->client->dev,
446 "Failed: %s for %d\n", __func__, on);
447 if (on)
448 pm_runtime_put_noidle(&data->client->dev);
449 return ret;
450 }
451 #endif
452
453 return 0;
454 }
455
456 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
457 {
458 int waketh_reg, ret;
459
460 ret = i2c_smbus_write_byte_data(data->client,
461 KXCJK1013_REG_WAKE_TIMER,
462 data->wake_dur);
463 if (ret < 0) {
464 dev_err(&data->client->dev,
465 "Error writing reg_wake_timer\n");
466 return ret;
467 }
468
469 waketh_reg = data->chipset == KXTF9 ?
470 KXTF9_REG_WAKE_THRESH : KXCJK1013_REG_WAKE_THRES;
471 ret = i2c_smbus_write_byte_data(data->client, waketh_reg,
472 data->wake_thres);
473 if (ret < 0) {
474 dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
475 return ret;
476 }
477
478 return 0;
479 }
480
481 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
482 bool status)
483 {
484 int ret;
485 enum kxcjk1013_mode store_mode;
486
487 ret = kxcjk1013_get_mode(data, &store_mode);
488 if (ret < 0)
489 return ret;
490
491
492 ret = kxcjk1013_set_mode(data, STANDBY);
493 if (ret < 0)
494 return ret;
495
496 ret = kxcjk1013_chip_update_thresholds(data);
497 if (ret < 0)
498 return ret;
499
500 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
501 if (ret < 0) {
502 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
503 return ret;
504 }
505
506 if (status)
507 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
508 else
509 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
510
511 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
512 ret);
513 if (ret < 0) {
514 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
515 return ret;
516 }
517
518 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
519 if (ret < 0) {
520 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
521 return ret;
522 }
523
524 if (status)
525 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
526 else
527 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
528
529 ret = i2c_smbus_write_byte_data(data->client,
530 KXCJK1013_REG_CTRL1, ret);
531 if (ret < 0) {
532 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
533 return ret;
534 }
535
536 if (store_mode == OPERATION) {
537 ret = kxcjk1013_set_mode(data, OPERATION);
538 if (ret < 0)
539 return ret;
540 }
541
542 return 0;
543 }
544
545 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
546 bool status)
547 {
548 int ret;
549 enum kxcjk1013_mode store_mode;
550
551 ret = kxcjk1013_get_mode(data, &store_mode);
552 if (ret < 0)
553 return ret;
554
555
556 ret = kxcjk1013_set_mode(data, STANDBY);
557 if (ret < 0)
558 return ret;
559
560 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
561 if (ret < 0) {
562 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
563 return ret;
564 }
565
566 if (status)
567 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
568 else
569 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
570
571 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
572 ret);
573 if (ret < 0) {
574 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
575 return ret;
576 }
577
578 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
579 if (ret < 0) {
580 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
581 return ret;
582 }
583
584 if (status)
585 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
586 else
587 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
588
589 ret = i2c_smbus_write_byte_data(data->client,
590 KXCJK1013_REG_CTRL1, ret);
591 if (ret < 0) {
592 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
593 return ret;
594 }
595
596 if (store_mode == OPERATION) {
597 ret = kxcjk1013_set_mode(data, OPERATION);
598 if (ret < 0)
599 return ret;
600 }
601
602 return 0;
603 }
604
605 static const struct kx_odr_map *kxcjk1013_find_odr_value(
606 const struct kx_odr_map *map, size_t map_size, int val, int val2)
607 {
608 int i;
609
610 for (i = 0; i < map_size; ++i) {
611 if (map[i].val == val && map[i].val2 == val2)
612 return &map[i];
613 }
614
615 return ERR_PTR(-EINVAL);
616 }
617
618 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
619 size_t map_size, int odr_bits,
620 int *val, int *val2)
621 {
622 int i;
623
624 for (i = 0; i < map_size; ++i) {
625 if (map[i].odr_bits == odr_bits) {
626 *val = map[i].val;
627 *val2 = map[i].val2;
628 return IIO_VAL_INT_PLUS_MICRO;
629 }
630 }
631
632 return -EINVAL;
633 }
634
635 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
636 {
637 int ret;
638 enum kxcjk1013_mode store_mode;
639 const struct kx_odr_map *odr_setting;
640
641 ret = kxcjk1013_get_mode(data, &store_mode);
642 if (ret < 0)
643 return ret;
644
645 if (data->chipset == KXTF9)
646 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
647 ARRAY_SIZE(kxtf9_samp_freq_table),
648 val, val2);
649 else
650 odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
651 ARRAY_SIZE(samp_freq_table),
652 val, val2);
653
654 if (IS_ERR(odr_setting))
655 return PTR_ERR(odr_setting);
656
657
658 ret = kxcjk1013_set_mode(data, STANDBY);
659 if (ret < 0)
660 return ret;
661
662 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
663 odr_setting->odr_bits);
664 if (ret < 0) {
665 dev_err(&data->client->dev, "Error writing data_ctrl\n");
666 return ret;
667 }
668
669 data->odr_bits = odr_setting->odr_bits;
670
671 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
672 odr_setting->wuf_bits);
673 if (ret < 0) {
674 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
675 return ret;
676 }
677
678 if (store_mode == OPERATION) {
679 ret = kxcjk1013_set_mode(data, OPERATION);
680 if (ret < 0)
681 return ret;
682 }
683
684 return 0;
685 }
686
687 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
688 {
689 if (data->chipset == KXTF9)
690 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
691 ARRAY_SIZE(kxtf9_samp_freq_table),
692 data->odr_bits, val, val2);
693 else
694 return kxcjk1013_convert_odr_value(samp_freq_table,
695 ARRAY_SIZE(samp_freq_table),
696 data->odr_bits, val, val2);
697 }
698
699 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
700 {
701 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
702 int ret;
703
704 ret = i2c_smbus_read_word_data(data->client, reg);
705 if (ret < 0) {
706 dev_err(&data->client->dev,
707 "failed to read accel_%c registers\n", 'x' + axis);
708 return ret;
709 }
710
711 return ret;
712 }
713
714 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
715 {
716 int ret, i;
717 enum kxcjk1013_mode store_mode;
718
719 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
720 if (KXCJK1013_scale_table[i].scale == val) {
721 ret = kxcjk1013_get_mode(data, &store_mode);
722 if (ret < 0)
723 return ret;
724
725 ret = kxcjk1013_set_mode(data, STANDBY);
726 if (ret < 0)
727 return ret;
728
729 ret = kxcjk1013_set_range(data, i);
730 if (ret < 0)
731 return ret;
732
733 if (store_mode == OPERATION) {
734 ret = kxcjk1013_set_mode(data, OPERATION);
735 if (ret)
736 return ret;
737 }
738
739 return 0;
740 }
741 }
742
743 return -EINVAL;
744 }
745
746 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
747 struct iio_chan_spec const *chan, int *val,
748 int *val2, long mask)
749 {
750 struct kxcjk1013_data *data = iio_priv(indio_dev);
751 int ret;
752
753 switch (mask) {
754 case IIO_CHAN_INFO_RAW:
755 mutex_lock(&data->mutex);
756 if (iio_buffer_enabled(indio_dev))
757 ret = -EBUSY;
758 else {
759 ret = kxcjk1013_set_power_state(data, true);
760 if (ret < 0) {
761 mutex_unlock(&data->mutex);
762 return ret;
763 }
764 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
765 if (ret < 0) {
766 kxcjk1013_set_power_state(data, false);
767 mutex_unlock(&data->mutex);
768 return ret;
769 }
770 *val = sign_extend32(ret >> 4, 11);
771 ret = kxcjk1013_set_power_state(data, false);
772 }
773 mutex_unlock(&data->mutex);
774
775 if (ret < 0)
776 return ret;
777
778 return IIO_VAL_INT;
779
780 case IIO_CHAN_INFO_SCALE:
781 *val = 0;
782 *val2 = KXCJK1013_scale_table[data->range].scale;
783 return IIO_VAL_INT_PLUS_MICRO;
784
785 case IIO_CHAN_INFO_SAMP_FREQ:
786 mutex_lock(&data->mutex);
787 ret = kxcjk1013_get_odr(data, val, val2);
788 mutex_unlock(&data->mutex);
789 return ret;
790
791 default:
792 return -EINVAL;
793 }
794 }
795
796 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
797 struct iio_chan_spec const *chan, int val,
798 int val2, long mask)
799 {
800 struct kxcjk1013_data *data = iio_priv(indio_dev);
801 int ret;
802
803 switch (mask) {
804 case IIO_CHAN_INFO_SAMP_FREQ:
805 mutex_lock(&data->mutex);
806 ret = kxcjk1013_set_odr(data, val, val2);
807 mutex_unlock(&data->mutex);
808 break;
809 case IIO_CHAN_INFO_SCALE:
810 if (val)
811 return -EINVAL;
812
813 mutex_lock(&data->mutex);
814 ret = kxcjk1013_set_scale(data, val2);
815 mutex_unlock(&data->mutex);
816 break;
817 default:
818 ret = -EINVAL;
819 }
820
821 return ret;
822 }
823
824 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
825 const struct iio_chan_spec *chan,
826 enum iio_event_type type,
827 enum iio_event_direction dir,
828 enum iio_event_info info,
829 int *val, int *val2)
830 {
831 struct kxcjk1013_data *data = iio_priv(indio_dev);
832
833 *val2 = 0;
834 switch (info) {
835 case IIO_EV_INFO_VALUE:
836 *val = data->wake_thres;
837 break;
838 case IIO_EV_INFO_PERIOD:
839 *val = data->wake_dur;
840 break;
841 default:
842 return -EINVAL;
843 }
844
845 return IIO_VAL_INT;
846 }
847
848 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
849 const struct iio_chan_spec *chan,
850 enum iio_event_type type,
851 enum iio_event_direction dir,
852 enum iio_event_info info,
853 int val, int val2)
854 {
855 struct kxcjk1013_data *data = iio_priv(indio_dev);
856
857 if (data->ev_enable_state)
858 return -EBUSY;
859
860 switch (info) {
861 case IIO_EV_INFO_VALUE:
862 data->wake_thres = val;
863 break;
864 case IIO_EV_INFO_PERIOD:
865 data->wake_dur = val;
866 break;
867 default:
868 return -EINVAL;
869 }
870
871 return 0;
872 }
873
874 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
875 const struct iio_chan_spec *chan,
876 enum iio_event_type type,
877 enum iio_event_direction dir)
878 {
879 struct kxcjk1013_data *data = iio_priv(indio_dev);
880
881 return data->ev_enable_state;
882 }
883
884 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
885 const struct iio_chan_spec *chan,
886 enum iio_event_type type,
887 enum iio_event_direction dir,
888 int state)
889 {
890 struct kxcjk1013_data *data = iio_priv(indio_dev);
891 int ret;
892
893 if (state && data->ev_enable_state)
894 return 0;
895
896 mutex_lock(&data->mutex);
897
898 if (!state && data->motion_trigger_on) {
899 data->ev_enable_state = 0;
900 mutex_unlock(&data->mutex);
901 return 0;
902 }
903
904
905
906
907
908
909
910
911
912
913 ret = kxcjk1013_set_power_state(data, state);
914 if (ret < 0) {
915 mutex_unlock(&data->mutex);
916 return ret;
917 }
918
919 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
920 if (ret < 0) {
921 kxcjk1013_set_power_state(data, false);
922 data->ev_enable_state = 0;
923 mutex_unlock(&data->mutex);
924 return ret;
925 }
926
927 data->ev_enable_state = state;
928 mutex_unlock(&data->mutex);
929
930 return 0;
931 }
932
933 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
934 {
935 struct kxcjk1013_data *data = iio_priv(indio_dev);
936
937 return kxcjk1013_set_power_state(data, true);
938 }
939
940 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
941 {
942 struct kxcjk1013_data *data = iio_priv(indio_dev);
943
944 return kxcjk1013_set_power_state(data, false);
945 }
946
947 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
948 struct device_attribute *attr,
949 char *buf)
950 {
951 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
952 struct kxcjk1013_data *data = iio_priv(indio_dev);
953 const char *str;
954
955 if (data->chipset == KXTF9)
956 str = kxtf9_samp_freq_avail;
957 else
958 str = kxcjk1013_samp_freq_avail;
959
960 return sprintf(buf, "%s\n", str);
961 }
962
963 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
964 kxcjk1013_get_samp_freq_avail, NULL, 0);
965
966 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
967
968 static struct attribute *kxcjk1013_attributes[] = {
969 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
970 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
971 NULL,
972 };
973
974 static const struct attribute_group kxcjk1013_attrs_group = {
975 .attrs = kxcjk1013_attributes,
976 };
977
978 static const struct iio_event_spec kxcjk1013_event = {
979 .type = IIO_EV_TYPE_THRESH,
980 .dir = IIO_EV_DIR_EITHER,
981 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
982 BIT(IIO_EV_INFO_ENABLE) |
983 BIT(IIO_EV_INFO_PERIOD)
984 };
985
986 #define KXCJK1013_CHANNEL(_axis) { \
987 .type = IIO_ACCEL, \
988 .modified = 1, \
989 .channel2 = IIO_MOD_##_axis, \
990 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
991 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
992 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
993 .scan_index = AXIS_##_axis, \
994 .scan_type = { \
995 .sign = 's', \
996 .realbits = 12, \
997 .storagebits = 16, \
998 .shift = 4, \
999 .endianness = IIO_LE, \
1000 }, \
1001 .event_spec = &kxcjk1013_event, \
1002 .num_event_specs = 1 \
1003 }
1004
1005 static const struct iio_chan_spec kxcjk1013_channels[] = {
1006 KXCJK1013_CHANNEL(X),
1007 KXCJK1013_CHANNEL(Y),
1008 KXCJK1013_CHANNEL(Z),
1009 IIO_CHAN_SOFT_TIMESTAMP(3),
1010 };
1011
1012 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
1013 .preenable = kxcjk1013_buffer_preenable,
1014 .postenable = iio_triggered_buffer_postenable,
1015 .postdisable = kxcjk1013_buffer_postdisable,
1016 .predisable = iio_triggered_buffer_predisable,
1017 };
1018
1019 static const struct iio_info kxcjk1013_info = {
1020 .attrs = &kxcjk1013_attrs_group,
1021 .read_raw = kxcjk1013_read_raw,
1022 .write_raw = kxcjk1013_write_raw,
1023 .read_event_value = kxcjk1013_read_event,
1024 .write_event_value = kxcjk1013_write_event,
1025 .write_event_config = kxcjk1013_write_event_config,
1026 .read_event_config = kxcjk1013_read_event_config,
1027 };
1028
1029 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
1030
1031 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
1032 {
1033 struct iio_poll_func *pf = p;
1034 struct iio_dev *indio_dev = pf->indio_dev;
1035 struct kxcjk1013_data *data = iio_priv(indio_dev);
1036 int ret;
1037
1038 mutex_lock(&data->mutex);
1039 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
1040 KXCJK1013_REG_XOUT_L,
1041 AXIS_MAX * 2,
1042 (u8 *)data->buffer);
1043 mutex_unlock(&data->mutex);
1044 if (ret < 0)
1045 goto err;
1046
1047 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
1048 data->timestamp);
1049 err:
1050 iio_trigger_notify_done(indio_dev->trig);
1051
1052 return IRQ_HANDLED;
1053 }
1054
1055 static int kxcjk1013_trig_try_reen(struct iio_trigger *trig)
1056 {
1057 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1058 struct kxcjk1013_data *data = iio_priv(indio_dev);
1059 int ret;
1060
1061 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1062 if (ret < 0) {
1063 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1064 return ret;
1065 }
1066
1067 return 0;
1068 }
1069
1070 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
1071 bool state)
1072 {
1073 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1074 struct kxcjk1013_data *data = iio_priv(indio_dev);
1075 int ret;
1076
1077 mutex_lock(&data->mutex);
1078
1079 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1080 data->motion_trigger_on = false;
1081 mutex_unlock(&data->mutex);
1082 return 0;
1083 }
1084
1085 ret = kxcjk1013_set_power_state(data, state);
1086 if (ret < 0) {
1087 mutex_unlock(&data->mutex);
1088 return ret;
1089 }
1090 if (data->motion_trig == trig)
1091 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1092 else
1093 ret = kxcjk1013_setup_new_data_interrupt(data, state);
1094 if (ret < 0) {
1095 kxcjk1013_set_power_state(data, false);
1096 mutex_unlock(&data->mutex);
1097 return ret;
1098 }
1099 if (data->motion_trig == trig)
1100 data->motion_trigger_on = state;
1101 else
1102 data->dready_trigger_on = state;
1103
1104 mutex_unlock(&data->mutex);
1105
1106 return 0;
1107 }
1108
1109 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1110 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1111 .try_reenable = kxcjk1013_trig_try_reen,
1112 };
1113
1114 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
1115 {
1116 struct kxcjk1013_data *data = iio_priv(indio_dev);
1117
1118 int ret = i2c_smbus_read_byte_data(data->client,
1119 KXCJK1013_REG_INT_SRC2);
1120 if (ret < 0) {
1121 dev_err(&data->client->dev, "Error reading reg_int_src2\n");
1122 return;
1123 }
1124
1125 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1126 iio_push_event(indio_dev,
1127 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1128 0,
1129 IIO_MOD_X,
1130 IIO_EV_TYPE_THRESH,
1131 IIO_EV_DIR_FALLING),
1132 data->timestamp);
1133
1134 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1135 iio_push_event(indio_dev,
1136 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1137 0,
1138 IIO_MOD_X,
1139 IIO_EV_TYPE_THRESH,
1140 IIO_EV_DIR_RISING),
1141 data->timestamp);
1142
1143 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1144 iio_push_event(indio_dev,
1145 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1146 0,
1147 IIO_MOD_Y,
1148 IIO_EV_TYPE_THRESH,
1149 IIO_EV_DIR_FALLING),
1150 data->timestamp);
1151
1152 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1153 iio_push_event(indio_dev,
1154 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1155 0,
1156 IIO_MOD_Y,
1157 IIO_EV_TYPE_THRESH,
1158 IIO_EV_DIR_RISING),
1159 data->timestamp);
1160
1161 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1162 iio_push_event(indio_dev,
1163 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1164 0,
1165 IIO_MOD_Z,
1166 IIO_EV_TYPE_THRESH,
1167 IIO_EV_DIR_FALLING),
1168 data->timestamp);
1169
1170 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1171 iio_push_event(indio_dev,
1172 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1173 0,
1174 IIO_MOD_Z,
1175 IIO_EV_TYPE_THRESH,
1176 IIO_EV_DIR_RISING),
1177 data->timestamp);
1178 }
1179
1180 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1181 {
1182 struct iio_dev *indio_dev = private;
1183 struct kxcjk1013_data *data = iio_priv(indio_dev);
1184 int ret;
1185
1186 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
1187 if (ret < 0) {
1188 dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1189 goto ack_intr;
1190 }
1191
1192 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
1193 if (data->chipset == KXTF9)
1194 iio_push_event(indio_dev,
1195 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1196 0,
1197 IIO_MOD_X_AND_Y_AND_Z,
1198 IIO_EV_TYPE_THRESH,
1199 IIO_EV_DIR_RISING),
1200 data->timestamp);
1201 else
1202 kxcjk1013_report_motion_event(indio_dev);
1203 }
1204
1205 ack_intr:
1206 if (data->dready_trigger_on)
1207 return IRQ_HANDLED;
1208
1209 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1210 if (ret < 0)
1211 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1212
1213 return IRQ_HANDLED;
1214 }
1215
1216 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1217 {
1218 struct iio_dev *indio_dev = private;
1219 struct kxcjk1013_data *data = iio_priv(indio_dev);
1220
1221 data->timestamp = iio_get_time_ns(indio_dev);
1222
1223 if (data->dready_trigger_on)
1224 iio_trigger_poll(data->dready_trig);
1225 else if (data->motion_trigger_on)
1226 iio_trigger_poll(data->motion_trig);
1227
1228 if (data->ev_enable_state)
1229 return IRQ_WAKE_THREAD;
1230 else
1231 return IRQ_HANDLED;
1232 }
1233
1234 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1235 enum kx_chipset *chipset,
1236 bool *is_smo8500_device)
1237 {
1238 const struct acpi_device_id *id;
1239
1240 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1241 if (!id)
1242 return NULL;
1243
1244 if (strcmp(id->id, "SMO8500") == 0)
1245 *is_smo8500_device = true;
1246
1247 *chipset = (enum kx_chipset)id->driver_data;
1248
1249 return dev_name(dev);
1250 }
1251
1252 static int kxcjk1013_probe(struct i2c_client *client,
1253 const struct i2c_device_id *id)
1254 {
1255 struct kxcjk1013_data *data;
1256 struct iio_dev *indio_dev;
1257 struct kxcjk_1013_platform_data *pdata;
1258 const char *name;
1259 int ret;
1260
1261 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1262 if (!indio_dev)
1263 return -ENOMEM;
1264
1265 data = iio_priv(indio_dev);
1266 i2c_set_clientdata(client, indio_dev);
1267 data->client = client;
1268
1269 pdata = dev_get_platdata(&client->dev);
1270 if (pdata)
1271 data->active_high_intr = pdata->active_high_intr;
1272 else
1273 data->active_high_intr = true;
1274
1275 if (id) {
1276 data->chipset = (enum kx_chipset)(id->driver_data);
1277 name = id->name;
1278 } else if (ACPI_HANDLE(&client->dev)) {
1279 name = kxcjk1013_match_acpi_device(&client->dev,
1280 &data->chipset,
1281 &data->is_smo8500_device);
1282 } else
1283 return -ENODEV;
1284
1285 ret = kxcjk1013_chip_init(data);
1286 if (ret < 0)
1287 return ret;
1288
1289 mutex_init(&data->mutex);
1290
1291 indio_dev->dev.parent = &client->dev;
1292 indio_dev->channels = kxcjk1013_channels;
1293 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1294 indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1295 indio_dev->name = name;
1296 indio_dev->modes = INDIO_DIRECT_MODE;
1297 indio_dev->info = &kxcjk1013_info;
1298
1299 if (client->irq > 0 && !data->is_smo8500_device) {
1300 ret = devm_request_threaded_irq(&client->dev, client->irq,
1301 kxcjk1013_data_rdy_trig_poll,
1302 kxcjk1013_event_handler,
1303 IRQF_TRIGGER_RISING,
1304 KXCJK1013_IRQ_NAME,
1305 indio_dev);
1306 if (ret)
1307 goto err_poweroff;
1308
1309 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1310 "%s-dev%d",
1311 indio_dev->name,
1312 indio_dev->id);
1313 if (!data->dready_trig) {
1314 ret = -ENOMEM;
1315 goto err_poweroff;
1316 }
1317
1318 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1319 "%s-any-motion-dev%d",
1320 indio_dev->name,
1321 indio_dev->id);
1322 if (!data->motion_trig) {
1323 ret = -ENOMEM;
1324 goto err_poweroff;
1325 }
1326
1327 data->dready_trig->dev.parent = &client->dev;
1328 data->dready_trig->ops = &kxcjk1013_trigger_ops;
1329 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1330 indio_dev->trig = data->dready_trig;
1331 iio_trigger_get(indio_dev->trig);
1332 ret = iio_trigger_register(data->dready_trig);
1333 if (ret)
1334 goto err_poweroff;
1335
1336 data->motion_trig->dev.parent = &client->dev;
1337 data->motion_trig->ops = &kxcjk1013_trigger_ops;
1338 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1339 ret = iio_trigger_register(data->motion_trig);
1340 if (ret) {
1341 data->motion_trig = NULL;
1342 goto err_trigger_unregister;
1343 }
1344 }
1345
1346 ret = iio_triggered_buffer_setup(indio_dev,
1347 &iio_pollfunc_store_time,
1348 kxcjk1013_trigger_handler,
1349 &kxcjk1013_buffer_setup_ops);
1350 if (ret < 0) {
1351 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1352 goto err_trigger_unregister;
1353 }
1354
1355 ret = pm_runtime_set_active(&client->dev);
1356 if (ret)
1357 goto err_buffer_cleanup;
1358
1359 pm_runtime_enable(&client->dev);
1360 pm_runtime_set_autosuspend_delay(&client->dev,
1361 KXCJK1013_SLEEP_DELAY_MS);
1362 pm_runtime_use_autosuspend(&client->dev);
1363
1364 ret = iio_device_register(indio_dev);
1365 if (ret < 0) {
1366 dev_err(&client->dev, "unable to register iio device\n");
1367 goto err_buffer_cleanup;
1368 }
1369
1370 return 0;
1371
1372 err_buffer_cleanup:
1373 if (data->dready_trig)
1374 iio_triggered_buffer_cleanup(indio_dev);
1375 err_trigger_unregister:
1376 if (data->dready_trig)
1377 iio_trigger_unregister(data->dready_trig);
1378 if (data->motion_trig)
1379 iio_trigger_unregister(data->motion_trig);
1380 err_poweroff:
1381 kxcjk1013_set_mode(data, STANDBY);
1382
1383 return ret;
1384 }
1385
1386 static int kxcjk1013_remove(struct i2c_client *client)
1387 {
1388 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1389 struct kxcjk1013_data *data = iio_priv(indio_dev);
1390
1391 iio_device_unregister(indio_dev);
1392
1393 pm_runtime_disable(&client->dev);
1394 pm_runtime_set_suspended(&client->dev);
1395 pm_runtime_put_noidle(&client->dev);
1396
1397 if (data->dready_trig) {
1398 iio_triggered_buffer_cleanup(indio_dev);
1399 iio_trigger_unregister(data->dready_trig);
1400 iio_trigger_unregister(data->motion_trig);
1401 }
1402
1403 mutex_lock(&data->mutex);
1404 kxcjk1013_set_mode(data, STANDBY);
1405 mutex_unlock(&data->mutex);
1406
1407 return 0;
1408 }
1409
1410 #ifdef CONFIG_PM_SLEEP
1411 static int kxcjk1013_suspend(struct device *dev)
1412 {
1413 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1414 struct kxcjk1013_data *data = iio_priv(indio_dev);
1415 int ret;
1416
1417 mutex_lock(&data->mutex);
1418 ret = kxcjk1013_set_mode(data, STANDBY);
1419 mutex_unlock(&data->mutex);
1420
1421 return ret;
1422 }
1423
1424 static int kxcjk1013_resume(struct device *dev)
1425 {
1426 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1427 struct kxcjk1013_data *data = iio_priv(indio_dev);
1428 int ret = 0;
1429
1430 mutex_lock(&data->mutex);
1431 ret = kxcjk1013_set_mode(data, OPERATION);
1432 if (ret == 0)
1433 ret = kxcjk1013_set_range(data, data->range);
1434 mutex_unlock(&data->mutex);
1435
1436 return ret;
1437 }
1438 #endif
1439
1440 #ifdef CONFIG_PM
1441 static int kxcjk1013_runtime_suspend(struct device *dev)
1442 {
1443 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1444 struct kxcjk1013_data *data = iio_priv(indio_dev);
1445 int ret;
1446
1447 ret = kxcjk1013_set_mode(data, STANDBY);
1448 if (ret < 0) {
1449 dev_err(&data->client->dev, "powering off device failed\n");
1450 return -EAGAIN;
1451 }
1452 return 0;
1453 }
1454
1455 static int kxcjk1013_runtime_resume(struct device *dev)
1456 {
1457 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1458 struct kxcjk1013_data *data = iio_priv(indio_dev);
1459 int ret;
1460 int sleep_val;
1461
1462 ret = kxcjk1013_set_mode(data, OPERATION);
1463 if (ret < 0)
1464 return ret;
1465
1466 sleep_val = kxcjk1013_get_startup_times(data);
1467 if (sleep_val < 20000)
1468 usleep_range(sleep_val, 20000);
1469 else
1470 msleep_interruptible(sleep_val/1000);
1471
1472 return 0;
1473 }
1474 #endif
1475
1476 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1477 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1478 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1479 kxcjk1013_runtime_resume, NULL)
1480 };
1481
1482 static const struct acpi_device_id kx_acpi_match[] = {
1483 {"KXCJ1013", KXCJK1013},
1484 {"KXCJ1008", KXCJ91008},
1485 {"KXCJ9000", KXCJ91008},
1486 {"KIOX0008", KXCJ91008},
1487 {"KIOX0009", KXTJ21009},
1488 {"KIOX000A", KXCJ91008},
1489 {"KIOX010A", KXCJ91008},
1490 {"KIOX020A", KXCJ91008},
1491 {"KXTJ1009", KXTJ21009},
1492 {"KXJ2109", KXTJ21009},
1493 {"SMO8500", KXCJ91008},
1494 { },
1495 };
1496 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1497
1498 static const struct i2c_device_id kxcjk1013_id[] = {
1499 {"kxcjk1013", KXCJK1013},
1500 {"kxcj91008", KXCJ91008},
1501 {"kxtj21009", KXTJ21009},
1502 {"kxtf9", KXTF9},
1503 {"SMO8500", KXCJ91008},
1504 {}
1505 };
1506
1507 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1508
1509 static const struct of_device_id kxcjk1013_of_match[] = {
1510 { .compatible = "kionix,kxcjk1013", },
1511 { .compatible = "kionix,kxcj91008", },
1512 { .compatible = "kionix,kxtj21009", },
1513 { .compatible = "kionix,kxtf9", },
1514 { }
1515 };
1516 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
1517
1518 static struct i2c_driver kxcjk1013_driver = {
1519 .driver = {
1520 .name = KXCJK1013_DRV_NAME,
1521 .acpi_match_table = ACPI_PTR(kx_acpi_match),
1522 .of_match_table = kxcjk1013_of_match,
1523 .pm = &kxcjk1013_pm_ops,
1524 },
1525 .probe = kxcjk1013_probe,
1526 .remove = kxcjk1013_remove,
1527 .id_table = kxcjk1013_id,
1528 };
1529 module_i2c_driver(kxcjk1013_driver);
1530
1531 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1532 MODULE_LICENSE("GPL v2");
1533 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");