This source file includes following definitions.
- afe440x_show_register
- afe440x_store_register
- afe4404_read_raw
- afe4404_write_raw
- afe4404_trigger_handler
- afe4404_suspend
- afe4404_resume
- afe4404_probe
- afe4404_remove
1
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8
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/i2c.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/regmap.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/trigger.h>
23 #include <linux/iio/triggered_buffer.h>
24 #include <linux/iio/trigger_consumer.h>
25
26 #include "afe440x.h"
27
28 #define AFE4404_DRIVER_NAME "afe4404"
29
30
31 #define AFE4404_TIA_GAIN_SEP 0x20
32 #define AFE4404_TIA_GAIN 0x21
33 #define AFE4404_PROG_TG_STC 0x34
34 #define AFE4404_PROG_TG_ENDC 0x35
35 #define AFE4404_LED3LEDSTC 0x36
36 #define AFE4404_LED3LEDENDC 0x37
37 #define AFE4404_CLKDIV_PRF 0x39
38 #define AFE4404_OFFDAC 0x3a
39 #define AFE4404_DEC 0x3d
40 #define AFE4404_AVG_LED2_ALED2VAL 0x3f
41 #define AFE4404_AVG_LED1_ALED1VAL 0x40
42
43
44 #define AFE440X_CONTROL2_OSC_ENABLE BIT(9)
45
46 enum afe4404_fields {
47
48 F_TIA_GAIN_SEP, F_TIA_CF_SEP,
49 F_TIA_GAIN, TIA_CF,
50
51
52 F_ILED1, F_ILED2, F_ILED3,
53
54
55 F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2,
56
57
58 F_MAX_FIELDS
59 };
60
61 static const struct reg_field afe4404_reg_fields[] = {
62
63 [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2),
64 [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5),
65 [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2),
66 [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5),
67
68 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5),
69 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11),
70 [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17),
71
72 [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4),
73 [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9),
74 [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14),
75 [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19),
76 };
77
78
79
80
81
82
83
84
85
86
87 struct afe4404_data {
88 struct device *dev;
89 struct regmap *regmap;
90 struct regmap_field *fields[F_MAX_FIELDS];
91 struct regulator *regulator;
92 struct iio_trigger *trig;
93 int irq;
94 };
95
96 enum afe4404_chan_id {
97 LED2 = 1,
98 ALED2,
99 LED1,
100 ALED1,
101 LED2_ALED2,
102 LED1_ALED1,
103 };
104
105 static const unsigned int afe4404_channel_values[] = {
106 [LED2] = AFE440X_LED2VAL,
107 [ALED2] = AFE440X_ALED2VAL,
108 [LED1] = AFE440X_LED1VAL,
109 [ALED1] = AFE440X_ALED1VAL,
110 [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
111 [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
112 };
113
114 static const unsigned int afe4404_channel_leds[] = {
115 [LED2] = F_ILED2,
116 [ALED2] = F_ILED3,
117 [LED1] = F_ILED1,
118 };
119
120 static const unsigned int afe4404_channel_offdacs[] = {
121 [LED2] = F_OFFDAC_LED2,
122 [ALED2] = F_OFFDAC_AMB2,
123 [LED1] = F_OFFDAC_LED1,
124 [ALED1] = F_OFFDAC_AMB1,
125 };
126
127 static const struct iio_chan_spec afe4404_channels[] = {
128
129 AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)),
130 AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)),
131 AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)),
132 AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)),
133 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
134 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
135
136 AFE440X_CURRENT_CHAN(LED2),
137 AFE440X_CURRENT_CHAN(ALED2),
138 AFE440X_CURRENT_CHAN(LED1),
139 };
140
141 static const struct afe440x_val_table afe4404_res_table[] = {
142 { .integer = 500000, .fract = 0 },
143 { .integer = 250000, .fract = 0 },
144 { .integer = 100000, .fract = 0 },
145 { .integer = 50000, .fract = 0 },
146 { .integer = 25000, .fract = 0 },
147 { .integer = 10000, .fract = 0 },
148 { .integer = 1000000, .fract = 0 },
149 { .integer = 2000000, .fract = 0 },
150 };
151 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table);
152
153 static const struct afe440x_val_table afe4404_cap_table[] = {
154 { .integer = 0, .fract = 5000 },
155 { .integer = 0, .fract = 2500 },
156 { .integer = 0, .fract = 10000 },
157 { .integer = 0, .fract = 7500 },
158 { .integer = 0, .fract = 20000 },
159 { .integer = 0, .fract = 17500 },
160 { .integer = 0, .fract = 25000 },
161 { .integer = 0, .fract = 22500 },
162 };
163 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table);
164
165 static ssize_t afe440x_show_register(struct device *dev,
166 struct device_attribute *attr,
167 char *buf)
168 {
169 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
170 struct afe4404_data *afe = iio_priv(indio_dev);
171 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
172 unsigned int reg_val;
173 int vals[2];
174 int ret;
175
176 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val);
177 if (ret)
178 return ret;
179
180 if (reg_val >= afe440x_attr->table_size)
181 return -EINVAL;
182
183 vals[0] = afe440x_attr->val_table[reg_val].integer;
184 vals[1] = afe440x_attr->val_table[reg_val].fract;
185
186 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
187 }
188
189 static ssize_t afe440x_store_register(struct device *dev,
190 struct device_attribute *attr,
191 const char *buf, size_t count)
192 {
193 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
194 struct afe4404_data *afe = iio_priv(indio_dev);
195 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
196 int val, integer, fract, ret;
197
198 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
199 if (ret)
200 return ret;
201
202 for (val = 0; val < afe440x_attr->table_size; val++)
203 if (afe440x_attr->val_table[val].integer == integer &&
204 afe440x_attr->val_table[val].fract == fract)
205 break;
206 if (val == afe440x_attr->table_size)
207 return -EINVAL;
208
209 ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
210 if (ret)
211 return ret;
212
213 return count;
214 }
215
216 static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
217 static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
218
219 static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
220 static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
221
222 static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table);
223 static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table);
224
225 static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table);
226 static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table);
227
228 static struct attribute *afe440x_attributes[] = {
229 &dev_attr_in_intensity_resistance_available.attr,
230 &dev_attr_in_intensity_capacitance_available.attr,
231 &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
232 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
233 &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
234 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
235 &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
236 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
237 &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
238 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
239 NULL
240 };
241
242 static const struct attribute_group afe440x_attribute_group = {
243 .attrs = afe440x_attributes
244 };
245
246 static int afe4404_read_raw(struct iio_dev *indio_dev,
247 struct iio_chan_spec const *chan,
248 int *val, int *val2, long mask)
249 {
250 struct afe4404_data *afe = iio_priv(indio_dev);
251 unsigned int value_reg = afe4404_channel_values[chan->address];
252 unsigned int led_field = afe4404_channel_leds[chan->address];
253 unsigned int offdac_field = afe4404_channel_offdacs[chan->address];
254 int ret;
255
256 switch (chan->type) {
257 case IIO_INTENSITY:
258 switch (mask) {
259 case IIO_CHAN_INFO_RAW:
260 ret = regmap_read(afe->regmap, value_reg, val);
261 if (ret)
262 return ret;
263 return IIO_VAL_INT;
264 case IIO_CHAN_INFO_OFFSET:
265 ret = regmap_field_read(afe->fields[offdac_field], val);
266 if (ret)
267 return ret;
268 return IIO_VAL_INT;
269 }
270 break;
271 case IIO_CURRENT:
272 switch (mask) {
273 case IIO_CHAN_INFO_RAW:
274 ret = regmap_field_read(afe->fields[led_field], val);
275 if (ret)
276 return ret;
277 return IIO_VAL_INT;
278 case IIO_CHAN_INFO_SCALE:
279 *val = 0;
280 *val2 = 800000;
281 return IIO_VAL_INT_PLUS_MICRO;
282 }
283 break;
284 default:
285 break;
286 }
287
288 return -EINVAL;
289 }
290
291 static int afe4404_write_raw(struct iio_dev *indio_dev,
292 struct iio_chan_spec const *chan,
293 int val, int val2, long mask)
294 {
295 struct afe4404_data *afe = iio_priv(indio_dev);
296 unsigned int led_field = afe4404_channel_leds[chan->address];
297 unsigned int offdac_field = afe4404_channel_offdacs[chan->address];
298
299 switch (chan->type) {
300 case IIO_INTENSITY:
301 switch (mask) {
302 case IIO_CHAN_INFO_OFFSET:
303 return regmap_field_write(afe->fields[offdac_field], val);
304 }
305 break;
306 case IIO_CURRENT:
307 switch (mask) {
308 case IIO_CHAN_INFO_RAW:
309 return regmap_field_write(afe->fields[led_field], val);
310 }
311 break;
312 default:
313 break;
314 }
315
316 return -EINVAL;
317 }
318
319 static const struct iio_info afe4404_iio_info = {
320 .attrs = &afe440x_attribute_group,
321 .read_raw = afe4404_read_raw,
322 .write_raw = afe4404_write_raw,
323 };
324
325 static irqreturn_t afe4404_trigger_handler(int irq, void *private)
326 {
327 struct iio_poll_func *pf = private;
328 struct iio_dev *indio_dev = pf->indio_dev;
329 struct afe4404_data *afe = iio_priv(indio_dev);
330 int ret, bit, i = 0;
331 s32 buffer[10];
332
333 for_each_set_bit(bit, indio_dev->active_scan_mask,
334 indio_dev->masklength) {
335 ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
336 &buffer[i++]);
337 if (ret)
338 goto err;
339 }
340
341 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);
342 err:
343 iio_trigger_notify_done(indio_dev->trig);
344
345 return IRQ_HANDLED;
346 }
347
348 static const struct iio_trigger_ops afe4404_trigger_ops = {
349 };
350
351
352 #define AFE4404_TIMING_PAIRS \
353 { AFE440X_PRPCOUNT, 39999 }, \
354 { AFE440X_LED2LEDSTC, 0 }, \
355 { AFE440X_LED2LEDENDC, 398 }, \
356 { AFE440X_LED2STC, 80 }, \
357 { AFE440X_LED2ENDC, 398 }, \
358 { AFE440X_ADCRSTSTCT0, 5600 }, \
359 { AFE440X_ADCRSTENDCT0, 5606 }, \
360 { AFE440X_LED2CONVST, 5607 }, \
361 { AFE440X_LED2CONVEND, 6066 }, \
362 { AFE4404_LED3LEDSTC, 400 }, \
363 { AFE4404_LED3LEDENDC, 798 }, \
364 { AFE440X_ALED2STC, 480 }, \
365 { AFE440X_ALED2ENDC, 798 }, \
366 { AFE440X_ADCRSTSTCT1, 6068 }, \
367 { AFE440X_ADCRSTENDCT1, 6074 }, \
368 { AFE440X_ALED2CONVST, 6075 }, \
369 { AFE440X_ALED2CONVEND, 6534 }, \
370 { AFE440X_LED1LEDSTC, 800 }, \
371 { AFE440X_LED1LEDENDC, 1198 }, \
372 { AFE440X_LED1STC, 880 }, \
373 { AFE440X_LED1ENDC, 1198 }, \
374 { AFE440X_ADCRSTSTCT2, 6536 }, \
375 { AFE440X_ADCRSTENDCT2, 6542 }, \
376 { AFE440X_LED1CONVST, 6543 }, \
377 { AFE440X_LED1CONVEND, 7003 }, \
378 { AFE440X_ALED1STC, 1280 }, \
379 { AFE440X_ALED1ENDC, 1598 }, \
380 { AFE440X_ADCRSTSTCT3, 7005 }, \
381 { AFE440X_ADCRSTENDCT3, 7011 }, \
382 { AFE440X_ALED1CONVST, 7012 }, \
383 { AFE440X_ALED1CONVEND, 7471 }, \
384 { AFE440X_PDNCYCLESTC, 7671 }, \
385 { AFE440X_PDNCYCLEENDC, 39199 }
386
387 static const struct reg_sequence afe4404_reg_sequences[] = {
388 AFE4404_TIMING_PAIRS,
389 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
390 { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN },
391 { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE },
392 };
393
394 static const struct regmap_range afe4404_yes_ranges[] = {
395 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
396 regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL),
397 };
398
399 static const struct regmap_access_table afe4404_volatile_table = {
400 .yes_ranges = afe4404_yes_ranges,
401 .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges),
402 };
403
404 static const struct regmap_config afe4404_regmap_config = {
405 .reg_bits = 8,
406 .val_bits = 24,
407
408 .max_register = AFE4404_AVG_LED1_ALED1VAL,
409 .cache_type = REGCACHE_RBTREE,
410 .volatile_table = &afe4404_volatile_table,
411 };
412
413 static const struct of_device_id afe4404_of_match[] = {
414 { .compatible = "ti,afe4404", },
415 { }
416 };
417 MODULE_DEVICE_TABLE(of, afe4404_of_match);
418
419 static int __maybe_unused afe4404_suspend(struct device *dev)
420 {
421 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
422 struct afe4404_data *afe = iio_priv(indio_dev);
423 int ret;
424
425 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
426 AFE440X_CONTROL2_PDN_AFE,
427 AFE440X_CONTROL2_PDN_AFE);
428 if (ret)
429 return ret;
430
431 ret = regulator_disable(afe->regulator);
432 if (ret) {
433 dev_err(dev, "Unable to disable regulator\n");
434 return ret;
435 }
436
437 return 0;
438 }
439
440 static int __maybe_unused afe4404_resume(struct device *dev)
441 {
442 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
443 struct afe4404_data *afe = iio_priv(indio_dev);
444 int ret;
445
446 ret = regulator_enable(afe->regulator);
447 if (ret) {
448 dev_err(dev, "Unable to enable regulator\n");
449 return ret;
450 }
451
452 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
453 AFE440X_CONTROL2_PDN_AFE, 0);
454 if (ret)
455 return ret;
456
457 return 0;
458 }
459
460 static SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend, afe4404_resume);
461
462 static int afe4404_probe(struct i2c_client *client,
463 const struct i2c_device_id *id)
464 {
465 struct iio_dev *indio_dev;
466 struct afe4404_data *afe;
467 int i, ret;
468
469 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe));
470 if (!indio_dev)
471 return -ENOMEM;
472
473 afe = iio_priv(indio_dev);
474 i2c_set_clientdata(client, indio_dev);
475
476 afe->dev = &client->dev;
477 afe->irq = client->irq;
478
479 afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config);
480 if (IS_ERR(afe->regmap)) {
481 dev_err(afe->dev, "Unable to allocate register map\n");
482 return PTR_ERR(afe->regmap);
483 }
484
485 for (i = 0; i < F_MAX_FIELDS; i++) {
486 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
487 afe4404_reg_fields[i]);
488 if (IS_ERR(afe->fields[i])) {
489 dev_err(afe->dev, "Unable to allocate regmap fields\n");
490 return PTR_ERR(afe->fields[i]);
491 }
492 }
493
494 afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
495 if (IS_ERR(afe->regulator)) {
496 dev_err(afe->dev, "Unable to get regulator\n");
497 return PTR_ERR(afe->regulator);
498 }
499 ret = regulator_enable(afe->regulator);
500 if (ret) {
501 dev_err(afe->dev, "Unable to enable regulator\n");
502 return ret;
503 }
504
505 ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
506 AFE440X_CONTROL0_SW_RESET);
507 if (ret) {
508 dev_err(afe->dev, "Unable to reset device\n");
509 goto disable_reg;
510 }
511
512 ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences,
513 ARRAY_SIZE(afe4404_reg_sequences));
514 if (ret) {
515 dev_err(afe->dev, "Unable to set register defaults\n");
516 goto disable_reg;
517 }
518
519 indio_dev->modes = INDIO_DIRECT_MODE;
520 indio_dev->dev.parent = afe->dev;
521 indio_dev->channels = afe4404_channels;
522 indio_dev->num_channels = ARRAY_SIZE(afe4404_channels);
523 indio_dev->name = AFE4404_DRIVER_NAME;
524 indio_dev->info = &afe4404_iio_info;
525
526 if (afe->irq > 0) {
527 afe->trig = devm_iio_trigger_alloc(afe->dev,
528 "%s-dev%d",
529 indio_dev->name,
530 indio_dev->id);
531 if (!afe->trig) {
532 dev_err(afe->dev, "Unable to allocate IIO trigger\n");
533 ret = -ENOMEM;
534 goto disable_reg;
535 }
536
537 iio_trigger_set_drvdata(afe->trig, indio_dev);
538
539 afe->trig->ops = &afe4404_trigger_ops;
540 afe->trig->dev.parent = afe->dev;
541
542 ret = iio_trigger_register(afe->trig);
543 if (ret) {
544 dev_err(afe->dev, "Unable to register IIO trigger\n");
545 goto disable_reg;
546 }
547
548 ret = devm_request_threaded_irq(afe->dev, afe->irq,
549 iio_trigger_generic_data_rdy_poll,
550 NULL, IRQF_ONESHOT,
551 AFE4404_DRIVER_NAME,
552 afe->trig);
553 if (ret) {
554 dev_err(afe->dev, "Unable to request IRQ\n");
555 goto disable_reg;
556 }
557 }
558
559 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
560 afe4404_trigger_handler, NULL);
561 if (ret) {
562 dev_err(afe->dev, "Unable to setup buffer\n");
563 goto unregister_trigger;
564 }
565
566 ret = iio_device_register(indio_dev);
567 if (ret) {
568 dev_err(afe->dev, "Unable to register IIO device\n");
569 goto unregister_triggered_buffer;
570 }
571
572 return 0;
573
574 unregister_triggered_buffer:
575 iio_triggered_buffer_cleanup(indio_dev);
576 unregister_trigger:
577 if (afe->irq > 0)
578 iio_trigger_unregister(afe->trig);
579 disable_reg:
580 regulator_disable(afe->regulator);
581
582 return ret;
583 }
584
585 static int afe4404_remove(struct i2c_client *client)
586 {
587 struct iio_dev *indio_dev = i2c_get_clientdata(client);
588 struct afe4404_data *afe = iio_priv(indio_dev);
589 int ret;
590
591 iio_device_unregister(indio_dev);
592
593 iio_triggered_buffer_cleanup(indio_dev);
594
595 if (afe->irq > 0)
596 iio_trigger_unregister(afe->trig);
597
598 ret = regulator_disable(afe->regulator);
599 if (ret) {
600 dev_err(afe->dev, "Unable to disable regulator\n");
601 return ret;
602 }
603
604 return 0;
605 }
606
607 static const struct i2c_device_id afe4404_ids[] = {
608 { "afe4404", 0 },
609 { }
610 };
611 MODULE_DEVICE_TABLE(i2c, afe4404_ids);
612
613 static struct i2c_driver afe4404_i2c_driver = {
614 .driver = {
615 .name = AFE4404_DRIVER_NAME,
616 .of_match_table = afe4404_of_match,
617 .pm = &afe4404_pm_ops,
618 },
619 .probe = afe4404_probe,
620 .remove = afe4404_remove,
621 .id_table = afe4404_ids,
622 };
623 module_i2c_driver(afe4404_i2c_driver);
624
625 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
626 MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE");
627 MODULE_LICENSE("GPL v2");