drivers/usb/dwc2/platform.c

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
dwc2_get_dr_mode
__dwc2_lowlevel_hw_enable
dwc2_lowlevel_hw_enable
__dwc2_lowlevel_hw_disable
dwc2_lowlevel_hw_disable
dwc2_lowlevel_hw_init
dwc2_driver_remove
dwc2_driver_shutdown
dwc2_check_core_endianness
dwc2_driver_probe
dwc2_suspend
dwc2_resume
   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * platform.c - DesignWare HS OTG Controller platform driver
   4  *
   5  * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. The names of the above-listed copyright holders may not be used
  17  *    to endorse or promote products derived from this software without
  18  *    specific prior written permission.
  19  *
  20  * ALTERNATIVELY, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") as published by the Free Software
  22  * Foundation; either version 2 of the License, or (at your option) any
  23  * later version.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  26  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  27  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  29  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  30  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  31  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  32  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  33  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  34  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  35  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37 
  38 #include <linux/kernel.h>
  39 #include <linux/module.h>
  40 #include <linux/slab.h>
  41 #include <linux/clk.h>
  42 #include <linux/device.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/of_device.h>
  45 #include <linux/mutex.h>
  46 #include <linux/platform_device.h>
  47 #include <linux/phy/phy.h>
  48 #include <linux/platform_data/s3c-hsotg.h>
  49 #include <linux/reset.h>
  50 
  51 #include <linux/usb/of.h>
  52 
  53 #include "core.h"
  54 #include "hcd.h"
  55 #include "debug.h"
  56 
  57 static const char dwc2_driver_name[] = "dwc2";
  58 
  59 /*
  60  * Check the dr_mode against the module configuration and hardware
  61  * capabilities.
  62  *
  63  * The hardware, module, and dr_mode, can each be set to host, device,
  64  * or otg. Check that all these values are compatible and adjust the
  65  * value of dr_mode if possible.
  66  *
  67  *                      actual
  68  *    HW  MOD dr_mode   dr_mode
  69  *  ------------------------------
  70  *   HST  HST  any    :  HST
  71  *   HST  DEV  any    :  ---
  72  *   HST  OTG  any    :  HST
  73  *
  74  *   DEV  HST  any    :  ---
  75  *   DEV  DEV  any    :  DEV
  76  *   DEV  OTG  any    :  DEV
  77  *
  78  *   OTG  HST  any    :  HST
  79  *   OTG  DEV  any    :  DEV
  80  *   OTG  OTG  any    :  dr_mode
  81  */
  82 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
  83 {
  84         enum usb_dr_mode mode;
  85 
  86         hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
  87         if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
  88                 hsotg->dr_mode = USB_DR_MODE_OTG;
  89 
  90         mode = hsotg->dr_mode;
  91 
  92         if (dwc2_hw_is_device(hsotg)) {
  93                 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
  94                         dev_err(hsotg->dev,
  95                                 "Controller does not support host mode.\n");
  96                         return -EINVAL;
  97                 }
  98                 mode = USB_DR_MODE_PERIPHERAL;
  99         } else if (dwc2_hw_is_host(hsotg)) {
 100                 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
 101                         dev_err(hsotg->dev,
 102                                 "Controller does not support device mode.\n");
 103                         return -EINVAL;
 104                 }
 105                 mode = USB_DR_MODE_HOST;
 106         } else {
 107                 if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
 108                         mode = USB_DR_MODE_HOST;
 109                 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
 110                         mode = USB_DR_MODE_PERIPHERAL;
 111         }
 112 
 113         if (mode != hsotg->dr_mode) {
 114                 dev_warn(hsotg->dev,
 115                          "Configuration mismatch. dr_mode forced to %s\n",
 116                         mode == USB_DR_MODE_HOST ? "host" : "device");
 117 
 118                 hsotg->dr_mode = mode;
 119         }
 120 
 121         return 0;
 122 }
 123 
 124 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
 125 {
 126         struct platform_device *pdev = to_platform_device(hsotg->dev);
 127         int ret;
 128 
 129         ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
 130                                     hsotg->supplies);
 131         if (ret)
 132                 return ret;
 133 
 134         if (hsotg->clk) {
 135                 ret = clk_prepare_enable(hsotg->clk);
 136                 if (ret)
 137                         return ret;
 138         }
 139 
 140         if (hsotg->uphy) {
 141                 ret = usb_phy_init(hsotg->uphy);
 142         } else if (hsotg->plat && hsotg->plat->phy_init) {
 143                 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
 144         } else {
 145                 ret = phy_power_on(hsotg->phy);
 146                 if (ret == 0)
 147                         ret = phy_init(hsotg->phy);
 148         }
 149 
 150         return ret;
 151 }
 152 
 153 /**
 154  * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
 155  * @hsotg: The driver state
 156  *
 157  * A wrapper for platform code responsible for controlling
 158  * low-level USB platform resources (phy, clock, regulators)
 159  */
 160 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
 161 {
 162         int ret = __dwc2_lowlevel_hw_enable(hsotg);
 163 
 164         if (ret == 0)
 165                 hsotg->ll_hw_enabled = true;
 166         return ret;
 167 }
 168 
 169 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
 170 {
 171         struct platform_device *pdev = to_platform_device(hsotg->dev);
 172         int ret = 0;
 173 
 174         if (hsotg->uphy) {
 175                 usb_phy_shutdown(hsotg->uphy);
 176         } else if (hsotg->plat && hsotg->plat->phy_exit) {
 177                 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
 178         } else {
 179                 ret = phy_exit(hsotg->phy);
 180                 if (ret == 0)
 181                         ret = phy_power_off(hsotg->phy);
 182         }
 183         if (ret)
 184                 return ret;
 185 
 186         if (hsotg->clk)
 187                 clk_disable_unprepare(hsotg->clk);
 188 
 189         ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
 190                                      hsotg->supplies);
 191 
 192         return ret;
 193 }
 194 
 195 /**
 196  * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
 197  * @hsotg: The driver state
 198  *
 199  * A wrapper for platform code responsible for controlling
 200  * low-level USB platform resources (phy, clock, regulators)
 201  */
 202 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
 203 {
 204         int ret = __dwc2_lowlevel_hw_disable(hsotg);
 205 
 206         if (ret == 0)
 207                 hsotg->ll_hw_enabled = false;
 208         return ret;
 209 }
 210 
 211 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
 212 {
 213         int i, ret;
 214 
 215         hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
 216         if (IS_ERR(hsotg->reset)) {
 217                 ret = PTR_ERR(hsotg->reset);
 218                 dev_err(hsotg->dev, "error getting reset control %d\n", ret);
 219                 return ret;
 220         }
 221 
 222         reset_control_deassert(hsotg->reset);
 223 
 224         hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc");
 225         if (IS_ERR(hsotg->reset_ecc)) {
 226                 ret = PTR_ERR(hsotg->reset_ecc);
 227                 dev_err(hsotg->dev, "error getting reset control for ecc %d\n", ret);
 228                 return ret;
 229         }
 230 
 231         reset_control_deassert(hsotg->reset_ecc);
 232 
 233         /*
 234          * Attempt to find a generic PHY, then look for an old style
 235          * USB PHY and then fall back to pdata
 236          */
 237         hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
 238         if (IS_ERR(hsotg->phy)) {
 239                 ret = PTR_ERR(hsotg->phy);
 240                 switch (ret) {
 241                 case -ENODEV:
 242                 case -ENOSYS:
 243                         hsotg->phy = NULL;
 244                         break;
 245                 case -EPROBE_DEFER:
 246                         return ret;
 247                 default:
 248                         dev_err(hsotg->dev, "error getting phy %d\n", ret);
 249                         return ret;
 250                 }
 251         }
 252 
 253         if (!hsotg->phy) {
 254                 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
 255                 if (IS_ERR(hsotg->uphy)) {
 256                         ret = PTR_ERR(hsotg->uphy);
 257                         switch (ret) {
 258                         case -ENODEV:
 259                         case -ENXIO:
 260                                 hsotg->uphy = NULL;
 261                                 break;
 262                         case -EPROBE_DEFER:
 263                                 return ret;
 264                         default:
 265                                 dev_err(hsotg->dev, "error getting usb phy %d\n",
 266                                         ret);
 267                                 return ret;
 268                         }
 269                 }
 270         }
 271 
 272         hsotg->plat = dev_get_platdata(hsotg->dev);
 273 
 274         /* Clock */
 275         hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
 276         if (IS_ERR(hsotg->clk)) {
 277                 dev_err(hsotg->dev, "cannot get otg clock\n");
 278                 return PTR_ERR(hsotg->clk);
 279         }
 280 
 281         /* Regulators */
 282         for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
 283                 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
 284 
 285         ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
 286                                       hsotg->supplies);
 287         if (ret) {
 288                 dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
 289                 return ret;
 290         }
 291         return 0;
 292 }
 293 
 294 /**
 295  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
 296  * DWC_otg driver
 297  *
 298  * @dev: Platform device
 299  *
 300  * This routine is called, for example, when the rmmod command is executed. The
 301  * device may or may not be electrically present. If it is present, the driver
 302  * stops device processing. Any resources used on behalf of this device are
 303  * freed.
 304  */
 305 static int dwc2_driver_remove(struct platform_device *dev)
 306 {
 307         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
 308 
 309         dwc2_debugfs_exit(hsotg);
 310         if (hsotg->hcd_enabled)
 311                 dwc2_hcd_remove(hsotg);
 312         if (hsotg->gadget_enabled)
 313                 dwc2_hsotg_remove(hsotg);
 314 
 315         if (hsotg->ll_hw_enabled)
 316                 dwc2_lowlevel_hw_disable(hsotg);
 317 
 318         reset_control_assert(hsotg->reset);
 319         reset_control_assert(hsotg->reset_ecc);
 320 
 321         return 0;
 322 }
 323 
 324 /**
 325  * dwc2_driver_shutdown() - Called on device shutdown
 326  *
 327  * @dev: Platform device
 328  *
 329  * In specific conditions (involving usb hubs) dwc2 devices can create a
 330  * lot of interrupts, even to the point of overwhelming devices running
 331  * at low frequencies. Some devices need to do special clock handling
 332  * at shutdown-time which may bring the system clock below the threshold
 333  * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
 334  * prevents reboots/poweroffs from getting stuck in such cases.
 335  */
 336 static void dwc2_driver_shutdown(struct platform_device *dev)
 337 {
 338         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
 339 
 340         disable_irq(hsotg->irq);
 341 }
 342 
 343 /**
 344  * dwc2_check_core_endianness() - Returns true if core and AHB have
 345  * opposite endianness.
 346  * @hsotg:      Programming view of the DWC_otg controller.
 347  */
 348 static bool dwc2_check_core_endianness(struct dwc2_hsotg *hsotg)
 349 {
 350         u32 snpsid;
 351 
 352         snpsid = ioread32(hsotg->regs + GSNPSID);
 353         if ((snpsid & GSNPSID_ID_MASK) == DWC2_OTG_ID ||
 354             (snpsid & GSNPSID_ID_MASK) == DWC2_FS_IOT_ID ||
 355             (snpsid & GSNPSID_ID_MASK) == DWC2_HS_IOT_ID)
 356                 return false;
 357         return true;
 358 }
 359 
 360 /**
 361  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
 362  * driver
 363  *
 364  * @dev: Platform device
 365  *
 366  * This routine creates the driver components required to control the device
 367  * (core, HCD, and PCD) and initializes the device. The driver components are
 368  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
 369  * in the device private data. This allows the driver to access the dwc2_hsotg
 370  * structure on subsequent calls to driver methods for this device.
 371  */
 372 static int dwc2_driver_probe(struct platform_device *dev)
 373 {
 374         struct dwc2_hsotg *hsotg;
 375         struct resource *res;
 376         int retval;
 377 
 378         hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
 379         if (!hsotg)
 380                 return -ENOMEM;
 381 
 382         hsotg->dev = &dev->dev;
 383 
 384         /*
 385          * Use reasonable defaults so platforms don't have to provide these.
 386          */
 387         if (!dev->dev.dma_mask)
 388                 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
 389         retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
 390         if (retval) {
 391                 dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval);
 392                 return retval;
 393         }
 394 
 395         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
 396         hsotg->regs = devm_ioremap_resource(&dev->dev, res);
 397         if (IS_ERR(hsotg->regs))
 398                 return PTR_ERR(hsotg->regs);
 399 
 400         dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
 401                 (unsigned long)res->start, hsotg->regs);
 402 
 403         retval = dwc2_lowlevel_hw_init(hsotg);
 404         if (retval)
 405                 return retval;
 406 
 407         spin_lock_init(&hsotg->lock);
 408 
 409         hsotg->irq = platform_get_irq(dev, 0);
 410         if (hsotg->irq < 0)
 411                 return hsotg->irq;
 412 
 413         dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
 414                 hsotg->irq);
 415         retval = devm_request_irq(hsotg->dev, hsotg->irq,
 416                                   dwc2_handle_common_intr, IRQF_SHARED,
 417                                   dev_name(hsotg->dev), hsotg);
 418         if (retval)
 419                 return retval;
 420 
 421         hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
 422         if (IS_ERR(hsotg->vbus_supply)) {
 423                 retval = PTR_ERR(hsotg->vbus_supply);
 424                 hsotg->vbus_supply = NULL;
 425                 if (retval != -ENODEV)
 426                         return retval;
 427         }
 428 
 429         retval = dwc2_lowlevel_hw_enable(hsotg);
 430         if (retval)
 431                 return retval;
 432 
 433         hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
 434 
 435         retval = dwc2_get_dr_mode(hsotg);
 436         if (retval)
 437                 goto error;
 438 
 439         hsotg->need_phy_for_wake =
 440                 of_property_read_bool(dev->dev.of_node,
 441                                       "snps,need-phy-for-wake");
 442 
 443         /*
 444          * Reset before dwc2_get_hwparams() then it could get power-on real
 445          * reset value form registers.
 446          */
 447         retval = dwc2_core_reset(hsotg, false);
 448         if (retval)
 449                 goto error;
 450 
 451         /* Detect config values from hardware */
 452         retval = dwc2_get_hwparams(hsotg);
 453         if (retval)
 454                 goto error;
 455 
 456         /*
 457          * For OTG cores, set the force mode bits to reflect the value
 458          * of dr_mode. Force mode bits should not be touched at any
 459          * other time after this.
 460          */
 461         dwc2_force_dr_mode(hsotg);
 462 
 463         retval = dwc2_init_params(hsotg);
 464         if (retval)
 465                 goto error;
 466 
 467         if (hsotg->dr_mode != USB_DR_MODE_HOST) {
 468                 retval = dwc2_gadget_init(hsotg);
 469                 if (retval)
 470                         goto error;
 471                 hsotg->gadget_enabled = 1;
 472         }
 473 
 474         /*
 475          * If we need PHY for wakeup we must be wakeup capable.
 476          * When we have a device that can wake without the PHY we
 477          * can adjust this condition.
 478          */
 479         if (hsotg->need_phy_for_wake)
 480                 device_set_wakeup_capable(&dev->dev, true);
 481 
 482         hsotg->reset_phy_on_wake =
 483                 of_property_read_bool(dev->dev.of_node,
 484                                       "snps,reset-phy-on-wake");
 485         if (hsotg->reset_phy_on_wake && !hsotg->phy) {
 486                 dev_warn(hsotg->dev,
 487                          "Quirk reset-phy-on-wake only supports generic PHYs\n");
 488                 hsotg->reset_phy_on_wake = false;
 489         }
 490 
 491         if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
 492                 retval = dwc2_hcd_init(hsotg);
 493                 if (retval) {
 494                         if (hsotg->gadget_enabled)
 495                                 dwc2_hsotg_remove(hsotg);
 496                         goto error;
 497                 }
 498                 hsotg->hcd_enabled = 1;
 499         }
 500 
 501         platform_set_drvdata(dev, hsotg);
 502         hsotg->hibernated = 0;
 503 
 504         dwc2_debugfs_init(hsotg);
 505 
 506         /* Gadget code manages lowlevel hw on its own */
 507         if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
 508                 dwc2_lowlevel_hw_disable(hsotg);
 509 
 510         return 0;
 511 
 512 error:
 513         dwc2_lowlevel_hw_disable(hsotg);
 514         return retval;
 515 }
 516 
 517 static int __maybe_unused dwc2_suspend(struct device *dev)
 518 {
 519         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
 520         bool is_device_mode = dwc2_is_device_mode(dwc2);
 521         int ret = 0;
 522 
 523         if (is_device_mode)
 524                 dwc2_hsotg_suspend(dwc2);
 525 
 526         if (dwc2->ll_hw_enabled &&
 527             (is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) {
 528                 ret = __dwc2_lowlevel_hw_disable(dwc2);
 529                 dwc2->phy_off_for_suspend = true;
 530         }
 531 
 532         return ret;
 533 }
 534 
 535 static int __maybe_unused dwc2_resume(struct device *dev)
 536 {
 537         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
 538         int ret = 0;
 539 
 540         if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
 541                 ret = __dwc2_lowlevel_hw_enable(dwc2);
 542                 if (ret)
 543                         return ret;
 544         }
 545         dwc2->phy_off_for_suspend = false;
 546 
 547         if (dwc2_is_device_mode(dwc2))
 548                 ret = dwc2_hsotg_resume(dwc2);
 549 
 550         return ret;
 551 }
 552 
 553 static const struct dev_pm_ops dwc2_dev_pm_ops = {
 554         SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
 555 };
 556 
 557 static struct platform_driver dwc2_platform_driver = {
 558         .driver = {
 559                 .name = dwc2_driver_name,
 560                 .of_match_table = dwc2_of_match_table,
 561                 .pm = &dwc2_dev_pm_ops,
 562         },
 563         .probe = dwc2_driver_probe,
 564         .remove = dwc2_driver_remove,
 565         .shutdown = dwc2_driver_shutdown,
 566 };
 567 
 568 module_platform_driver(dwc2_platform_driver);
 569 
 570 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
 571 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
 572 MODULE_LICENSE("Dual BSD/GPL");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/usb/dwc2/platform.c

DEFINITIONS
