1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * USB ConnectTech WhiteHEAT driver
4 *
5 * Copyright (C) 2002
6 * Connect Tech Inc.
7 *
8 * Copyright (C) 1999, 2000
9 * Greg Kroah-Hartman (greg@kroah.com)
10 *
11 * See Documentation/usb/usb-serial.rst for more information on using this
12 * driver
13 *
14 */
15
16 #ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
17 #define __LINUX_USB_SERIAL_WHITEHEAT_H
18
19
20 /* WhiteHEAT commands */
21 #define WHITEHEAT_OPEN 1 /* open the port */
22 #define WHITEHEAT_CLOSE 2 /* close the port */
23 #define WHITEHEAT_SETUP_PORT 3 /* change port settings */
24 #define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */
25 #define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */
26 #define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */
27 #define WHITEHEAT_DUMP 7 /* dump memory */
28 #define WHITEHEAT_STATUS 8 /* get status */
29 #define WHITEHEAT_PURGE 9 /* clear the UART fifos */
30 #define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS
31 for a port */
32 #define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and
33 hardware ID */
34 #define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */
35 #define WHITEHEAT_EVENT 13 /* unsolicited status events */
36 #define WHITEHEAT_ECHO 14 /* send data to the indicated
37 IN endpoint */
38 #define WHITEHEAT_DO_TEST 15 /* perform specified test */
39 #define WHITEHEAT_CMD_COMPLETE 16 /* reply for some commands */
40 #define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */
41
42
43 /*
44 * Commands to the firmware
45 */
46
47
48 /*
49 * WHITEHEAT_OPEN
50 * WHITEHEAT_CLOSE
51 * WHITEHEAT_STATUS
52 * WHITEHEAT_GET_DTR_RTS
53 * WHITEHEAT_REPORT_TX_DONE
54 */
55 struct whiteheat_simple {
56 __u8 port; /* port number (1 to N) */
57 };
58
59
60 /*
61 * WHITEHEAT_SETUP_PORT
62 */
63 #define WHITEHEAT_PAR_NONE 'n' /* no parity */
64 #define WHITEHEAT_PAR_EVEN 'e' /* even parity */
65 #define WHITEHEAT_PAR_ODD 'o' /* odd parity */
66 #define WHITEHEAT_PAR_SPACE '0' /* space (force 0) parity */
67 #define WHITEHEAT_PAR_MARK '1' /* mark (force 1) parity */
68
69 #define WHITEHEAT_SFLOW_NONE 'n' /* no software flow control */
70 #define WHITEHEAT_SFLOW_RX 'r' /* XOFF/ON is sent when RX
71 fills/empties */
72 #define WHITEHEAT_SFLOW_TX 't' /* when received XOFF/ON will
73 stop/start TX */
74 #define WHITEHEAT_SFLOW_RXTX 'b' /* both SFLOW_RX and SFLOW_TX */
75
76 #define WHITEHEAT_HFLOW_NONE 0x00 /* no hardware flow control */
77 #define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 /* RTS is on during transmit,
78 off otherwise */
79 #define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX
80 fills/empties */
81 #define WHITEHEAT_HFLOW_CTS 0x08 /* when received CTS off/on
82 will stop/start TX */
83 #define WHITEHEAT_HFLOW_DSR 0x10 /* when received DSR off/on
84 will stop/start TX */
85 #define WHITEHEAT_HFLOW_RTS 0x80 /* RTS is off/on when RX
86 fills/empties */
87
88 struct whiteheat_port_settings {
89 __u8 port; /* port number (1 to N) */
90 __le32 baud; /* any value 7 - 460800, firmware calculates
91 best fit; arrives little endian */
92 __u8 bits; /* 5, 6, 7, or 8 */
93 __u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
94 __u8 parity; /* see WHITEHEAT_PAR_* above */
95 __u8 sflow; /* see WHITEHEAT_SFLOW_* above */
96 __u8 xoff; /* XOFF byte value */
97 __u8 xon; /* XON byte value */
98 __u8 hflow; /* see WHITEHEAT_HFLOW_* above */
99 __u8 lloop; /* 0/1 turns local loopback mode off/on */
100 } __attribute__ ((packed));
101
102
103 /*
104 * WHITEHEAT_SET_RTS
105 * WHITEHEAT_SET_DTR
106 * WHITEHEAT_SET_BREAK
107 */
108 #define WHITEHEAT_RTS_OFF 0x00
109 #define WHITEHEAT_RTS_ON 0x01
110 #define WHITEHEAT_DTR_OFF 0x00
111 #define WHITEHEAT_DTR_ON 0x01
112 #define WHITEHEAT_BREAK_OFF 0x00
113 #define WHITEHEAT_BREAK_ON 0x01
114
115 struct whiteheat_set_rdb {
116 __u8 port; /* port number (1 to N) */
117 __u8 state; /* 0/1 turns signal off/on */
118 };
119
120
121 /*
122 * WHITEHEAT_DUMP
123 */
124 #define WHITEHEAT_DUMP_MEM_DATA 'd' /* data */
125 #define WHITEHEAT_DUMP_MEM_IDATA 'i' /* idata */
126 #define WHITEHEAT_DUMP_MEM_BDATA 'b' /* bdata */
127 #define WHITEHEAT_DUMP_MEM_XDATA 'x' /* xdata */
128
129 /*
130 * Allowable address ranges (firmware checks address):
131 * Type DATA: 0x00 - 0xff
132 * Type IDATA: 0x80 - 0xff
133 * Type BDATA: 0x20 - 0x2f
134 * Type XDATA: 0x0000 - 0xffff
135 *
136 * B/I/DATA all read the local memory space
137 * XDATA reads the external memory space
138 * BDATA returns bits as bytes
139 *
140 * NOTE: 0x80 - 0xff (local space) are the Special Function Registers
141 * of the 8051, and some have on-read side-effects.
142 */
143
144 struct whiteheat_dump {
145 __u8 mem_type; /* see WHITEHEAT_DUMP_* above */
146 __u16 addr; /* address, see restrictions above */
147 __u16 length; /* number of bytes to dump, max 63 bytes */
148 };
149
150
151 /*
152 * WHITEHEAT_PURGE
153 */
154 #define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */
155 #define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */
156
157 struct whiteheat_purge {
158 __u8 port; /* port number (1 to N) */
159 __u8 what; /* bit pattern of what to purge */
160 };
161
162
163 /*
164 * WHITEHEAT_ECHO
165 */
166 struct whiteheat_echo {
167 __u8 port; /* port number (1 to N) */
168 __u8 length; /* length of message to echo, max 61 bytes */
169 __u8 echo_data[61]; /* data to echo */
170 };
171
172
173 /*
174 * WHITEHEAT_DO_TEST
175 */
176 #define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */
177 #define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */
178 #define WHITEHEAT_TEST_SETUP_CONT 0x03 /* setup for
179 PORT_CONT/PORT_DISCONT */
180 #define WHITEHEAT_TEST_PORT_CONT 0x04 /* port connect */
181 #define WHITEHEAT_TEST_PORT_DISCONT 0x05 /* port disconnect */
182 #define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */
183 #define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */
184 #define WHITEHEAT_TEST_MODEM_FT 0x08 /* modem signals, requires a
185 loopback cable/connector */
186 #define WHITEHEAT_TEST_ERASE_EEPROM 0x09 /* erase eeprom */
187 #define WHITEHEAT_TEST_READ_EEPROM 0x0a /* read eeprom */
188 #define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b /* program eeprom */
189
190 struct whiteheat_test {
191 __u8 port; /* port number (1 to n) */
192 __u8 test; /* see WHITEHEAT_TEST_* above*/
193 __u8 info[32]; /* additional info */
194 };
195
196
197 /*
198 * Replies from the firmware
199 */
200
201
202 /*
203 * WHITEHEAT_STATUS
204 */
205 #define WHITEHEAT_EVENT_MODEM 0x01 /* modem field is valid */
206 #define WHITEHEAT_EVENT_ERROR 0x02 /* error field is valid */
207 #define WHITEHEAT_EVENT_FLOW 0x04 /* flow field is valid */
208 #define WHITEHEAT_EVENT_CONNECT 0x08 /* connect field is valid */
209
210 #define WHITEHEAT_FLOW_NONE 0x00 /* no flow control active */
211 #define WHITEHEAT_FLOW_HARD_OUT 0x01 /* TX is stopped by CTS
212 (waiting for CTS to go on) */
213 #define WHITEHEAT_FLOW_HARD_IN 0x02 /* remote TX is stopped
214 by RTS */
215 #define WHITEHEAT_FLOW_SOFT_OUT 0x04 /* TX is stopped by XOFF
216 received (waiting for XON) */
217 #define WHITEHEAT_FLOW_SOFT_IN 0x08 /* remote TX is stopped by XOFF
218 transmitted */
219 #define WHITEHEAT_FLOW_TX_DONE 0x80 /* TX has completed */
220
221 struct whiteheat_status_info {
222 __u8 port; /* port number (1 to N) */
223 __u8 event; /* indicates what the current event is,
224 see WHITEHEAT_EVENT_* above */
225 __u8 modem; /* modem signal status (copy of uart's
226 MSR register) */
227 __u8 error; /* line status (copy of uart's LSR register) */
228 __u8 flow; /* flow control state, see WHITEHEAT_FLOW_*
229 above */
230 __u8 connect; /* 0 means not connected, non-zero means
231 connected */
232 };
233
234
235 /*
236 * WHITEHEAT_GET_DTR_RTS
237 */
238 struct whiteheat_dr_info {
239 __u8 mcr; /* copy of uart's MCR register */
240 };
241
242
243 /*
244 * WHITEHEAT_GET_HW_INFO
245 */
246 struct whiteheat_hw_info {
247 __u8 hw_id; /* hardware id number, WhiteHEAT = 0 */
248 __u8 sw_major_rev; /* major version number */
249 __u8 sw_minor_rev; /* minor version number */
250 struct whiteheat_hw_eeprom_info {
251 __u8 b0; /* B0 */
252 __u8 vendor_id_low; /* vendor id (low byte) */
253 __u8 vendor_id_high; /* vendor id (high byte) */
254 __u8 product_id_low; /* product id (low byte) */
255 __u8 product_id_high; /* product id (high byte) */
256 __u8 device_id_low; /* device id (low byte) */
257 __u8 device_id_high; /* device id (high byte) */
258 __u8 not_used_1;
259 __u8 serial_number_0; /* serial number (low byte) */
260 __u8 serial_number_1; /* serial number */
261 __u8 serial_number_2; /* serial number */
262 __u8 serial_number_3; /* serial number (high byte) */
263 __u8 not_used_2;
264 __u8 not_used_3;
265 __u8 checksum_low; /* checksum (low byte) */
266 __u8 checksum_high; /* checksum (high byte */
267 } hw_eeprom_info; /* EEPROM contents */
268 };
269
270
271 /*
272 * WHITEHEAT_EVENT
273 */
274 struct whiteheat_event_info {
275 __u8 port; /* port number (1 to N) */
276 __u8 event; /* see whiteheat_status_info.event */
277 __u8 info; /* see whiteheat_status_info.modem, .error,
278 .flow, .connect */
279 };
280
281
282 /*
283 * WHITEHEAT_DO_TEST
284 */
285 #define WHITEHEAT_TEST_FAIL 0x00 /* test failed */
286 #define WHITEHEAT_TEST_UNKNOWN 0x01 /* unknown test requested */
287 #define WHITEHEAT_TEST_PASS 0xff /* test passed */
288
289 struct whiteheat_test_info {
290 __u8 port; /* port number (1 to N) */
291 __u8 test; /* indicates which test this is a response for,
292 see WHITEHEAT_DO_TEST above */
293 __u8 status; /* see WHITEHEAT_TEST_* above */
294 __u8 results[32]; /* test-dependent results */
295 };
296
297
298 #endif