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12 #ifndef _IO_TI_H_
13 #define _IO_TI_H_
14
15
16 #define DTK_ADDR_SPACE_XDATA 0x03
17 #define DTK_ADDR_SPACE_I2C_TYPE_II 0x82
18 #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83
19
20
21 #define UMPMEM_BASE_UART1 0xFFA0
22 #define UMPMEM_BASE_UART2 0xFFB0
23 #define UMPMEM_OFFS_UART_LSR 0x05
24
25
26 #define UMP_UART_CHAR5BITS 0x00
27 #define UMP_UART_CHAR6BITS 0x01
28 #define UMP_UART_CHAR7BITS 0x02
29 #define UMP_UART_CHAR8BITS 0x03
30
31
32 #define UMP_UART_NOPARITY 0x00
33 #define UMP_UART_ODDPARITY 0x01
34 #define UMP_UART_EVENPARITY 0x02
35 #define UMP_UART_MARKPARITY 0x03
36 #define UMP_UART_SPACEPARITY 0x04
37
38
39 #define UMP_UART_STOPBIT1 0x00
40 #define UMP_UART_STOPBIT15 0x01
41 #define UMP_UART_STOPBIT2 0x02
42
43
44 #define UMP_UART_LSR_OV_MASK 0x01
45 #define UMP_UART_LSR_PE_MASK 0x02
46 #define UMP_UART_LSR_FE_MASK 0x04
47 #define UMP_UART_LSR_BR_MASK 0x08
48 #define UMP_UART_LSR_ER_MASK 0x0F
49 #define UMP_UART_LSR_RX_MASK 0x10
50 #define UMP_UART_LSR_TX_MASK 0x20
51
52 #define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK)
53
54
55 #define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001
56 #define UMP_MASK_UART_FLAGS_RTS_DISABLE 0x0002
57 #define UMP_MASK_UART_FLAGS_PARITY 0x0008
58 #define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW 0x0010
59 #define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW 0x0020
60 #define UMP_MASK_UART_FLAGS_OUT_X 0x0040
61 #define UMP_MASK_UART_FLAGS_OUT_XA 0x0080
62 #define UMP_MASK_UART_FLAGS_IN_X 0x0100
63 #define UMP_MASK_UART_FLAGS_DTR_FLOW 0x0800
64 #define UMP_MASK_UART_FLAGS_DTR_DISABLE 0x1000
65 #define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT 0x2000
66 #define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR 0x4000
67
68 #define UMP_DMA_MODE_CONTINOUS 0x01
69 #define UMP_PIPE_TRANS_TIMEOUT_ENA 0x80
70 #define UMP_PIPE_TRANSFER_MODE_MASK 0x03
71 #define UMP_PIPE_TRANS_TIMEOUT_MASK 0x7C
72
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74 #define UMP_PORT_DIR_OUT 0x01
75 #define UMP_PORT_DIR_IN 0x02
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78 #define UMPM_UART1_PORT 0x03
79
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81 #define UMPC_SET_CONFIG 0x05
82 #define UMPC_OPEN_PORT 0x06
83 #define UMPC_CLOSE_PORT 0x07
84 #define UMPC_START_PORT 0x08
85 #define UMPC_STOP_PORT 0x09
86 #define UMPC_TEST_PORT 0x0A
87 #define UMPC_PURGE_PORT 0x0B
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90 #define UMPC_COMPLETE_READ 0x80
91
92 #define UMPC_HARDWARE_RESET 0x81
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97 #define UMPC_COPY_DNLD_TO_I2C 0x82
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104 #define UMPC_WRITE_SFR 0x83
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107 #define UMPC_READ_SFR 0x84
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110 #define UMPC_SET_CLR_DTR 0x85
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113 #define UMPC_SET_CLR_RTS 0x86
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116 #define UMPC_SET_CLR_LOOPBACK 0x87
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119 #define UMPC_SET_CLR_BREAK 0x88
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122 #define UMPC_READ_MSR 0x89
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126 #define UMPC_MEMORY_READ 0x92
127 #define UMPC_MEMORY_WRITE 0x93
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132 #define UMPD_OEDB1_ADDRESS 0xFF08
133 #define UMPD_OEDB2_ADDRESS 0xFF10
134
135 struct out_endpoint_desc_block {
136 __u8 Configuration;
137 __u8 XBufAddr;
138 __u8 XByteCount;
139 __u8 Unused1;
140 __u8 Unused2;
141 __u8 YBufAddr;
142 __u8 YByteCount;
143 __u8 BufferSize;
144 } __attribute__((packed));
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151
152 struct ump_uart_config {
153 __u16 wBaudRate;
154 __u16 wFlags;
155 __u8 bDataBits;
156 __u8 bParity;
157 __u8 bStopBits;
158 char cXon;
159 char cXoff;
160 __u8 bUartMode;
161
162 } __attribute__((packed));
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169
170 struct ump_interrupt {
171 __u8 bICode;
172 __u8 bIInfo;
173 } __attribute__((packed));
174
175
176 #define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 6) & 0x01)
177 #define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)
178 #define TIUMP_INTERRUPT_CODE_LSR 0x03
179 #define TIUMP_INTERRUPT_CODE_MSR 0x04
180
181 #endif