This source file includes following definitions.
- hcd_to_fotg210
- fotg210_to_hcd
- fotg210_get_speed
- fotg210_port_speed
- fotg210_readl
- fotg210_writel
- cpu_to_hc32
- hc32_to_cpu
- hc32_to_cpup
- fotg210_read_frame_index
1
2 #ifndef __LINUX_FOTG210_H
3 #define __LINUX_FOTG210_H
4
5 #include <linux/usb/ehci-dbgp.h>
6
7
8
9
10
11
12
13
14
15
16
17 #define __hc32 __le32
18 #define __hc16 __le16
19
20
21 struct fotg210_stats {
22
23 unsigned long normal;
24 unsigned long error;
25 unsigned long iaa;
26 unsigned long lost_iaa;
27
28
29 unsigned long complete;
30 unsigned long unlink;
31 };
32
33
34
35
36
37
38
39
40
41
42
43 #define FOTG210_MAX_ROOT_PORTS 1
44
45
46
47
48
49 enum fotg210_rh_state {
50 FOTG210_RH_HALTED,
51 FOTG210_RH_SUSPENDED,
52 FOTG210_RH_RUNNING,
53 FOTG210_RH_STOPPING
54 };
55
56
57
58
59
60
61 enum fotg210_hrtimer_event {
62 FOTG210_HRTIMER_POLL_ASS,
63 FOTG210_HRTIMER_POLL_PSS,
64 FOTG210_HRTIMER_POLL_DEAD,
65 FOTG210_HRTIMER_UNLINK_INTR,
66 FOTG210_HRTIMER_FREE_ITDS,
67 FOTG210_HRTIMER_ASYNC_UNLINKS,
68 FOTG210_HRTIMER_IAA_WATCHDOG,
69 FOTG210_HRTIMER_DISABLE_PERIODIC,
70 FOTG210_HRTIMER_DISABLE_ASYNC,
71 FOTG210_HRTIMER_IO_WATCHDOG,
72 FOTG210_HRTIMER_NUM_EVENTS
73 };
74 #define FOTG210_HRTIMER_NO_EVENT 99
75
76 struct fotg210_hcd {
77
78 enum fotg210_hrtimer_event next_hrtimer_event;
79 unsigned enabled_hrtimer_events;
80 ktime_t hr_timeouts[FOTG210_HRTIMER_NUM_EVENTS];
81 struct hrtimer hrtimer;
82
83 int PSS_poll_count;
84 int ASS_poll_count;
85 int died_poll_count;
86
87
88 struct fotg210_caps __iomem *caps;
89 struct fotg210_regs __iomem *regs;
90 struct ehci_dbg_port __iomem *debug;
91
92 __u32 hcs_params;
93 spinlock_t lock;
94 enum fotg210_rh_state rh_state;
95
96
97 bool scanning:1;
98 bool need_rescan:1;
99 bool intr_unlinking:1;
100 bool async_unlinking:1;
101 bool shutdown:1;
102 struct fotg210_qh *qh_scan_next;
103
104
105 struct fotg210_qh *async;
106 struct fotg210_qh *dummy;
107 struct fotg210_qh *async_unlink;
108 struct fotg210_qh *async_unlink_last;
109 struct fotg210_qh *async_iaa;
110 unsigned async_unlink_cycle;
111 unsigned async_count;
112
113
114 #define DEFAULT_I_TDPS 1024
115 unsigned periodic_size;
116 __hc32 *periodic;
117 dma_addr_t periodic_dma;
118 struct list_head intr_qh_list;
119 unsigned i_thresh;
120
121 union fotg210_shadow *pshadow;
122 struct fotg210_qh *intr_unlink;
123 struct fotg210_qh *intr_unlink_last;
124 unsigned intr_unlink_cycle;
125 unsigned now_frame;
126 unsigned next_frame;
127 unsigned intr_count;
128 unsigned isoc_count;
129 unsigned periodic_count;
130
131 unsigned uframe_periodic_max;
132
133
134
135 struct list_head cached_itd_list;
136 struct fotg210_itd *last_itd_to_free;
137
138
139 unsigned long reset_done[FOTG210_MAX_ROOT_PORTS];
140
141
142
143
144 unsigned long bus_suspended;
145
146
147 unsigned long companion_ports;
148
149
150 unsigned long owned_ports;
151
152
153 unsigned long port_c_suspend;
154
155
156 unsigned long suspended_ports;
157
158
159 unsigned long resuming_ports;
160
161
162 struct dma_pool *qh_pool;
163 struct dma_pool *qtd_pool;
164 struct dma_pool *itd_pool;
165
166 unsigned random_frame;
167 unsigned long next_statechange;
168 ktime_t last_periodic_enable;
169 u32 command;
170
171
172 unsigned need_io_watchdog:1;
173 unsigned fs_i_thresh:1;
174
175 u8 sbrn;
176
177
178 #ifdef FOTG210_STATS
179 struct fotg210_stats stats;
180 # define INCR(x) ((x)++)
181 #else
182 # define INCR(x) do {} while (0)
183 #endif
184
185
186 struct clk *pclk;
187
188
189 struct dentry *debug_dir;
190 };
191
192
193 static inline struct fotg210_hcd *hcd_to_fotg210(struct usb_hcd *hcd)
194 {
195 return (struct fotg210_hcd *)(hcd->hcd_priv);
196 }
197 static inline struct usb_hcd *fotg210_to_hcd(struct fotg210_hcd *fotg210)
198 {
199 return container_of((void *) fotg210, struct usb_hcd, hcd_priv);
200 }
201
202
203
204
205
206
207 struct fotg210_caps {
208
209
210
211
212
213
214 u32 hc_capbase;
215 #define HC_LENGTH(fotg210, p) (0x00ff&((p) >> \
216 (fotg210_big_endian_capbase(fotg210) ? 24 : 0)))
217 #define HC_VERSION(fotg210, p) (0xffff&((p) >> \
218 (fotg210_big_endian_capbase(fotg210) ? 0 : 16)))
219 u32 hcs_params;
220 #define HCS_N_PORTS(p) (((p)>>0)&0xf)
221
222 u32 hcc_params;
223 #define HCC_CANPARK(p) ((p)&(1 << 2))
224 #define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1))
225 u8 portroute[8];
226 };
227
228
229
230 struct fotg210_regs {
231
232
233 u32 command;
234
235
236
237 #define CMD_PARK (1<<11)
238 #define CMD_PARK_CNT(c) (((c)>>8)&3)
239 #define CMD_IAAD (1<<6)
240 #define CMD_ASE (1<<5)
241 #define CMD_PSE (1<<4)
242
243 #define CMD_RESET (1<<1)
244 #define CMD_RUN (1<<0)
245
246
247 u32 status;
248 #define STS_ASS (1<<15)
249 #define STS_PSS (1<<14)
250 #define STS_RECL (1<<13)
251 #define STS_HALT (1<<12)
252
253
254 #define STS_IAA (1<<5)
255 #define STS_FATAL (1<<4)
256 #define STS_FLR (1<<3)
257 #define STS_PCD (1<<2)
258 #define STS_ERR (1<<1)
259 #define STS_INT (1<<0)
260
261
262 u32 intr_enable;
263
264
265 u32 frame_index;
266
267 u32 segment;
268
269 u32 frame_list;
270
271 u32 async_next;
272
273 u32 reserved1;
274
275 u32 port_status;
276
277 #define PORT_USB11(x) (((x)&(3<<10)) == (1<<10))
278 #define PORT_RESET (1<<8)
279 #define PORT_SUSPEND (1<<7)
280 #define PORT_RESUME (1<<6)
281 #define PORT_PEC (1<<3)
282 #define PORT_PE (1<<2)
283 #define PORT_CSC (1<<1)
284 #define PORT_CONNECT (1<<0)
285 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC)
286 u32 reserved2[19];
287
288
289 u32 otgcsr;
290 #define OTGCSR_HOST_SPD_TYP (3 << 22)
291 #define OTGCSR_A_BUS_DROP (1 << 5)
292 #define OTGCSR_A_BUS_REQ (1 << 4)
293
294
295 u32 otgisr;
296 #define OTGISR_OVC (1 << 10)
297
298 u32 reserved3[15];
299
300
301 u32 gmir;
302 #define GMIR_INT_POLARITY (1 << 3)
303 #define GMIR_MHC_INT (1 << 2)
304 #define GMIR_MOTG_INT (1 << 1)
305 #define GMIR_MDEV_INT (1 << 0)
306 };
307
308
309
310 #define QTD_NEXT(fotg210, dma) cpu_to_hc32(fotg210, (u32)dma)
311
312
313
314
315
316
317
318
319
320 struct fotg210_qtd {
321
322 __hc32 hw_next;
323 __hc32 hw_alt_next;
324 __hc32 hw_token;
325 #define QTD_TOGGLE (1 << 31)
326 #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
327 #define QTD_IOC (1 << 15)
328 #define QTD_CERR(tok) (((tok)>>10) & 0x3)
329 #define QTD_PID(tok) (((tok)>>8) & 0x3)
330 #define QTD_STS_ACTIVE (1 << 7)
331 #define QTD_STS_HALT (1 << 6)
332 #define QTD_STS_DBE (1 << 5)
333 #define QTD_STS_BABBLE (1 << 4)
334 #define QTD_STS_XACT (1 << 3)
335 #define QTD_STS_MMF (1 << 2)
336 #define QTD_STS_STS (1 << 1)
337 #define QTD_STS_PING (1 << 0)
338
339 #define ACTIVE_BIT(fotg210) cpu_to_hc32(fotg210, QTD_STS_ACTIVE)
340 #define HALT_BIT(fotg210) cpu_to_hc32(fotg210, QTD_STS_HALT)
341 #define STATUS_BIT(fotg210) cpu_to_hc32(fotg210, QTD_STS_STS)
342
343 __hc32 hw_buf[5];
344 __hc32 hw_buf_hi[5];
345
346
347 dma_addr_t qtd_dma;
348 struct list_head qtd_list;
349 struct urb *urb;
350 size_t length;
351 } __aligned(32);
352
353
354 #define QTD_MASK(fotg210) cpu_to_hc32(fotg210, ~0x1f)
355
356 #define IS_SHORT_READ(token) (QTD_LENGTH(token) != 0 && QTD_PID(token) == 1)
357
358
359
360
361 #define Q_NEXT_TYPE(fotg210, dma) ((dma) & cpu_to_hc32(fotg210, 3 << 1))
362
363
364
365
366
367
368
369
370
371 #define Q_TYPE_ITD (0 << 1)
372 #define Q_TYPE_QH (1 << 1)
373 #define Q_TYPE_SITD (2 << 1)
374 #define Q_TYPE_FSTN (3 << 1)
375
376
377 #define QH_NEXT(fotg210, dma) \
378 (cpu_to_hc32(fotg210, (((u32)dma)&~0x01f)|Q_TYPE_QH))
379
380
381 #define FOTG210_LIST_END(fotg210) \
382 cpu_to_hc32(fotg210, 1)
383
384
385
386
387
388
389
390
391
392 union fotg210_shadow {
393 struct fotg210_qh *qh;
394 struct fotg210_itd *itd;
395 struct fotg210_fstn *fstn;
396 __hc32 *hw_next;
397 void *ptr;
398 };
399
400
401
402
403
404
405
406
407
408
409
410
411 struct fotg210_qh_hw {
412 __hc32 hw_next;
413 __hc32 hw_info1;
414 #define QH_CONTROL_EP (1 << 27)
415 #define QH_HEAD (1 << 15)
416 #define QH_TOGGLE_CTL (1 << 14)
417 #define QH_HIGH_SPEED (2 << 12)
418 #define QH_LOW_SPEED (1 << 12)
419 #define QH_FULL_SPEED (0 << 12)
420 #define QH_INACTIVATE (1 << 7)
421 __hc32 hw_info2;
422 #define QH_SMASK 0x000000ff
423 #define QH_CMASK 0x0000ff00
424 #define QH_HUBADDR 0x007f0000
425 #define QH_HUBPORT 0x3f800000
426 #define QH_MULT 0xc0000000
427 __hc32 hw_current;
428
429
430 __hc32 hw_qtd_next;
431 __hc32 hw_alt_next;
432 __hc32 hw_token;
433 __hc32 hw_buf[5];
434 __hc32 hw_buf_hi[5];
435 } __aligned(32);
436
437 struct fotg210_qh {
438 struct fotg210_qh_hw *hw;
439
440 dma_addr_t qh_dma;
441 union fotg210_shadow qh_next;
442 struct list_head qtd_list;
443 struct list_head intr_node;
444 struct fotg210_qtd *dummy;
445 struct fotg210_qh *unlink_next;
446
447 unsigned unlink_cycle;
448
449 u8 needs_rescan;
450 u8 qh_state;
451 #define QH_STATE_LINKED 1
452 #define QH_STATE_UNLINK 2
453 #define QH_STATE_IDLE 3
454 #define QH_STATE_UNLINK_WAIT 4
455 #define QH_STATE_COMPLETING 5
456
457 u8 xacterrs;
458 #define QH_XACTERR_MAX 32
459
460
461 u8 usecs;
462 u8 gap_uf;
463 u8 c_usecs;
464 u16 tt_usecs;
465 unsigned short period;
466 unsigned short start;
467 #define NO_FRAME ((unsigned short)~0)
468
469 struct usb_device *dev;
470 unsigned is_out:1;
471 unsigned clearing_tt:1;
472 };
473
474
475
476
477 struct fotg210_iso_packet {
478
479 u64 bufp;
480 __hc32 transaction;
481 u8 cross;
482
483 u32 buf1;
484 };
485
486
487
488
489
490 struct fotg210_iso_sched {
491 struct list_head td_list;
492 unsigned span;
493 struct fotg210_iso_packet packet[0];
494 };
495
496
497
498
499
500 struct fotg210_iso_stream {
501
502 struct fotg210_qh_hw *hw;
503
504 u8 bEndpointAddress;
505 u8 highspeed;
506 struct list_head td_list;
507 struct list_head free_list;
508 struct usb_device *udev;
509 struct usb_host_endpoint *ep;
510
511
512 int next_uframe;
513 __hc32 splits;
514
515
516
517
518
519 u8 usecs, c_usecs;
520 u16 interval;
521 u16 tt_usecs;
522 u16 maxp;
523 u16 raw_mask;
524 unsigned bandwidth;
525
526
527 __hc32 buf0;
528 __hc32 buf1;
529 __hc32 buf2;
530
531
532 __hc32 address;
533 };
534
535
536
537
538
539
540
541
542
543 struct fotg210_itd {
544
545 __hc32 hw_next;
546 __hc32 hw_transaction[8];
547 #define FOTG210_ISOC_ACTIVE (1<<31)
548 #define FOTG210_ISOC_BUF_ERR (1<<30)
549 #define FOTG210_ISOC_BABBLE (1<<29)
550 #define FOTG210_ISOC_XACTERR (1<<28)
551 #define FOTG210_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff)
552 #define FOTG210_ITD_IOC (1 << 15)
553
554 #define ITD_ACTIVE(fotg210) cpu_to_hc32(fotg210, FOTG210_ISOC_ACTIVE)
555
556 __hc32 hw_bufp[7];
557 __hc32 hw_bufp_hi[7];
558
559
560 dma_addr_t itd_dma;
561 union fotg210_shadow itd_next;
562
563 struct urb *urb;
564 struct fotg210_iso_stream *stream;
565 struct list_head itd_list;
566
567
568 unsigned frame;
569 unsigned pg;
570 unsigned index[8];
571 } __aligned(32);
572
573
574
575
576
577
578
579
580
581
582
583
584 struct fotg210_fstn {
585 __hc32 hw_next;
586 __hc32 hw_prev;
587
588
589 dma_addr_t fstn_dma;
590 union fotg210_shadow fstn_next;
591 } __aligned(32);
592
593
594
595
596
597 #define fotg210_prepare_ports_for_controller_suspend(fotg210, do_wakeup) \
598 fotg210_adjust_port_wakeup_flags(fotg210, true, do_wakeup)
599
600 #define fotg210_prepare_ports_for_controller_resume(fotg210) \
601 fotg210_adjust_port_wakeup_flags(fotg210, false, false)
602
603
604
605
606
607
608
609
610
611
612 static inline unsigned int
613 fotg210_get_speed(struct fotg210_hcd *fotg210, unsigned int portsc)
614 {
615 return (readl(&fotg210->regs->otgcsr)
616 & OTGCSR_HOST_SPD_TYP) >> 22;
617 }
618
619
620 static inline unsigned int
621 fotg210_port_speed(struct fotg210_hcd *fotg210, unsigned int portsc)
622 {
623 switch (fotg210_get_speed(fotg210, portsc)) {
624 case 0:
625 return 0;
626 case 1:
627 return USB_PORT_STAT_LOW_SPEED;
628 case 2:
629 default:
630 return USB_PORT_STAT_HIGH_SPEED;
631 }
632 }
633
634
635
636 #define fotg210_has_fsl_portno_bug(e) (0)
637
638
639
640
641
642
643
644
645
646
647
648
649 #define fotg210_big_endian_mmio(e) 0
650 #define fotg210_big_endian_capbase(e) 0
651
652 static inline unsigned int fotg210_readl(const struct fotg210_hcd *fotg210,
653 __u32 __iomem *regs)
654 {
655 return readl(regs);
656 }
657
658 static inline void fotg210_writel(const struct fotg210_hcd *fotg210,
659 const unsigned int val, __u32 __iomem *regs)
660 {
661 writel(val, regs);
662 }
663
664
665 static inline __hc32 cpu_to_hc32(const struct fotg210_hcd *fotg210, const u32 x)
666 {
667 return cpu_to_le32(x);
668 }
669
670
671 static inline u32 hc32_to_cpu(const struct fotg210_hcd *fotg210, const __hc32 x)
672 {
673 return le32_to_cpu(x);
674 }
675
676 static inline u32 hc32_to_cpup(const struct fotg210_hcd *fotg210,
677 const __hc32 *x)
678 {
679 return le32_to_cpup(x);
680 }
681
682
683
684 static inline unsigned fotg210_read_frame_index(struct fotg210_hcd *fotg210)
685 {
686 return fotg210_readl(fotg210, &fotg210->regs->frame_index);
687 }
688
689 #define fotg210_itdlen(urb, desc, t) ({ \
690 usb_pipein((urb)->pipe) ? \
691 (desc)->length - FOTG210_ITD_LENGTH(t) : \
692 FOTG210_ITD_LENGTH(t); \
693 })
694
695
696 #endif