This source file includes following definitions.
- i3c_bus_maintenance_lock
- i3c_bus_maintenance_unlock
- i3c_bus_normaluse_lock
- i3c_bus_normaluse_unlock
- i3c_bus_to_i3c_master
- dev_to_i3cmaster
- dev_to_i3cbus
- dev_to_i3cdesc
- bcr_show
- dcr_show
- pid_show
- dynamic_address_show
- hdrcap_show
- i3c_device_uevent
- i3c_device_match
- i3c_device_probe
- i3c_device_remove
- i3c_bus_get_addr_slot_status
- i3c_bus_set_addr_slot_status
- i3c_bus_dev_addr_is_avail
- i3c_bus_get_free_addr
- i3c_bus_init_addrslots
- i3c_bus_cleanup
- i3c_bus_init
- mode_show
- current_master_show
- i3c_scl_frequency_show
- i2c_scl_frequency_show
- i3c_masterdev_release
- i3c_bus_set_mode
- i2c_adapter_to_i3c_master
- i3c_master_to_i2c_adapter
- i3c_master_free_i2c_dev
- i3c_master_alloc_i2c_dev
- i3c_ccc_cmd_dest_init
- i3c_ccc_cmd_dest_cleanup
- i3c_ccc_cmd_init
- i3c_master_send_ccc_cmd_locked
- i3c_master_find_i2c_dev_by_addr
- i3c_master_get_free_addr
- i3c_device_release
- i3c_master_free_i3c_dev
- i3c_master_alloc_i3c_dev
- i3c_master_rstdaa_locked
- i3c_master_entdaa_locked
- i3c_master_enec_disec_locked
- i3c_master_disec_locked
- i3c_master_enec_locked
- i3c_master_defslvs_locked
- i3c_master_setda_locked
- i3c_master_setdasa_locked
- i3c_master_setnewda_locked
- i3c_master_getmrl_locked
- i3c_master_getmwl_locked
- i3c_master_getmxds_locked
- i3c_master_gethdrcap_locked
- i3c_master_getpid_locked
- i3c_master_getbcr_locked
- i3c_master_getdcr_locked
- i3c_master_retrieve_dev_info
- i3c_master_put_i3c_addrs
- i3c_master_get_i3c_addrs
- i3c_master_attach_i3c_dev
- i3c_master_reattach_i3c_dev
- i3c_master_detach_i3c_dev
- i3c_master_attach_i2c_dev
- i3c_master_detach_i2c_dev
- i3c_master_pre_assign_dyn_addr
- i3c_master_register_new_i3c_devs
- i3c_master_do_daa
- i3c_master_set_info
- i3c_master_detach_free_devs
- i3c_master_bus_init
- i3c_master_bus_cleanup
- i3c_master_search_i3c_dev_duplicate
- i3c_master_add_i3c_dev_locked
- of_i3c_master_add_i2c_boardinfo
- of_i3c_master_add_i3c_boardinfo
- of_i3c_master_add_dev
- of_populate_i3c_bus
- i3c_master_i2c_adapter_xfer
- i3c_master_i2c_funcs
- i3c_master_i2c_adapter_init
- i3c_master_i2c_adapter_cleanup
- i3c_master_unregister_i3c_devs
- i3c_master_queue_ibi
- i3c_master_handle_ibi
- i3c_master_init_ibi_slot
- i3c_generic_ibi_free_pool
- i3c_generic_ibi_alloc_pool
- i3c_generic_ibi_get_free_slot
- i3c_generic_ibi_recycle_slot
- i3c_master_check_ops
- i3c_master_register
- i3c_master_unregister
- i3c_dev_do_priv_xfers_locked
- i3c_dev_disable_ibi_locked
- i3c_dev_enable_ibi_locked
- i3c_dev_request_ibi_locked
- i3c_dev_free_ibi_locked
- i3c_init
- i3c_exit
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7
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19
20 #include "internals.h"
21
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42 {
43 down_write(&bus->lock);
44 }
45
46
47
48
49
50
51
52
53
54
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56 {
57 up_write(&bus->lock);
58 }
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77 {
78 down_read(&bus->lock);
79 }
80
81
82
83
84
85
86
87
88
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90 {
91 up_read(&bus->lock);
92 }
93
94 static struct i3c_master_controller *
95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96 {
97 return container_of(i3cbus, struct i3c_master_controller, bus);
98 }
99
100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101 {
102 return container_of(dev, struct i3c_master_controller, dev);
103 }
104
105 static const struct device_type i3c_device_type;
106
107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108 {
109 struct i3c_master_controller *master;
110
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
113
114 master = dev_to_i3cmaster(dev);
115
116 return &master->bus;
117 }
118
119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120 {
121 struct i3c_master_controller *master;
122
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
125
126 master = dev_to_i3cmaster(dev);
127
128 return master->this;
129 }
130
131 static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
133 char *buf)
134 {
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
137 ssize_t ret;
138
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
143
144 return ret;
145 }
146 static DEVICE_ATTR_RO(bcr);
147
148 static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
150 char *buf)
151 {
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
154 ssize_t ret;
155
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
160
161 return ret;
162 }
163 static DEVICE_ATTR_RO(dcr);
164
165 static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
167 char *buf)
168 {
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
171 ssize_t ret;
172
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
177
178 return ret;
179 }
180 static DEVICE_ATTR_RO(pid);
181
182 static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
184 char *buf)
185 {
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
188 ssize_t ret;
189
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
194
195 return ret;
196 }
197 static DEVICE_ATTR_RO(dynamic_address);
198
199 static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
201 };
202
203 static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
205 char *buf)
206 {
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
210 unsigned long caps;
211 int mode;
212
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
218 break;
219
220 if (!hdrcap_strings[mode])
221 continue;
222
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
225 if (ret < 0)
226 goto out;
227
228 offset += ret;
229 }
230
231 ret = sprintf(buf + offset, "\n");
232 if (ret < 0)
233 goto out;
234
235 ret = offset + ret;
236
237 out:
238 i3c_bus_normaluse_unlock(bus);
239
240 return ret;
241 }
242 static DEVICE_ATTR_RO(hdrcap);
243
244 static struct attribute *i3c_device_attrs[] = {
245 &dev_attr_bcr.attr,
246 &dev_attr_dcr.attr,
247 &dev_attr_pid.attr,
248 &dev_attr_dynamic_address.attr,
249 &dev_attr_hdrcap.attr,
250 NULL,
251 };
252 ATTRIBUTE_GROUPS(i3c_device);
253
254 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
255 {
256 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
257 struct i3c_device_info devinfo;
258 u16 manuf, part, ext;
259
260 i3c_device_get_info(i3cdev, &devinfo);
261 manuf = I3C_PID_MANUF_ID(devinfo.pid);
262 part = I3C_PID_PART_ID(devinfo.pid);
263 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
264
265 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
266 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
267 devinfo.dcr, manuf);
268
269 return add_uevent_var(env,
270 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04xext%04x",
271 devinfo.dcr, manuf, part, ext);
272 }
273
274 static const struct device_type i3c_device_type = {
275 .groups = i3c_device_groups,
276 .uevent = i3c_device_uevent,
277 };
278
279 static int i3c_device_match(struct device *dev, struct device_driver *drv)
280 {
281 struct i3c_device *i3cdev;
282 struct i3c_driver *i3cdrv;
283
284 if (dev->type != &i3c_device_type)
285 return 0;
286
287 i3cdev = dev_to_i3cdev(dev);
288 i3cdrv = drv_to_i3cdrv(drv);
289 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
290 return 1;
291
292 return 0;
293 }
294
295 static int i3c_device_probe(struct device *dev)
296 {
297 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
298 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
299
300 return driver->probe(i3cdev);
301 }
302
303 static int i3c_device_remove(struct device *dev)
304 {
305 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
306 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
307 int ret;
308
309 ret = driver->remove(i3cdev);
310 if (ret)
311 return ret;
312
313 i3c_device_free_ibi(i3cdev);
314
315 return ret;
316 }
317
318 struct bus_type i3c_bus_type = {
319 .name = "i3c",
320 .match = i3c_device_match,
321 .probe = i3c_device_probe,
322 .remove = i3c_device_remove,
323 };
324
325 static enum i3c_addr_slot_status
326 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
327 {
328 int status, bitpos = addr * 2;
329
330 if (addr > I2C_MAX_ADDR)
331 return I3C_ADDR_SLOT_RSVD;
332
333 status = bus->addrslots[bitpos / BITS_PER_LONG];
334 status >>= bitpos % BITS_PER_LONG;
335
336 return status & I3C_ADDR_SLOT_STATUS_MASK;
337 }
338
339 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
340 enum i3c_addr_slot_status status)
341 {
342 int bitpos = addr * 2;
343 unsigned long *ptr;
344
345 if (addr > I2C_MAX_ADDR)
346 return;
347
348 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
349 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
350 (bitpos % BITS_PER_LONG));
351 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
352 }
353
354 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
355 {
356 enum i3c_addr_slot_status status;
357
358 status = i3c_bus_get_addr_slot_status(bus, addr);
359
360 return status == I3C_ADDR_SLOT_FREE;
361 }
362
363 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
364 {
365 enum i3c_addr_slot_status status;
366 u8 addr;
367
368 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
369 status = i3c_bus_get_addr_slot_status(bus, addr);
370 if (status == I3C_ADDR_SLOT_FREE)
371 return addr;
372 }
373
374 return -ENOMEM;
375 }
376
377 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
378 {
379 int i;
380
381
382 for (i = 0; i < 8; i++)
383 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
384
385
386
387
388
389 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
390 I3C_ADDR_SLOT_RSVD);
391 for (i = 0; i < 7; i++)
392 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
393 I3C_ADDR_SLOT_RSVD);
394 }
395
396 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
397 {
398 mutex_lock(&i3c_core_lock);
399 idr_remove(&i3c_bus_idr, i3cbus->id);
400 mutex_unlock(&i3c_core_lock);
401 }
402
403 static int i3c_bus_init(struct i3c_bus *i3cbus)
404 {
405 int ret;
406
407 init_rwsem(&i3cbus->lock);
408 INIT_LIST_HEAD(&i3cbus->devs.i2c);
409 INIT_LIST_HEAD(&i3cbus->devs.i3c);
410 i3c_bus_init_addrslots(i3cbus);
411 i3cbus->mode = I3C_BUS_MODE_PURE;
412
413 mutex_lock(&i3c_core_lock);
414 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
415 mutex_unlock(&i3c_core_lock);
416
417 if (ret < 0)
418 return ret;
419
420 i3cbus->id = ret;
421
422 return 0;
423 }
424
425 static const char * const i3c_bus_mode_strings[] = {
426 [I3C_BUS_MODE_PURE] = "pure",
427 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
428 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
429 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
430 };
431
432 static ssize_t mode_show(struct device *dev,
433 struct device_attribute *da,
434 char *buf)
435 {
436 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
437 ssize_t ret;
438
439 i3c_bus_normaluse_lock(i3cbus);
440 if (i3cbus->mode < 0 ||
441 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
442 !i3c_bus_mode_strings[i3cbus->mode])
443 ret = sprintf(buf, "unknown\n");
444 else
445 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
446 i3c_bus_normaluse_unlock(i3cbus);
447
448 return ret;
449 }
450 static DEVICE_ATTR_RO(mode);
451
452 static ssize_t current_master_show(struct device *dev,
453 struct device_attribute *da,
454 char *buf)
455 {
456 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
457 ssize_t ret;
458
459 i3c_bus_normaluse_lock(i3cbus);
460 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
461 i3cbus->cur_master->info.pid);
462 i3c_bus_normaluse_unlock(i3cbus);
463
464 return ret;
465 }
466 static DEVICE_ATTR_RO(current_master);
467
468 static ssize_t i3c_scl_frequency_show(struct device *dev,
469 struct device_attribute *da,
470 char *buf)
471 {
472 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
473 ssize_t ret;
474
475 i3c_bus_normaluse_lock(i3cbus);
476 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
477 i3c_bus_normaluse_unlock(i3cbus);
478
479 return ret;
480 }
481 static DEVICE_ATTR_RO(i3c_scl_frequency);
482
483 static ssize_t i2c_scl_frequency_show(struct device *dev,
484 struct device_attribute *da,
485 char *buf)
486 {
487 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
488 ssize_t ret;
489
490 i3c_bus_normaluse_lock(i3cbus);
491 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
492 i3c_bus_normaluse_unlock(i3cbus);
493
494 return ret;
495 }
496 static DEVICE_ATTR_RO(i2c_scl_frequency);
497
498 static struct attribute *i3c_masterdev_attrs[] = {
499 &dev_attr_mode.attr,
500 &dev_attr_current_master.attr,
501 &dev_attr_i3c_scl_frequency.attr,
502 &dev_attr_i2c_scl_frequency.attr,
503 &dev_attr_bcr.attr,
504 &dev_attr_dcr.attr,
505 &dev_attr_pid.attr,
506 &dev_attr_dynamic_address.attr,
507 &dev_attr_hdrcap.attr,
508 NULL,
509 };
510 ATTRIBUTE_GROUPS(i3c_masterdev);
511
512 static void i3c_masterdev_release(struct device *dev)
513 {
514 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
515 struct i3c_bus *bus = dev_to_i3cbus(dev);
516
517 if (master->wq)
518 destroy_workqueue(master->wq);
519
520 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
521 i3c_bus_cleanup(bus);
522
523 of_node_put(dev->of_node);
524 }
525
526 static const struct device_type i3c_masterdev_type = {
527 .groups = i3c_masterdev_groups,
528 };
529
530 int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
531 unsigned long max_i2c_scl_rate)
532 {
533 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
534
535 i3cbus->mode = mode;
536
537 switch (i3cbus->mode) {
538 case I3C_BUS_MODE_PURE:
539 if (!i3cbus->scl_rate.i3c)
540 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
541 break;
542 case I3C_BUS_MODE_MIXED_FAST:
543 case I3C_BUS_MODE_MIXED_LIMITED:
544 if (!i3cbus->scl_rate.i3c)
545 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
546 if (!i3cbus->scl_rate.i2c)
547 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
548 break;
549 case I3C_BUS_MODE_MIXED_SLOW:
550 if (!i3cbus->scl_rate.i2c)
551 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
552 if (!i3cbus->scl_rate.i3c ||
553 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
554 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
555 break;
556 default:
557 return -EINVAL;
558 }
559
560 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
561 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
562
563
564
565
566
567 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
568 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
569 return -EINVAL;
570
571 return 0;
572 }
573
574 static struct i3c_master_controller *
575 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
576 {
577 return container_of(adap, struct i3c_master_controller, i2c);
578 }
579
580 static struct i2c_adapter *
581 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
582 {
583 return &master->i2c;
584 }
585
586 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
587 {
588 kfree(dev);
589 }
590
591 static struct i2c_dev_desc *
592 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
593 const struct i2c_dev_boardinfo *boardinfo)
594 {
595 struct i2c_dev_desc *dev;
596
597 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
598 if (!dev)
599 return ERR_PTR(-ENOMEM);
600
601 dev->common.master = master;
602 dev->boardinfo = boardinfo;
603 dev->addr = boardinfo->base.addr;
604 dev->lvr = boardinfo->lvr;
605
606 return dev;
607 }
608
609 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
610 u16 payloadlen)
611 {
612 dest->addr = addr;
613 dest->payload.len = payloadlen;
614 if (payloadlen)
615 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
616 else
617 dest->payload.data = NULL;
618
619 return dest->payload.data;
620 }
621
622 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
623 {
624 kfree(dest->payload.data);
625 }
626
627 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
628 struct i3c_ccc_cmd_dest *dests,
629 unsigned int ndests)
630 {
631 cmd->rnw = rnw ? 1 : 0;
632 cmd->id = id;
633 cmd->dests = dests;
634 cmd->ndests = ndests;
635 cmd->err = I3C_ERROR_UNKNOWN;
636 }
637
638 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
639 struct i3c_ccc_cmd *cmd)
640 {
641 int ret;
642
643 if (!cmd || !master)
644 return -EINVAL;
645
646 if (WARN_ON(master->init_done &&
647 !rwsem_is_locked(&master->bus.lock)))
648 return -EINVAL;
649
650 if (!master->ops->send_ccc_cmd)
651 return -ENOTSUPP;
652
653 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
654 return -EINVAL;
655
656 if (master->ops->supports_ccc_cmd &&
657 !master->ops->supports_ccc_cmd(master, cmd))
658 return -ENOTSUPP;
659
660 ret = master->ops->send_ccc_cmd(master, cmd);
661 if (ret) {
662 if (cmd->err != I3C_ERROR_UNKNOWN)
663 return cmd->err;
664
665 return ret;
666 }
667
668 return 0;
669 }
670
671 static struct i2c_dev_desc *
672 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
673 u16 addr)
674 {
675 struct i2c_dev_desc *dev;
676
677 i3c_bus_for_each_i2cdev(&master->bus, dev) {
678 if (dev->boardinfo->base.addr == addr)
679 return dev;
680 }
681
682 return NULL;
683 }
684
685
686
687
688
689
690
691
692
693
694
695 int i3c_master_get_free_addr(struct i3c_master_controller *master,
696 u8 start_addr)
697 {
698 return i3c_bus_get_free_addr(&master->bus, start_addr);
699 }
700 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
701
702 static void i3c_device_release(struct device *dev)
703 {
704 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
705
706 WARN_ON(i3cdev->desc);
707
708 of_node_put(i3cdev->dev.of_node);
709 kfree(i3cdev);
710 }
711
712 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
713 {
714 kfree(dev);
715 }
716
717 static struct i3c_dev_desc *
718 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
719 const struct i3c_device_info *info)
720 {
721 struct i3c_dev_desc *dev;
722
723 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
724 if (!dev)
725 return ERR_PTR(-ENOMEM);
726
727 dev->common.master = master;
728 dev->info = *info;
729 mutex_init(&dev->ibi_lock);
730
731 return dev;
732 }
733
734 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
735 u8 addr)
736 {
737 enum i3c_addr_slot_status addrstat;
738 struct i3c_ccc_cmd_dest dest;
739 struct i3c_ccc_cmd cmd;
740 int ret;
741
742 if (!master)
743 return -EINVAL;
744
745 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
746 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
747 return -EINVAL;
748
749 i3c_ccc_cmd_dest_init(&dest, addr, 0);
750 i3c_ccc_cmd_init(&cmd, false,
751 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
752 &dest, 1);
753 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
754 i3c_ccc_cmd_dest_cleanup(&dest);
755
756 return ret;
757 }
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
776 {
777 struct i3c_ccc_cmd_dest dest;
778 struct i3c_ccc_cmd cmd;
779 int ret;
780
781 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
782 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
783 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
784 i3c_ccc_cmd_dest_cleanup(&dest);
785
786 return ret;
787 }
788 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
789
790 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
791 u8 addr, bool enable, u8 evts)
792 {
793 struct i3c_ccc_events *events;
794 struct i3c_ccc_cmd_dest dest;
795 struct i3c_ccc_cmd cmd;
796 int ret;
797
798 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
799 if (!events)
800 return -ENOMEM;
801
802 events->events = evts;
803 i3c_ccc_cmd_init(&cmd, false,
804 enable ?
805 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
806 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
807 &dest, 1);
808 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
809 i3c_ccc_cmd_dest_cleanup(&dest);
810
811 return ret;
812 }
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
829 u8 evts)
830 {
831 return i3c_master_enec_disec_locked(master, addr, false, evts);
832 }
833 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
850 u8 evts)
851 {
852 return i3c_master_enec_disec_locked(master, addr, true, evts);
853 }
854 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
876 {
877 struct i3c_ccc_defslvs *defslvs;
878 struct i3c_ccc_dev_desc *desc;
879 struct i3c_ccc_cmd_dest dest;
880 struct i3c_dev_desc *i3cdev;
881 struct i2c_dev_desc *i2cdev;
882 struct i3c_ccc_cmd cmd;
883 struct i3c_bus *bus;
884 bool send = false;
885 int ndevs = 0, ret;
886
887 if (!master)
888 return -EINVAL;
889
890 bus = i3c_master_get_bus(master);
891 i3c_bus_for_each_i3cdev(bus, i3cdev) {
892 ndevs++;
893
894 if (i3cdev == master->this)
895 continue;
896
897 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
898 I3C_BCR_I3C_MASTER)
899 send = true;
900 }
901
902
903 if (!send)
904 return 0;
905
906 i3c_bus_for_each_i2cdev(bus, i2cdev)
907 ndevs++;
908
909 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
910 struct_size(defslvs, slaves,
911 ndevs - 1));
912 if (!defslvs)
913 return -ENOMEM;
914
915 defslvs->count = ndevs;
916 defslvs->master.bcr = master->this->info.bcr;
917 defslvs->master.dcr = master->this->info.dcr;
918 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
919 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
920
921 desc = defslvs->slaves;
922 i3c_bus_for_each_i2cdev(bus, i2cdev) {
923 desc->lvr = i2cdev->lvr;
924 desc->static_addr = i2cdev->addr << 1;
925 desc++;
926 }
927
928 i3c_bus_for_each_i3cdev(bus, i3cdev) {
929
930 if (i3cdev == master->this)
931 continue;
932
933 desc->bcr = i3cdev->info.bcr;
934 desc->dcr = i3cdev->info.dcr;
935 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
936 desc->static_addr = i3cdev->info.static_addr << 1;
937 desc++;
938 }
939
940 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
941 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
942 i3c_ccc_cmd_dest_cleanup(&dest);
943
944 return ret;
945 }
946 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
947
948 static int i3c_master_setda_locked(struct i3c_master_controller *master,
949 u8 oldaddr, u8 newaddr, bool setdasa)
950 {
951 struct i3c_ccc_cmd_dest dest;
952 struct i3c_ccc_setda *setda;
953 struct i3c_ccc_cmd cmd;
954 int ret;
955
956 if (!oldaddr || !newaddr)
957 return -EINVAL;
958
959 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
960 if (!setda)
961 return -ENOMEM;
962
963 setda->addr = newaddr << 1;
964 i3c_ccc_cmd_init(&cmd, false,
965 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
966 &dest, 1);
967 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
968 i3c_ccc_cmd_dest_cleanup(&dest);
969
970 return ret;
971 }
972
973 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
974 u8 static_addr, u8 dyn_addr)
975 {
976 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
977 }
978
979 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
980 u8 oldaddr, u8 newaddr)
981 {
982 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
983 }
984
985 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
986 struct i3c_device_info *info)
987 {
988 struct i3c_ccc_cmd_dest dest;
989 unsigned int expected_len;
990 struct i3c_ccc_mrl *mrl;
991 struct i3c_ccc_cmd cmd;
992 int ret;
993
994 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
995 if (!mrl)
996 return -ENOMEM;
997
998
999
1000
1001
1002 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1003 dest.payload.len -= 1;
1004
1005 expected_len = dest.payload.len;
1006 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1007 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1008 if (ret)
1009 goto out;
1010
1011 if (dest.payload.len != expected_len) {
1012 ret = -EIO;
1013 goto out;
1014 }
1015
1016 info->max_read_len = be16_to_cpu(mrl->read_len);
1017
1018 if (info->bcr & I3C_BCR_IBI_PAYLOAD)
1019 info->max_ibi_len = mrl->ibi_len;
1020
1021 out:
1022 i3c_ccc_cmd_dest_cleanup(&dest);
1023
1024 return ret;
1025 }
1026
1027 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1028 struct i3c_device_info *info)
1029 {
1030 struct i3c_ccc_cmd_dest dest;
1031 struct i3c_ccc_mwl *mwl;
1032 struct i3c_ccc_cmd cmd;
1033 int ret;
1034
1035 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1036 if (!mwl)
1037 return -ENOMEM;
1038
1039 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1040 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1041 if (ret)
1042 goto out;
1043
1044 if (dest.payload.len != sizeof(*mwl)) {
1045 ret = -EIO;
1046 goto out;
1047 }
1048
1049 info->max_write_len = be16_to_cpu(mwl->len);
1050
1051 out:
1052 i3c_ccc_cmd_dest_cleanup(&dest);
1053
1054 return ret;
1055 }
1056
1057 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1058 struct i3c_device_info *info)
1059 {
1060 struct i3c_ccc_getmxds *getmaxds;
1061 struct i3c_ccc_cmd_dest dest;
1062 struct i3c_ccc_cmd cmd;
1063 int ret;
1064
1065 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1066 sizeof(*getmaxds));
1067 if (!getmaxds)
1068 return -ENOMEM;
1069
1070 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1071 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1072 if (ret)
1073 goto out;
1074
1075 if (dest.payload.len != 2 && dest.payload.len != 5) {
1076 ret = -EIO;
1077 goto out;
1078 }
1079
1080 info->max_read_ds = getmaxds->maxrd;
1081 info->max_write_ds = getmaxds->maxwr;
1082 if (dest.payload.len == 5)
1083 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1084 ((u32)getmaxds->maxrdturn[1] << 8) |
1085 ((u32)getmaxds->maxrdturn[2] << 16);
1086
1087 out:
1088 i3c_ccc_cmd_dest_cleanup(&dest);
1089
1090 return ret;
1091 }
1092
1093 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1094 struct i3c_device_info *info)
1095 {
1096 struct i3c_ccc_gethdrcap *gethdrcap;
1097 struct i3c_ccc_cmd_dest dest;
1098 struct i3c_ccc_cmd cmd;
1099 int ret;
1100
1101 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1102 sizeof(*gethdrcap));
1103 if (!gethdrcap)
1104 return -ENOMEM;
1105
1106 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1107 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1108 if (ret)
1109 goto out;
1110
1111 if (dest.payload.len != 1) {
1112 ret = -EIO;
1113 goto out;
1114 }
1115
1116 info->hdr_cap = gethdrcap->modes;
1117
1118 out:
1119 i3c_ccc_cmd_dest_cleanup(&dest);
1120
1121 return ret;
1122 }
1123
1124 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1125 struct i3c_device_info *info)
1126 {
1127 struct i3c_ccc_getpid *getpid;
1128 struct i3c_ccc_cmd_dest dest;
1129 struct i3c_ccc_cmd cmd;
1130 int ret, i;
1131
1132 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1133 if (!getpid)
1134 return -ENOMEM;
1135
1136 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1137 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1138 if (ret)
1139 goto out;
1140
1141 info->pid = 0;
1142 for (i = 0; i < sizeof(getpid->pid); i++) {
1143 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1144
1145 info->pid |= (u64)getpid->pid[i] << sft;
1146 }
1147
1148 out:
1149 i3c_ccc_cmd_dest_cleanup(&dest);
1150
1151 return ret;
1152 }
1153
1154 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1155 struct i3c_device_info *info)
1156 {
1157 struct i3c_ccc_getbcr *getbcr;
1158 struct i3c_ccc_cmd_dest dest;
1159 struct i3c_ccc_cmd cmd;
1160 int ret;
1161
1162 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1163 if (!getbcr)
1164 return -ENOMEM;
1165
1166 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1167 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1168 if (ret)
1169 goto out;
1170
1171 info->bcr = getbcr->bcr;
1172
1173 out:
1174 i3c_ccc_cmd_dest_cleanup(&dest);
1175
1176 return ret;
1177 }
1178
1179 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1180 struct i3c_device_info *info)
1181 {
1182 struct i3c_ccc_getdcr *getdcr;
1183 struct i3c_ccc_cmd_dest dest;
1184 struct i3c_ccc_cmd cmd;
1185 int ret;
1186
1187 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1188 if (!getdcr)
1189 return -ENOMEM;
1190
1191 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1192 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1193 if (ret)
1194 goto out;
1195
1196 info->dcr = getdcr->dcr;
1197
1198 out:
1199 i3c_ccc_cmd_dest_cleanup(&dest);
1200
1201 return ret;
1202 }
1203
1204 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1205 {
1206 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1207 enum i3c_addr_slot_status slot_status;
1208 int ret;
1209
1210 if (!dev->info.dyn_addr)
1211 return -EINVAL;
1212
1213 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1214 dev->info.dyn_addr);
1215 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1216 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1217 return -EINVAL;
1218
1219 ret = i3c_master_getpid_locked(master, &dev->info);
1220 if (ret)
1221 return ret;
1222
1223 ret = i3c_master_getbcr_locked(master, &dev->info);
1224 if (ret)
1225 return ret;
1226
1227 ret = i3c_master_getdcr_locked(master, &dev->info);
1228 if (ret)
1229 return ret;
1230
1231 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1232 ret = i3c_master_getmxds_locked(master, &dev->info);
1233 if (ret)
1234 return ret;
1235 }
1236
1237 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1238 dev->info.max_ibi_len = 1;
1239
1240 i3c_master_getmrl_locked(master, &dev->info);
1241 i3c_master_getmwl_locked(master, &dev->info);
1242
1243 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1244 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1245 if (ret)
1246 return ret;
1247 }
1248
1249 return 0;
1250 }
1251
1252 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1253 {
1254 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1255
1256 if (dev->info.static_addr)
1257 i3c_bus_set_addr_slot_status(&master->bus,
1258 dev->info.static_addr,
1259 I3C_ADDR_SLOT_FREE);
1260
1261 if (dev->info.dyn_addr)
1262 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1263 I3C_ADDR_SLOT_FREE);
1264
1265 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1266 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1267 I3C_ADDR_SLOT_FREE);
1268 }
1269
1270 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1271 {
1272 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1273 enum i3c_addr_slot_status status;
1274
1275 if (!dev->info.static_addr && !dev->info.dyn_addr)
1276 return 0;
1277
1278 if (dev->info.static_addr) {
1279 status = i3c_bus_get_addr_slot_status(&master->bus,
1280 dev->info.static_addr);
1281 if (status != I3C_ADDR_SLOT_FREE)
1282 return -EBUSY;
1283
1284 i3c_bus_set_addr_slot_status(&master->bus,
1285 dev->info.static_addr,
1286 I3C_ADDR_SLOT_I3C_DEV);
1287 }
1288
1289
1290
1291
1292
1293
1294 if (dev->info.dyn_addr &&
1295 (!dev->boardinfo ||
1296 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1297 status = i3c_bus_get_addr_slot_status(&master->bus,
1298 dev->info.dyn_addr);
1299 if (status != I3C_ADDR_SLOT_FREE)
1300 goto err_release_static_addr;
1301
1302 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1303 I3C_ADDR_SLOT_I3C_DEV);
1304 }
1305
1306 return 0;
1307
1308 err_release_static_addr:
1309 if (dev->info.static_addr)
1310 i3c_bus_set_addr_slot_status(&master->bus,
1311 dev->info.static_addr,
1312 I3C_ADDR_SLOT_FREE);
1313
1314 return -EBUSY;
1315 }
1316
1317 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1318 struct i3c_dev_desc *dev)
1319 {
1320 int ret;
1321
1322
1323
1324
1325
1326 if (!dev->info.static_addr && !dev->info.dyn_addr)
1327 return 0;
1328
1329 ret = i3c_master_get_i3c_addrs(dev);
1330 if (ret)
1331 return ret;
1332
1333
1334 if (master->this != dev && master->ops->attach_i3c_dev) {
1335 ret = master->ops->attach_i3c_dev(dev);
1336 if (ret) {
1337 i3c_master_put_i3c_addrs(dev);
1338 return ret;
1339 }
1340 }
1341
1342 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1343
1344 return 0;
1345 }
1346
1347 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1348 u8 old_dyn_addr)
1349 {
1350 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1351 enum i3c_addr_slot_status status;
1352 int ret;
1353
1354 if (dev->info.dyn_addr != old_dyn_addr) {
1355 status = i3c_bus_get_addr_slot_status(&master->bus,
1356 dev->info.dyn_addr);
1357 if (status != I3C_ADDR_SLOT_FREE)
1358 return -EBUSY;
1359 i3c_bus_set_addr_slot_status(&master->bus,
1360 dev->info.dyn_addr,
1361 I3C_ADDR_SLOT_I3C_DEV);
1362 }
1363
1364 if (master->ops->reattach_i3c_dev) {
1365 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1366 if (ret) {
1367 i3c_master_put_i3c_addrs(dev);
1368 return ret;
1369 }
1370 }
1371
1372 return 0;
1373 }
1374
1375 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1376 {
1377 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1378
1379
1380 if (master->this != dev && master->ops->detach_i3c_dev)
1381 master->ops->detach_i3c_dev(dev);
1382
1383 i3c_master_put_i3c_addrs(dev);
1384 list_del(&dev->common.node);
1385 }
1386
1387 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1388 struct i2c_dev_desc *dev)
1389 {
1390 int ret;
1391
1392 if (master->ops->attach_i2c_dev) {
1393 ret = master->ops->attach_i2c_dev(dev);
1394 if (ret)
1395 return ret;
1396 }
1397
1398 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1399
1400 return 0;
1401 }
1402
1403 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1404 {
1405 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1406
1407 list_del(&dev->common.node);
1408
1409 if (master->ops->detach_i2c_dev)
1410 master->ops->detach_i2c_dev(dev);
1411 }
1412
1413 static void i3c_master_pre_assign_dyn_addr(struct i3c_dev_desc *dev)
1414 {
1415 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1416 int ret;
1417
1418 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
1419 !dev->boardinfo->static_addr)
1420 return;
1421
1422 ret = i3c_master_setdasa_locked(master, dev->info.static_addr,
1423 dev->boardinfo->init_dyn_addr);
1424 if (ret)
1425 return;
1426
1427 dev->info.dyn_addr = dev->boardinfo->init_dyn_addr;
1428 ret = i3c_master_reattach_i3c_dev(dev, 0);
1429 if (ret)
1430 goto err_rstdaa;
1431
1432 ret = i3c_master_retrieve_dev_info(dev);
1433 if (ret)
1434 goto err_rstdaa;
1435
1436 return;
1437
1438 err_rstdaa:
1439 i3c_master_rstdaa_locked(master, dev->boardinfo->init_dyn_addr);
1440 }
1441
1442 static void
1443 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1444 {
1445 struct i3c_dev_desc *desc;
1446 int ret;
1447
1448 if (!master->init_done)
1449 return;
1450
1451 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1452 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1453 continue;
1454
1455 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1456 if (!desc->dev)
1457 continue;
1458
1459 desc->dev->bus = &master->bus;
1460 desc->dev->desc = desc;
1461 desc->dev->dev.parent = &master->dev;
1462 desc->dev->dev.type = &i3c_device_type;
1463 desc->dev->dev.bus = &i3c_bus_type;
1464 desc->dev->dev.release = i3c_device_release;
1465 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1466 desc->info.pid);
1467
1468 if (desc->boardinfo)
1469 desc->dev->dev.of_node = desc->boardinfo->of_node;
1470
1471 ret = device_register(&desc->dev->dev);
1472 if (ret)
1473 dev_err(&master->dev,
1474 "Failed to add I3C device (err = %d)\n", ret);
1475 }
1476 }
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493 int i3c_master_do_daa(struct i3c_master_controller *master)
1494 {
1495 int ret;
1496
1497 i3c_bus_maintenance_lock(&master->bus);
1498 ret = master->ops->do_daa(master);
1499 i3c_bus_maintenance_unlock(&master->bus);
1500
1501 if (ret)
1502 return ret;
1503
1504 i3c_bus_normaluse_lock(&master->bus);
1505 i3c_master_register_new_i3c_devs(master);
1506 i3c_bus_normaluse_unlock(&master->bus);
1507
1508 return 0;
1509 }
1510 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536 int i3c_master_set_info(struct i3c_master_controller *master,
1537 const struct i3c_device_info *info)
1538 {
1539 struct i3c_dev_desc *i3cdev;
1540 int ret;
1541
1542 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1543 return -EINVAL;
1544
1545 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1546 master->secondary)
1547 return -EINVAL;
1548
1549 if (master->this)
1550 return -EINVAL;
1551
1552 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1553 if (IS_ERR(i3cdev))
1554 return PTR_ERR(i3cdev);
1555
1556 master->this = i3cdev;
1557 master->bus.cur_master = master->this;
1558
1559 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1560 if (ret)
1561 goto err_free_dev;
1562
1563 return 0;
1564
1565 err_free_dev:
1566 i3c_master_free_i3c_dev(i3cdev);
1567
1568 return ret;
1569 }
1570 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1571
1572 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1573 {
1574 struct i3c_dev_desc *i3cdev, *i3ctmp;
1575 struct i2c_dev_desc *i2cdev, *i2ctmp;
1576
1577 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1578 common.node) {
1579 i3c_master_detach_i3c_dev(i3cdev);
1580
1581 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1582 i3c_bus_set_addr_slot_status(&master->bus,
1583 i3cdev->boardinfo->init_dyn_addr,
1584 I3C_ADDR_SLOT_FREE);
1585
1586 i3c_master_free_i3c_dev(i3cdev);
1587 }
1588
1589 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1590 common.node) {
1591 i3c_master_detach_i2c_dev(i2cdev);
1592 i3c_bus_set_addr_slot_status(&master->bus,
1593 i2cdev->addr,
1594 I3C_ADDR_SLOT_FREE);
1595 i3c_master_free_i2c_dev(i2cdev);
1596 }
1597 }
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629 static int i3c_master_bus_init(struct i3c_master_controller *master)
1630 {
1631 enum i3c_addr_slot_status status;
1632 struct i2c_dev_boardinfo *i2cboardinfo;
1633 struct i3c_dev_boardinfo *i3cboardinfo;
1634 struct i3c_dev_desc *i3cdev;
1635 struct i2c_dev_desc *i2cdev;
1636 int ret;
1637
1638
1639
1640
1641
1642 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1643 status = i3c_bus_get_addr_slot_status(&master->bus,
1644 i2cboardinfo->base.addr);
1645 if (status != I3C_ADDR_SLOT_FREE) {
1646 ret = -EBUSY;
1647 goto err_detach_devs;
1648 }
1649
1650 i3c_bus_set_addr_slot_status(&master->bus,
1651 i2cboardinfo->base.addr,
1652 I3C_ADDR_SLOT_I2C_DEV);
1653
1654 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1655 if (IS_ERR(i2cdev)) {
1656 ret = PTR_ERR(i2cdev);
1657 goto err_detach_devs;
1658 }
1659
1660 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1661 if (ret) {
1662 i3c_master_free_i2c_dev(i2cdev);
1663 goto err_detach_devs;
1664 }
1665 }
1666 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1667 struct i3c_device_info info = {
1668 .static_addr = i3cboardinfo->static_addr,
1669 };
1670
1671 if (i3cboardinfo->init_dyn_addr) {
1672 status = i3c_bus_get_addr_slot_status(&master->bus,
1673 i3cboardinfo->init_dyn_addr);
1674 if (status != I3C_ADDR_SLOT_FREE) {
1675 ret = -EBUSY;
1676 goto err_detach_devs;
1677 }
1678 }
1679
1680 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1681 if (IS_ERR(i3cdev)) {
1682 ret = PTR_ERR(i3cdev);
1683 goto err_detach_devs;
1684 }
1685
1686 i3cdev->boardinfo = i3cboardinfo;
1687
1688 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1689 if (ret) {
1690 i3c_master_free_i3c_dev(i3cdev);
1691 goto err_detach_devs;
1692 }
1693 }
1694
1695
1696
1697
1698
1699 ret = master->ops->bus_init(master);
1700 if (ret)
1701 goto err_detach_devs;
1702
1703
1704
1705
1706
1707 if (!master->this) {
1708 dev_err(&master->dev,
1709 "master_set_info() was not called in ->bus_init()\n");
1710 ret = -EINVAL;
1711 goto err_bus_cleanup;
1712 }
1713
1714
1715
1716
1717
1718 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1719 if (ret && ret != I3C_ERROR_M2)
1720 goto err_bus_cleanup;
1721
1722
1723 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1724 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1725 I3C_CCC_EVENT_HJ);
1726 if (ret && ret != I3C_ERROR_M2)
1727 goto err_bus_cleanup;
1728
1729
1730
1731
1732
1733 i3c_bus_for_each_i3cdev(&master->bus, i3cdev)
1734 i3c_master_pre_assign_dyn_addr(i3cdev);
1735
1736 ret = i3c_master_do_daa(master);
1737 if (ret)
1738 goto err_rstdaa;
1739
1740 return 0;
1741
1742 err_rstdaa:
1743 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1744
1745 err_bus_cleanup:
1746 if (master->ops->bus_cleanup)
1747 master->ops->bus_cleanup(master);
1748
1749 err_detach_devs:
1750 i3c_master_detach_free_devs(master);
1751
1752 return ret;
1753 }
1754
1755 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1756 {
1757 if (master->ops->bus_cleanup)
1758 master->ops->bus_cleanup(master);
1759
1760 i3c_master_detach_free_devs(master);
1761 }
1762
1763 static struct i3c_dev_desc *
1764 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1765 {
1766 struct i3c_master_controller *master = refdev->common.master;
1767 struct i3c_dev_desc *i3cdev;
1768
1769 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1770 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1771 return i3cdev;
1772 }
1773
1774 return NULL;
1775 }
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1794 u8 addr)
1795 {
1796 struct i3c_device_info info = { .dyn_addr = addr };
1797 struct i3c_dev_desc *newdev, *olddev;
1798 u8 old_dyn_addr = addr, expected_dyn_addr;
1799 struct i3c_ibi_setup ibireq = { };
1800 bool enable_ibi = false;
1801 int ret;
1802
1803 if (!master)
1804 return -EINVAL;
1805
1806 newdev = i3c_master_alloc_i3c_dev(master, &info);
1807 if (IS_ERR(newdev))
1808 return PTR_ERR(newdev);
1809
1810 ret = i3c_master_attach_i3c_dev(master, newdev);
1811 if (ret)
1812 goto err_free_dev;
1813
1814 ret = i3c_master_retrieve_dev_info(newdev);
1815 if (ret)
1816 goto err_detach_dev;
1817
1818 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1819 if (olddev) {
1820 newdev->boardinfo = olddev->boardinfo;
1821 newdev->info.static_addr = olddev->info.static_addr;
1822 newdev->dev = olddev->dev;
1823 if (newdev->dev)
1824 newdev->dev->desc = newdev;
1825
1826
1827
1828
1829
1830
1831
1832 mutex_lock(&olddev->ibi_lock);
1833 if (olddev->ibi) {
1834 ibireq.handler = olddev->ibi->handler;
1835 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1836 ibireq.num_slots = olddev->ibi->num_slots;
1837
1838 if (olddev->ibi->enabled) {
1839 enable_ibi = true;
1840 i3c_dev_disable_ibi_locked(olddev);
1841 }
1842
1843 i3c_dev_free_ibi_locked(olddev);
1844 }
1845 mutex_unlock(&olddev->ibi_lock);
1846
1847 old_dyn_addr = olddev->info.dyn_addr;
1848
1849 i3c_master_detach_i3c_dev(olddev);
1850 i3c_master_free_i3c_dev(olddev);
1851 }
1852
1853 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1854 if (ret)
1855 goto err_detach_dev;
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1868 expected_dyn_addr = old_dyn_addr;
1869 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1870 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1871 else
1872 expected_dyn_addr = newdev->info.dyn_addr;
1873
1874 if (newdev->info.dyn_addr != expected_dyn_addr) {
1875
1876
1877
1878
1879 ret = i3c_master_setnewda_locked(master,
1880 newdev->info.dyn_addr,
1881 expected_dyn_addr);
1882 if (!ret) {
1883 old_dyn_addr = newdev->info.dyn_addr;
1884 newdev->info.dyn_addr = expected_dyn_addr;
1885 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1886 } else {
1887 dev_err(&master->dev,
1888 "Failed to assign reserved/old address to device %d%llx",
1889 master->bus.id, newdev->info.pid);
1890 }
1891 }
1892
1893
1894
1895
1896
1897
1898
1899
1900 if (ibireq.handler) {
1901 mutex_lock(&newdev->ibi_lock);
1902 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1903 if (ret) {
1904 dev_err(&master->dev,
1905 "Failed to request IBI on device %d-%llx",
1906 master->bus.id, newdev->info.pid);
1907 } else if (enable_ibi) {
1908 ret = i3c_dev_enable_ibi_locked(newdev);
1909 if (ret)
1910 dev_err(&master->dev,
1911 "Failed to re-enable IBI on device %d-%llx",
1912 master->bus.id, newdev->info.pid);
1913 }
1914 mutex_unlock(&newdev->ibi_lock);
1915 }
1916
1917 return 0;
1918
1919 err_detach_dev:
1920 if (newdev->dev && newdev->dev->desc)
1921 newdev->dev->desc = NULL;
1922
1923 i3c_master_detach_i3c_dev(newdev);
1924
1925 err_free_dev:
1926 i3c_master_free_i3c_dev(newdev);
1927
1928 return ret;
1929 }
1930 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1931
1932 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1933
1934 static int
1935 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1936 struct device_node *node, u32 *reg)
1937 {
1938 struct i2c_dev_boardinfo *boardinfo;
1939 struct device *dev = &master->dev;
1940 int ret;
1941
1942 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
1943 if (!boardinfo)
1944 return -ENOMEM;
1945
1946 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
1947 if (ret)
1948 return ret;
1949
1950
1951
1952
1953
1954
1955 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
1956 dev_err(&master->dev, "I2C device with 10 bit address not supported.");
1957 return -ENOTSUPP;
1958 }
1959
1960
1961 boardinfo->lvr = reg[2];
1962
1963 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
1964 of_node_get(node);
1965
1966 return 0;
1967 }
1968
1969 static int
1970 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
1971 struct device_node *node, u32 *reg)
1972 {
1973 struct i3c_dev_boardinfo *boardinfo;
1974 struct device *dev = &master->dev;
1975 enum i3c_addr_slot_status addrstatus;
1976 u32 init_dyn_addr = 0;
1977
1978 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
1979 if (!boardinfo)
1980 return -ENOMEM;
1981
1982 if (reg[0]) {
1983 if (reg[0] > I3C_MAX_ADDR)
1984 return -EINVAL;
1985
1986 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
1987 reg[0]);
1988 if (addrstatus != I3C_ADDR_SLOT_FREE)
1989 return -EINVAL;
1990 }
1991
1992 boardinfo->static_addr = reg[0];
1993
1994 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
1995 if (init_dyn_addr > I3C_MAX_ADDR)
1996 return -EINVAL;
1997
1998 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
1999 init_dyn_addr);
2000 if (addrstatus != I3C_ADDR_SLOT_FREE)
2001 return -EINVAL;
2002 }
2003
2004 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2005
2006 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2007 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2008 return -EINVAL;
2009
2010 boardinfo->init_dyn_addr = init_dyn_addr;
2011 boardinfo->of_node = of_node_get(node);
2012 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2013
2014 return 0;
2015 }
2016
2017 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2018 struct device_node *node)
2019 {
2020 u32 reg[3];
2021 int ret;
2022
2023 if (!master || !node)
2024 return -EINVAL;
2025
2026 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2027 if (ret)
2028 return ret;
2029
2030
2031
2032
2033
2034 if (!reg[1])
2035 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2036 else
2037 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2038
2039 return ret;
2040 }
2041
2042 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2043 {
2044 struct device *dev = &master->dev;
2045 struct device_node *i3cbus_np = dev->of_node;
2046 struct device_node *node;
2047 int ret;
2048 u32 val;
2049
2050 if (!i3cbus_np)
2051 return 0;
2052
2053 for_each_available_child_of_node(i3cbus_np, node) {
2054 ret = of_i3c_master_add_dev(master, node);
2055 if (ret) {
2056 of_node_put(node);
2057 return ret;
2058 }
2059 }
2060
2061
2062
2063
2064
2065
2066 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2067 master->bus.scl_rate.i2c = val;
2068
2069 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2070 master->bus.scl_rate.i3c = val;
2071
2072 return 0;
2073 }
2074
2075 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2076 struct i2c_msg *xfers, int nxfers)
2077 {
2078 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2079 struct i2c_dev_desc *dev;
2080 int i, ret;
2081 u16 addr;
2082
2083 if (!xfers || !master || nxfers <= 0)
2084 return -EINVAL;
2085
2086 if (!master->ops->i2c_xfers)
2087 return -ENOTSUPP;
2088
2089
2090 addr = xfers[0].addr;
2091 for (i = 1; i < nxfers; i++) {
2092 if (addr != xfers[i].addr)
2093 return -ENOTSUPP;
2094 }
2095
2096 i3c_bus_normaluse_lock(&master->bus);
2097 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2098 if (!dev)
2099 ret = -ENOENT;
2100 else
2101 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2102 i3c_bus_normaluse_unlock(&master->bus);
2103
2104 return ret ? ret : nxfers;
2105 }
2106
2107 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2108 {
2109 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2110 }
2111
2112 static const struct i2c_algorithm i3c_master_i2c_algo = {
2113 .master_xfer = i3c_master_i2c_adapter_xfer,
2114 .functionality = i3c_master_i2c_funcs,
2115 };
2116
2117 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2118 {
2119 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2120 struct i2c_dev_desc *i2cdev;
2121 int ret;
2122
2123 adap->dev.parent = master->dev.parent;
2124 adap->owner = master->dev.parent->driver->owner;
2125 adap->algo = &i3c_master_i2c_algo;
2126 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2127
2128
2129 adap->timeout = 1000;
2130 adap->retries = 3;
2131
2132 ret = i2c_add_adapter(adap);
2133 if (ret)
2134 return ret;
2135
2136
2137
2138
2139
2140 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2141 i2cdev->dev = i2c_new_device(adap, &i2cdev->boardinfo->base);
2142
2143 return 0;
2144 }
2145
2146 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2147 {
2148 struct i2c_dev_desc *i2cdev;
2149
2150 i2c_del_adapter(&master->i2c);
2151
2152 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2153 i2cdev->dev = NULL;
2154 }
2155
2156 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2157 {
2158 struct i3c_dev_desc *i3cdev;
2159
2160 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2161 if (!i3cdev->dev)
2162 continue;
2163
2164 i3cdev->dev->desc = NULL;
2165 if (device_is_registered(&i3cdev->dev->dev))
2166 device_unregister(&i3cdev->dev->dev);
2167 else
2168 put_device(&i3cdev->dev->dev);
2169 i3cdev->dev = NULL;
2170 }
2171 }
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2182 {
2183 atomic_inc(&dev->ibi->pending_ibis);
2184 queue_work(dev->common.master->wq, &slot->work);
2185 }
2186 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2187
2188 static void i3c_master_handle_ibi(struct work_struct *work)
2189 {
2190 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2191 work);
2192 struct i3c_dev_desc *dev = slot->dev;
2193 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2194 struct i3c_ibi_payload payload;
2195
2196 payload.data = slot->data;
2197 payload.len = slot->len;
2198
2199 if (dev->dev)
2200 dev->ibi->handler(dev->dev, &payload);
2201
2202 master->ops->recycle_ibi_slot(dev, slot);
2203 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2204 complete(&dev->ibi->all_ibis_handled);
2205 }
2206
2207 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2208 struct i3c_ibi_slot *slot)
2209 {
2210 slot->dev = dev;
2211 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2212 }
2213
2214 struct i3c_generic_ibi_slot {
2215 struct list_head node;
2216 struct i3c_ibi_slot base;
2217 };
2218
2219 struct i3c_generic_ibi_pool {
2220 spinlock_t lock;
2221 unsigned int num_slots;
2222 struct i3c_generic_ibi_slot *slots;
2223 void *payload_buf;
2224 struct list_head free_slots;
2225 struct list_head pending;
2226 };
2227
2228
2229
2230
2231
2232
2233
2234 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2235 {
2236 struct i3c_generic_ibi_slot *slot;
2237 unsigned int nslots = 0;
2238
2239 while (!list_empty(&pool->free_slots)) {
2240 slot = list_first_entry(&pool->free_slots,
2241 struct i3c_generic_ibi_slot, node);
2242 list_del(&slot->node);
2243 nslots++;
2244 }
2245
2246
2247
2248
2249
2250 WARN_ON(nslots != pool->num_slots);
2251
2252 kfree(pool->payload_buf);
2253 kfree(pool->slots);
2254 kfree(pool);
2255 }
2256 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267 struct i3c_generic_ibi_pool *
2268 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2269 const struct i3c_ibi_setup *req)
2270 {
2271 struct i3c_generic_ibi_pool *pool;
2272 struct i3c_generic_ibi_slot *slot;
2273 unsigned int i;
2274 int ret;
2275
2276 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2277 if (!pool)
2278 return ERR_PTR(-ENOMEM);
2279
2280 spin_lock_init(&pool->lock);
2281 INIT_LIST_HEAD(&pool->free_slots);
2282 INIT_LIST_HEAD(&pool->pending);
2283
2284 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2285 if (!pool->slots) {
2286 ret = -ENOMEM;
2287 goto err_free_pool;
2288 }
2289
2290 if (req->max_payload_len) {
2291 pool->payload_buf = kcalloc(req->num_slots,
2292 req->max_payload_len, GFP_KERNEL);
2293 if (!pool->payload_buf) {
2294 ret = -ENOMEM;
2295 goto err_free_pool;
2296 }
2297 }
2298
2299 for (i = 0; i < req->num_slots; i++) {
2300 slot = &pool->slots[i];
2301 i3c_master_init_ibi_slot(dev, &slot->base);
2302
2303 if (req->max_payload_len)
2304 slot->base.data = pool->payload_buf +
2305 (i * req->max_payload_len);
2306
2307 list_add_tail(&slot->node, &pool->free_slots);
2308 pool->num_slots++;
2309 }
2310
2311 return pool;
2312
2313 err_free_pool:
2314 i3c_generic_ibi_free_pool(pool);
2315 return ERR_PTR(ret);
2316 }
2317 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329 struct i3c_ibi_slot *
2330 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2331 {
2332 struct i3c_generic_ibi_slot *slot;
2333 unsigned long flags;
2334
2335 spin_lock_irqsave(&pool->lock, flags);
2336 slot = list_first_entry_or_null(&pool->free_slots,
2337 struct i3c_generic_ibi_slot, node);
2338 if (slot)
2339 list_del(&slot->node);
2340 spin_unlock_irqrestore(&pool->lock, flags);
2341
2342 return slot ? &slot->base : NULL;
2343 }
2344 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2355 struct i3c_ibi_slot *s)
2356 {
2357 struct i3c_generic_ibi_slot *slot;
2358 unsigned long flags;
2359
2360 if (!s)
2361 return;
2362
2363 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2364 spin_lock_irqsave(&pool->lock, flags);
2365 list_add_tail(&slot->node, &pool->free_slots);
2366 spin_unlock_irqrestore(&pool->lock, flags);
2367 }
2368 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2369
2370 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2371 {
2372 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2373 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2374 return -EINVAL;
2375
2376 if (ops->request_ibi &&
2377 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2378 !ops->recycle_ibi_slot))
2379 return -EINVAL;
2380
2381 return 0;
2382 }
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405 int i3c_master_register(struct i3c_master_controller *master,
2406 struct device *parent,
2407 const struct i3c_master_controller_ops *ops,
2408 bool secondary)
2409 {
2410 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2411 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2412 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2413 struct i2c_dev_boardinfo *i2cbi;
2414 int ret;
2415
2416
2417 if (secondary)
2418 return -ENOTSUPP;
2419
2420 ret = i3c_master_check_ops(ops);
2421 if (ret)
2422 return ret;
2423
2424 master->dev.parent = parent;
2425 master->dev.of_node = of_node_get(parent->of_node);
2426 master->dev.bus = &i3c_bus_type;
2427 master->dev.type = &i3c_masterdev_type;
2428 master->dev.release = i3c_masterdev_release;
2429 master->ops = ops;
2430 master->secondary = secondary;
2431 INIT_LIST_HEAD(&master->boardinfo.i2c);
2432 INIT_LIST_HEAD(&master->boardinfo.i3c);
2433
2434 ret = i3c_bus_init(i3cbus);
2435 if (ret)
2436 return ret;
2437
2438 device_initialize(&master->dev);
2439 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2440
2441 ret = of_populate_i3c_bus(master);
2442 if (ret)
2443 goto err_put_dev;
2444
2445 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2446 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2447 case I3C_LVR_I2C_INDEX(0):
2448 if (mode < I3C_BUS_MODE_MIXED_FAST)
2449 mode = I3C_BUS_MODE_MIXED_FAST;
2450 break;
2451 case I3C_LVR_I2C_INDEX(1):
2452 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2453 mode = I3C_BUS_MODE_MIXED_LIMITED;
2454 break;
2455 case I3C_LVR_I2C_INDEX(2):
2456 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2457 mode = I3C_BUS_MODE_MIXED_SLOW;
2458 break;
2459 default:
2460 ret = -EINVAL;
2461 goto err_put_dev;
2462 }
2463
2464 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2465 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2466 }
2467
2468 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2469 if (ret)
2470 goto err_put_dev;
2471
2472 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2473 if (!master->wq) {
2474 ret = -ENOMEM;
2475 goto err_put_dev;
2476 }
2477
2478 ret = i3c_master_bus_init(master);
2479 if (ret)
2480 goto err_put_dev;
2481
2482 ret = device_add(&master->dev);
2483 if (ret)
2484 goto err_cleanup_bus;
2485
2486
2487
2488
2489
2490 ret = i3c_master_i2c_adapter_init(master);
2491 if (ret)
2492 goto err_del_dev;
2493
2494
2495
2496
2497
2498 master->init_done = true;
2499 i3c_bus_normaluse_lock(&master->bus);
2500 i3c_master_register_new_i3c_devs(master);
2501 i3c_bus_normaluse_unlock(&master->bus);
2502
2503 return 0;
2504
2505 err_del_dev:
2506 device_del(&master->dev);
2507
2508 err_cleanup_bus:
2509 i3c_master_bus_cleanup(master);
2510
2511 err_put_dev:
2512 put_device(&master->dev);
2513
2514 return ret;
2515 }
2516 EXPORT_SYMBOL_GPL(i3c_master_register);
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526 int i3c_master_unregister(struct i3c_master_controller *master)
2527 {
2528 i3c_master_i2c_adapter_cleanup(master);
2529 i3c_master_unregister_i3c_devs(master);
2530 i3c_master_bus_cleanup(master);
2531 device_unregister(&master->dev);
2532
2533 return 0;
2534 }
2535 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2536
2537 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2538 struct i3c_priv_xfer *xfers,
2539 int nxfers)
2540 {
2541 struct i3c_master_controller *master;
2542
2543 if (!dev)
2544 return -ENOENT;
2545
2546 master = i3c_dev_get_master(dev);
2547 if (!master || !xfers)
2548 return -EINVAL;
2549
2550 if (!master->ops->priv_xfers)
2551 return -ENOTSUPP;
2552
2553 return master->ops->priv_xfers(dev, xfers, nxfers);
2554 }
2555
2556 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2557 {
2558 struct i3c_master_controller *master;
2559 int ret;
2560
2561 if (!dev->ibi)
2562 return -EINVAL;
2563
2564 master = i3c_dev_get_master(dev);
2565 ret = master->ops->disable_ibi(dev);
2566 if (ret)
2567 return ret;
2568
2569 reinit_completion(&dev->ibi->all_ibis_handled);
2570 if (atomic_read(&dev->ibi->pending_ibis))
2571 wait_for_completion(&dev->ibi->all_ibis_handled);
2572
2573 dev->ibi->enabled = false;
2574
2575 return 0;
2576 }
2577
2578 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2579 {
2580 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2581 int ret;
2582
2583 if (!dev->ibi)
2584 return -EINVAL;
2585
2586 ret = master->ops->enable_ibi(dev);
2587 if (!ret)
2588 dev->ibi->enabled = true;
2589
2590 return ret;
2591 }
2592
2593 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2594 const struct i3c_ibi_setup *req)
2595 {
2596 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2597 struct i3c_device_ibi_info *ibi;
2598 int ret;
2599
2600 if (!master->ops->request_ibi)
2601 return -ENOTSUPP;
2602
2603 if (dev->ibi)
2604 return -EBUSY;
2605
2606 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2607 if (!ibi)
2608 return -ENOMEM;
2609
2610 atomic_set(&ibi->pending_ibis, 0);
2611 init_completion(&ibi->all_ibis_handled);
2612 ibi->handler = req->handler;
2613 ibi->max_payload_len = req->max_payload_len;
2614 ibi->num_slots = req->num_slots;
2615
2616 dev->ibi = ibi;
2617 ret = master->ops->request_ibi(dev, req);
2618 if (ret) {
2619 kfree(ibi);
2620 dev->ibi = NULL;
2621 }
2622
2623 return ret;
2624 }
2625
2626 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2627 {
2628 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2629
2630 if (!dev->ibi)
2631 return;
2632
2633 if (WARN_ON(dev->ibi->enabled))
2634 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2635
2636 master->ops->free_ibi(dev);
2637 kfree(dev->ibi);
2638 dev->ibi = NULL;
2639 }
2640
2641 static int __init i3c_init(void)
2642 {
2643 return bus_register(&i3c_bus_type);
2644 }
2645 subsys_initcall(i3c_init);
2646
2647 static void __exit i3c_exit(void)
2648 {
2649 idr_destroy(&i3c_bus_idr);
2650 bus_unregister(&i3c_bus_type);
2651 }
2652 module_exit(i3c_exit);
2653
2654 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2655 MODULE_DESCRIPTION("I3C core");
2656 MODULE_LICENSE("GPL v2");