This source file includes following definitions.
- ingenic_tcu_timer_read
- ingenic_tcu_timer_cs_read
- to_ingenic_tcu
- ingenic_tcu_cevt_set_state_shutdown
- ingenic_tcu_cevt_set_next
- ingenic_tcu_cevt_cb
- ingenic_tcu_get_clock
- ingenic_tcu_timer_init
- ingenic_tcu_clocksource_init
- ingenic_tcu_init
- ingenic_tcu_probe
- ingenic_tcu_suspend
- ingenic_tcu_resume
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7 #include <linux/bitops.h>
8 #include <linux/clk.h>
9 #include <linux/clockchips.h>
10 #include <linux/clocksource.h>
11 #include <linux/interrupt.h>
12 #include <linux/mfd/ingenic-tcu.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/of.h>
15 #include <linux/of_address.h>
16 #include <linux/of_irq.h>
17 #include <linux/of_platform.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/sched_clock.h>
21
22 #include <dt-bindings/clock/ingenic,tcu.h>
23
24 struct ingenic_soc_info {
25 unsigned int num_channels;
26 };
27
28 struct ingenic_tcu {
29 struct regmap *map;
30 struct clk *timer_clk, *cs_clk;
31 unsigned int timer_channel, cs_channel;
32 struct clock_event_device cevt;
33 struct clocksource cs;
34 char name[4];
35 unsigned long pwm_channels_mask;
36 };
37
38 static struct ingenic_tcu *ingenic_tcu;
39
40 static u64 notrace ingenic_tcu_timer_read(void)
41 {
42 struct ingenic_tcu *tcu = ingenic_tcu;
43 unsigned int count;
44
45 regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count);
46
47 return count;
48 }
49
50 static u64 notrace ingenic_tcu_timer_cs_read(struct clocksource *cs)
51 {
52 return ingenic_tcu_timer_read();
53 }
54
55 static inline struct ingenic_tcu *to_ingenic_tcu(struct clock_event_device *evt)
56 {
57 return container_of(evt, struct ingenic_tcu, cevt);
58 }
59
60 static int ingenic_tcu_cevt_set_state_shutdown(struct clock_event_device *evt)
61 {
62 struct ingenic_tcu *tcu = to_ingenic_tcu(evt);
63
64 regmap_write(tcu->map, TCU_REG_TECR, BIT(tcu->timer_channel));
65
66 return 0;
67 }
68
69 static int ingenic_tcu_cevt_set_next(unsigned long next,
70 struct clock_event_device *evt)
71 {
72 struct ingenic_tcu *tcu = to_ingenic_tcu(evt);
73
74 if (next > 0xffff)
75 return -EINVAL;
76
77 regmap_write(tcu->map, TCU_REG_TDFRc(tcu->timer_channel), next);
78 regmap_write(tcu->map, TCU_REG_TCNTc(tcu->timer_channel), 0);
79 regmap_write(tcu->map, TCU_REG_TESR, BIT(tcu->timer_channel));
80
81 return 0;
82 }
83
84 static irqreturn_t ingenic_tcu_cevt_cb(int irq, void *dev_id)
85 {
86 struct clock_event_device *evt = dev_id;
87 struct ingenic_tcu *tcu = to_ingenic_tcu(evt);
88
89 regmap_write(tcu->map, TCU_REG_TECR, BIT(tcu->timer_channel));
90
91 if (evt->event_handler)
92 evt->event_handler(evt);
93
94 return IRQ_HANDLED;
95 }
96
97 static struct clk * __init ingenic_tcu_get_clock(struct device_node *np, int id)
98 {
99 struct of_phandle_args args;
100
101 args.np = np;
102 args.args_count = 1;
103 args.args[0] = id;
104
105 return of_clk_get_from_provider(&args);
106 }
107
108 static int __init ingenic_tcu_timer_init(struct device_node *np,
109 struct ingenic_tcu *tcu)
110 {
111 unsigned int timer_virq, channel = tcu->timer_channel;
112 struct irq_domain *domain;
113 unsigned long rate;
114 int err;
115
116 tcu->timer_clk = ingenic_tcu_get_clock(np, channel);
117 if (IS_ERR(tcu->timer_clk))
118 return PTR_ERR(tcu->timer_clk);
119
120 err = clk_prepare_enable(tcu->timer_clk);
121 if (err)
122 goto err_clk_put;
123
124 rate = clk_get_rate(tcu->timer_clk);
125 if (!rate) {
126 err = -EINVAL;
127 goto err_clk_disable;
128 }
129
130 domain = irq_find_host(np);
131 if (!domain) {
132 err = -ENODEV;
133 goto err_clk_disable;
134 }
135
136 timer_virq = irq_create_mapping(domain, channel);
137 if (!timer_virq) {
138 err = -EINVAL;
139 goto err_clk_disable;
140 }
141
142 snprintf(tcu->name, sizeof(tcu->name), "TCU");
143
144 err = request_irq(timer_virq, ingenic_tcu_cevt_cb, IRQF_TIMER,
145 tcu->name, &tcu->cevt);
146 if (err)
147 goto err_irq_dispose_mapping;
148
149 tcu->cevt.cpumask = cpumask_of(smp_processor_id());
150 tcu->cevt.features = CLOCK_EVT_FEAT_ONESHOT;
151 tcu->cevt.name = tcu->name;
152 tcu->cevt.rating = 200;
153 tcu->cevt.set_state_shutdown = ingenic_tcu_cevt_set_state_shutdown;
154 tcu->cevt.set_next_event = ingenic_tcu_cevt_set_next;
155
156 clockevents_config_and_register(&tcu->cevt, rate, 10, 0xffff);
157
158 return 0;
159
160 err_irq_dispose_mapping:
161 irq_dispose_mapping(timer_virq);
162 err_clk_disable:
163 clk_disable_unprepare(tcu->timer_clk);
164 err_clk_put:
165 clk_put(tcu->timer_clk);
166 return err;
167 }
168
169 static int __init ingenic_tcu_clocksource_init(struct device_node *np,
170 struct ingenic_tcu *tcu)
171 {
172 unsigned int channel = tcu->cs_channel;
173 struct clocksource *cs = &tcu->cs;
174 unsigned long rate;
175 int err;
176
177 tcu->cs_clk = ingenic_tcu_get_clock(np, channel);
178 if (IS_ERR(tcu->cs_clk))
179 return PTR_ERR(tcu->cs_clk);
180
181 err = clk_prepare_enable(tcu->cs_clk);
182 if (err)
183 goto err_clk_put;
184
185 rate = clk_get_rate(tcu->cs_clk);
186 if (!rate) {
187 err = -EINVAL;
188 goto err_clk_disable;
189 }
190
191
192 regmap_update_bits(tcu->map, TCU_REG_TCSRc(channel),
193 0xffff & ~TCU_TCSR_RESERVED_BITS, 0);
194
195
196 regmap_write(tcu->map, TCU_REG_TDFRc(channel), 0xffff);
197 regmap_write(tcu->map, TCU_REG_TCNTc(channel), 0);
198
199
200 regmap_write(tcu->map, TCU_REG_TESR, BIT(channel));
201
202 cs->name = "ingenic-timer";
203 cs->rating = 200;
204 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
205 cs->mask = CLOCKSOURCE_MASK(16);
206 cs->read = ingenic_tcu_timer_cs_read;
207
208 err = clocksource_register_hz(cs, rate);
209 if (err)
210 goto err_clk_disable;
211
212 return 0;
213
214 err_clk_disable:
215 clk_disable_unprepare(tcu->cs_clk);
216 err_clk_put:
217 clk_put(tcu->cs_clk);
218 return err;
219 }
220
221 static const struct ingenic_soc_info jz4740_soc_info = {
222 .num_channels = 8,
223 };
224
225 static const struct ingenic_soc_info jz4725b_soc_info = {
226 .num_channels = 6,
227 };
228
229 static const struct of_device_id ingenic_tcu_of_match[] = {
230 { .compatible = "ingenic,jz4740-tcu", .data = &jz4740_soc_info, },
231 { .compatible = "ingenic,jz4725b-tcu", .data = &jz4725b_soc_info, },
232 { .compatible = "ingenic,jz4770-tcu", .data = &jz4740_soc_info, },
233 { }
234 };
235
236 static int __init ingenic_tcu_init(struct device_node *np)
237 {
238 const struct of_device_id *id = of_match_node(ingenic_tcu_of_match, np);
239 const struct ingenic_soc_info *soc_info = id->data;
240 struct ingenic_tcu *tcu;
241 struct regmap *map;
242 long rate;
243 int ret;
244
245 of_node_clear_flag(np, OF_POPULATED);
246
247 map = device_node_to_regmap(np);
248 if (IS_ERR(map))
249 return PTR_ERR(map);
250
251 tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
252 if (!tcu)
253 return -ENOMEM;
254
255
256 tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1, 2);
257 of_property_read_u32(np, "ingenic,pwm-channels-mask",
258 (u32 *)&tcu->pwm_channels_mask);
259
260
261 if (hweight8(tcu->pwm_channels_mask) > soc_info->num_channels - 2) {
262 pr_crit("%s: Invalid PWM channel mask: 0x%02lx\n", __func__,
263 tcu->pwm_channels_mask);
264 ret = -EINVAL;
265 goto err_free_ingenic_tcu;
266 }
267
268 tcu->map = map;
269 ingenic_tcu = tcu;
270
271 tcu->timer_channel = find_first_zero_bit(&tcu->pwm_channels_mask,
272 soc_info->num_channels);
273 tcu->cs_channel = find_next_zero_bit(&tcu->pwm_channels_mask,
274 soc_info->num_channels,
275 tcu->timer_channel + 1);
276
277 ret = ingenic_tcu_clocksource_init(np, tcu);
278 if (ret) {
279 pr_crit("%s: Unable to init clocksource: %d\n", __func__, ret);
280 goto err_free_ingenic_tcu;
281 }
282
283 ret = ingenic_tcu_timer_init(np, tcu);
284 if (ret)
285 goto err_tcu_clocksource_cleanup;
286
287
288 rate = clk_get_rate(tcu->cs_clk);
289 sched_clock_register(ingenic_tcu_timer_read, 16, rate);
290
291 return 0;
292
293 err_tcu_clocksource_cleanup:
294 clocksource_unregister(&tcu->cs);
295 clk_disable_unprepare(tcu->cs_clk);
296 clk_put(tcu->cs_clk);
297 err_free_ingenic_tcu:
298 kfree(tcu);
299 return ret;
300 }
301
302 TIMER_OF_DECLARE(jz4740_tcu_intc, "ingenic,jz4740-tcu", ingenic_tcu_init);
303 TIMER_OF_DECLARE(jz4725b_tcu_intc, "ingenic,jz4725b-tcu", ingenic_tcu_init);
304 TIMER_OF_DECLARE(jz4770_tcu_intc, "ingenic,jz4770-tcu", ingenic_tcu_init);
305
306
307 static int __init ingenic_tcu_probe(struct platform_device *pdev)
308 {
309 platform_set_drvdata(pdev, ingenic_tcu);
310
311 return 0;
312 }
313
314 static int __maybe_unused ingenic_tcu_suspend(struct device *dev)
315 {
316 struct ingenic_tcu *tcu = dev_get_drvdata(dev);
317
318 clk_disable(tcu->cs_clk);
319 clk_disable(tcu->timer_clk);
320 return 0;
321 }
322
323 static int __maybe_unused ingenic_tcu_resume(struct device *dev)
324 {
325 struct ingenic_tcu *tcu = dev_get_drvdata(dev);
326 int ret;
327
328 ret = clk_enable(tcu->timer_clk);
329 if (ret)
330 return ret;
331
332 ret = clk_enable(tcu->cs_clk);
333 if (ret) {
334 clk_disable(tcu->timer_clk);
335 return ret;
336 }
337
338 return 0;
339 }
340
341 static const struct dev_pm_ops __maybe_unused ingenic_tcu_pm_ops = {
342
343 .suspend_noirq = ingenic_tcu_suspend,
344 .resume_noirq = ingenic_tcu_resume,
345 };
346
347 static struct platform_driver ingenic_tcu_driver = {
348 .driver = {
349 .name = "ingenic-tcu-timer",
350 #ifdef CONFIG_PM_SLEEP
351 .pm = &ingenic_tcu_pm_ops,
352 #endif
353 .of_match_table = ingenic_tcu_of_match,
354 },
355 };
356 builtin_platform_driver_probe(ingenic_tcu_driver, ingenic_tcu_probe);