root/drivers/mtd/nand/raw/brcmnand/brcmnand.h

INCLUDED FROM

DEFINITIONS

1. brcmnand_soc_data_bus_prepare
2. brcmnand_soc_data_bus_unprepare
3. brcmnand_readl
4. brcmnand_writel

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright © 2015 Broadcom Corporation
   4  */
   5 
   6 #ifndef __BRCMNAND_H__
   7 #define __BRCMNAND_H__
   8 
   9 #include <linux/types.h>
  10 #include <linux/io.h>
  11 
  12 struct platform_device;
  13 struct dev_pm_ops;
  14 
  15 struct brcmnand_soc {
  16         bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
  17         void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
  18         void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
  19                                  bool is_param);
  20 };
  21 
  22 static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc,
  23                                                  bool is_param)
  24 {
  25         if (soc && soc->prepare_data_bus)
  26                 soc->prepare_data_bus(soc, true, is_param);
  27 }
  28 
  29 static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc,
  30                                                    bool is_param)
  31 {
  32         if (soc && soc->prepare_data_bus)
  33                 soc->prepare_data_bus(soc, false, is_param);
  34 }
  35 
  36 static inline u32 brcmnand_readl(void __iomem *addr)
  37 {
  38         /*
  39          * MIPS endianness is configured by boot strap, which also reverses all
  40          * bus endianness (i.e., big-endian CPU + big endian bus ==> native
  41          * endian I/O).
  42          *
  43          * Other architectures (e.g., ARM) either do not support big endian, or
  44          * else leave I/O in little endian mode.
  45          */
  46         if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  47                 return __raw_readl(addr);
  48         else
  49                 return readl_relaxed(addr);
  50 }
  51 
  52 static inline void brcmnand_writel(u32 val, void __iomem *addr)
  53 {
  54         /* See brcmnand_readl() comments */
  55         if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  56                 __raw_writel(val, addr);
  57         else
  58                 writel_relaxed(val, addr);
  59 }
  60 
  61 int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
  62 int brcmnand_remove(struct platform_device *pdev);
  63 
  64 extern const struct dev_pm_ops brcmnand_pm_ops;
  65 
  66 #endif /* __BRCMNAND_H__ */