root/drivers/ata/pata_sis.c

DEFINITIONS

1. sis_short_ata40
2. sis_old_port_base
3. sis_port_base
4. sis_133_cable_detect
5. sis_66_cable_detect
6. sis_pre_reset
7. sis_set_fifo
8. sis_old_set_piomode
9. sis_100_set_piomode
10. sis_133_set_piomode
11. sis_old_set_dmamode
12. sis_66_set_dmamode
13. sis_100_set_dmamode
14. sis_133_early_set_dmamode
15. sis_133_set_dmamode
16. sis_133_mode_filter
17. sis_fixup
18. sis_init_one
19. sis_reinit_one

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *    pata_sis.c - SiS ATA driver
   4  *
   5  *      (C) 2005 Red Hat
   6  *      (C) 2007,2009 Bartlomiej Zolnierkiewicz
   7  *
   8  *    Based upon linux/drivers/ide/pci/sis5513.c
   9  * Copyright (C) 1999-2000      Andre Hedrick <andre@linux-ide.org>
  10  * Copyright (C) 2002           Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
  11  * Copyright (C) 2003           Vojtech Pavlik <vojtech@suse.cz>
  12  * SiS Taiwan           : for direct support and hardware.
  13  * Daniela Engert       : for initial ATA100 advices and numerous others.
  14  * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt        :
  15  *                        for checking code correctness, providing patches.
  16  * Original tests and design on the SiS620 chipset.
  17  * ATA100 tests and design on the SiS735 chipset.
  18  * ATA16/33 support from specs
  19  * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
  20  *
  21  *
  22  *      TODO
  23  *      Check MWDMA on drives that don't support MWDMA speed pio cycles ?
  24  *      More Testing
  25  */
  26 
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/pci.h>
  30 #include <linux/blkdev.h>
  31 #include <linux/delay.h>
  32 #include <linux/device.h>
  33 #include <scsi/scsi_host.h>
  34 #include <linux/libata.h>
  35 #include <linux/ata.h>
  36 #include "sis.h"
  37 
  38 #define DRV_NAME        "pata_sis"
  39 #define DRV_VERSION     "0.5.2"
  40 
  41 struct sis_chipset {
  42         u16 device;                             /* PCI host ID */
  43         const struct ata_port_info *info;       /* Info block */
  44         /* Probably add family, cable detect type etc here to clean
  45            up code later */
  46 };
  47 
  48 struct sis_laptop {
  49         u16 device;
  50         u16 subvendor;
  51         u16 subdevice;
  52 };
  53 
  54 static const struct sis_laptop sis_laptop[] = {
  55         /* devid, subvendor, subdev */
  56         { 0x5513, 0x1043, 0x1107 },     /* ASUS A6K */
  57         { 0x5513, 0x1734, 0x105F },     /* FSC Amilo A1630 */
  58         { 0x5513, 0x1071, 0x8640 },     /* EasyNote K5305 */
  59         /* end marker */
  60         { 0, }
  61 };
  62 
  63 static int sis_short_ata40(struct pci_dev *dev)
  64 {
  65         const struct sis_laptop *lap = &sis_laptop[0];
  66 
  67         while (lap->device) {
  68                 if (lap->device == dev->device &&
  69                     lap->subvendor == dev->subsystem_vendor &&
  70                     lap->subdevice == dev->subsystem_device)
  71                         return 1;
  72                 lap++;
  73         }
  74 
  75         return 0;
  76 }
  77 
  78 /**
  79  *      sis_old_port_base - return PCI configuration base for dev
  80  *      @adev: device
  81  *
  82  *      Returns the base of the PCI configuration registers for this port
  83  *      number.
  84  */
  85 
  86 static int sis_old_port_base(struct ata_device *adev)
  87 {
  88         return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno);
  89 }
  90 
  91 /**
  92  *      sis_port_base - return PCI configuration base for dev
  93  *      @adev: device
  94  *
  95  *      Returns the base of the PCI configuration registers for this port
  96  *      number.
  97  */
  98 
  99 static int sis_port_base(struct ata_device *adev)
 100 {
 101         struct ata_port *ap = adev->link->ap;
 102         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 103         int port = 0x40;
 104         u32 reg54;
 105 
 106         /* If bit 30 is set then the registers are mapped at 0x70 not 0x40 */
 107         pci_read_config_dword(pdev, 0x54, &reg54);
 108         if (reg54 & 0x40000000)
 109                 port = 0x70;
 110 
 111         return port + (8 * ap->port_no) + (4 * adev->devno);
 112 }
 113 
 114 /**
 115  *      sis_133_cable_detect - check for 40/80 pin
 116  *      @ap: Port
 117  *      @deadline: deadline jiffies for the operation
 118  *
 119  *      Perform cable detection for the later UDMA133 capable
 120  *      SiS chipset.
 121  */
 122 
 123 static int sis_133_cable_detect(struct ata_port *ap)
 124 {
 125         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 126         u16 tmp;
 127 
 128         /* The top bit of this register is the cable detect bit */
 129         pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
 130         if ((tmp & 0x8000) && !sis_short_ata40(pdev))
 131                 return ATA_CBL_PATA40;
 132         return ATA_CBL_PATA80;
 133 }
 134 
 135 /**
 136  *      sis_66_cable_detect - check for 40/80 pin
 137  *      @ap: Port
 138  *
 139  *      Perform cable detection on the UDMA66, UDMA100 and early UDMA133
 140  *      SiS IDE controllers.
 141  */
 142 
 143 static int sis_66_cable_detect(struct ata_port *ap)
 144 {
 145         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 146         u8 tmp;
 147 
 148         /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
 149         pci_read_config_byte(pdev, 0x48, &tmp);
 150         tmp >>= ap->port_no;
 151         if ((tmp & 0x10) && !sis_short_ata40(pdev))
 152                 return ATA_CBL_PATA40;
 153         return ATA_CBL_PATA80;
 154 }
 155 
 156 
 157 /**
 158  *      sis_pre_reset - probe begin
 159  *      @link: ATA link
 160  *      @deadline: deadline jiffies for the operation
 161  *
 162  *      Set up cable type and use generic probe init
 163  */
 164 
 165 static int sis_pre_reset(struct ata_link *link, unsigned long deadline)
 166 {
 167         static const struct pci_bits sis_enable_bits[] = {
 168                 { 0x4aU, 1U, 0x02UL, 0x02UL },  /* port 0 */
 169                 { 0x4aU, 1U, 0x04UL, 0x04UL },  /* port 1 */
 170         };
 171 
 172         struct ata_port *ap = link->ap;
 173         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 174 
 175         if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
 176                 return -ENOENT;
 177 
 178         /* Clear the FIFO settings. We can't enable the FIFO until
 179            we know we are poking at a disk */
 180         pci_write_config_byte(pdev, 0x4B, 0);
 181         return ata_sff_prereset(link, deadline);
 182 }
 183 
 184 
 185 /**
 186  *      sis_set_fifo - Set RWP fifo bits for this device
 187  *      @ap: Port
 188  *      @adev: Device
 189  *
 190  *      SIS chipsets implement prefetch/postwrite bits for each device
 191  *      on both channels. This functionality is not ATAPI compatible and
 192  *      must be configured according to the class of device present
 193  */
 194 
 195 static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev)
 196 {
 197         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 198         u8 fifoctrl;
 199         u8 mask = 0x11;
 200 
 201         mask <<= (2 * ap->port_no);
 202         mask <<= adev->devno;
 203 
 204         /* This holds various bits including the FIFO control */
 205         pci_read_config_byte(pdev, 0x4B, &fifoctrl);
 206         fifoctrl &= ~mask;
 207 
 208         /* Enable for ATA (disk) only */
 209         if (adev->class == ATA_DEV_ATA)
 210                 fifoctrl |= mask;
 211         pci_write_config_byte(pdev, 0x4B, fifoctrl);
 212 }
 213 
 214 /**
 215  *      sis_old_set_piomode - Initialize host controller PATA PIO timings
 216  *      @ap: Port whose timings we are configuring
 217  *      @adev: Device we are configuring for.
 218  *
 219  *      Set PIO mode for device, in host controller PCI config space. This
 220  *      function handles PIO set up for all chips that are pre ATA100 and
 221  *      also early ATA100 devices.
 222  *
 223  *      LOCKING:
 224  *      None (inherited from caller).
 225  */
 226 
 227 static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
 228 {
 229         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 230         int port = sis_old_port_base(adev);
 231         u8 t1, t2;
 232         int speed = adev->pio_mode - XFER_PIO_0;
 233 
 234         static const u8 active[]   = { 0x00, 0x07, 0x04, 0x03, 0x01 };
 235         static const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
 236 
 237         sis_set_fifo(ap, adev);
 238 
 239         pci_read_config_byte(pdev, port, &t1);
 240         pci_read_config_byte(pdev, port + 1, &t2);
 241 
 242         t1 &= ~0x0F;    /* Clear active/recovery timings */
 243         t2 &= ~0x07;
 244 
 245         t1 |= active[speed];
 246         t2 |= recovery[speed];
 247 
 248         pci_write_config_byte(pdev, port, t1);
 249         pci_write_config_byte(pdev, port + 1, t2);
 250 }
 251 
 252 /**
 253  *      sis_100_set_piomode - Initialize host controller PATA PIO timings
 254  *      @ap: Port whose timings we are configuring
 255  *      @adev: Device we are configuring for.
 256  *
 257  *      Set PIO mode for device, in host controller PCI config space. This
 258  *      function handles PIO set up for ATA100 devices and early ATA133.
 259  *
 260  *      LOCKING:
 261  *      None (inherited from caller).
 262  */
 263 
 264 static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
 265 {
 266         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 267         int port = sis_old_port_base(adev);
 268         int speed = adev->pio_mode - XFER_PIO_0;
 269 
 270         static const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
 271 
 272         sis_set_fifo(ap, adev);
 273 
 274         pci_write_config_byte(pdev, port, actrec[speed]);
 275 }
 276 
 277 /**
 278  *      sis_133_set_piomode - Initialize host controller PATA PIO timings
 279  *      @ap: Port whose timings we are configuring
 280  *      @adev: Device we are configuring for.
 281  *
 282  *      Set PIO mode for device, in host controller PCI config space. This
 283  *      function handles PIO set up for the later ATA133 devices.
 284  *
 285  *      LOCKING:
 286  *      None (inherited from caller).
 287  */
 288 
 289 static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
 290 {
 291         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 292         int port;
 293         u32 t1;
 294         int speed = adev->pio_mode - XFER_PIO_0;
 295 
 296         static const u32 timing133[] = {
 297                 0x28269000,     /* Recovery << 24 | Act << 16 | Ini << 12 */
 298                 0x0C266000,
 299                 0x04263000,
 300                 0x0C0A3000,
 301                 0x05093000
 302         };
 303         static const u32 timing100[] = {
 304                 0x1E1C6000,     /* Recovery << 24 | Act << 16 | Ini << 12 */
 305                 0x091C4000,
 306                 0x031C2000,
 307                 0x09072000,
 308                 0x04062000
 309         };
 310 
 311         sis_set_fifo(ap, adev);
 312 
 313         port = sis_port_base(adev);
 314         pci_read_config_dword(pdev, port, &t1);
 315         t1 &= 0xC0C00FFF;       /* Mask out timing */
 316 
 317         if (t1 & 0x08)          /* 100 or 133 ? */
 318                 t1 |= timing133[speed];
 319         else
 320                 t1 |= timing100[speed];
 321         pci_write_config_byte(pdev, port, t1);
 322 }
 323 
 324 /**
 325  *      sis_old_set_dmamode - Initialize host controller PATA DMA timings
 326  *      @ap: Port whose timings we are configuring
 327  *      @adev: Device to program
 328  *
 329  *      Set UDMA/MWDMA mode for device, in host controller PCI config space.
 330  *      Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
 331  *      the old ide/pci driver.
 332  *
 333  *      LOCKING:
 334  *      None (inherited from caller).
 335  */
 336 
 337 static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 338 {
 339         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 340         int speed = adev->dma_mode - XFER_MW_DMA_0;
 341         int drive_pci = sis_old_port_base(adev);
 342         u16 timing;
 343 
 344         static const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
 345         static const u16 udma_bits[]  = { 0xE000, 0xC000, 0xA000 };
 346 
 347         pci_read_config_word(pdev, drive_pci, &timing);
 348 
 349         if (adev->dma_mode < XFER_UDMA_0) {
 350                 /* bits 3-0 hold recovery timing bits 8-10 active timing and
 351                    the higher bits are dependent on the device */
 352                 timing &= ~0x870F;
 353                 timing |= mwdma_bits[speed];
 354         } else {
 355                 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
 356                 speed = adev->dma_mode - XFER_UDMA_0;
 357                 timing &= ~0x6000;
 358                 timing |= udma_bits[speed];
 359         }
 360         pci_write_config_word(pdev, drive_pci, timing);
 361 }
 362 
 363 /**
 364  *      sis_66_set_dmamode - Initialize host controller PATA DMA timings
 365  *      @ap: Port whose timings we are configuring
 366  *      @adev: Device to program
 367  *
 368  *      Set UDMA/MWDMA mode for device, in host controller PCI config space.
 369  *      Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
 370  *      the old ide/pci driver.
 371  *
 372  *      LOCKING:
 373  *      None (inherited from caller).
 374  */
 375 
 376 static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 377 {
 378         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 379         int speed = adev->dma_mode - XFER_MW_DMA_0;
 380         int drive_pci = sis_old_port_base(adev);
 381         u16 timing;
 382 
 383         /* MWDMA 0-2 and UDMA 0-5 */
 384         static const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
 385         static const u16 udma_bits[]  = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 };
 386 
 387         pci_read_config_word(pdev, drive_pci, &timing);
 388 
 389         if (adev->dma_mode < XFER_UDMA_0) {
 390                 /* bits 3-0 hold recovery timing bits 8-10 active timing and
 391                    the higher bits are dependent on the device, bit 15 udma */
 392                 timing &= ~0x870F;
 393                 timing |= mwdma_bits[speed];
 394         } else {
 395                 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
 396                 speed = adev->dma_mode - XFER_UDMA_0;
 397                 timing &= ~0xF000;
 398                 timing |= udma_bits[speed];
 399         }
 400         pci_write_config_word(pdev, drive_pci, timing);
 401 }
 402 
 403 /**
 404  *      sis_100_set_dmamode - Initialize host controller PATA DMA timings
 405  *      @ap: Port whose timings we are configuring
 406  *      @adev: Device to program
 407  *
 408  *      Set UDMA/MWDMA mode for device, in host controller PCI config space.
 409  *      Handles UDMA66 and early UDMA100 devices.
 410  *
 411  *      LOCKING:
 412  *      None (inherited from caller).
 413  */
 414 
 415 static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 416 {
 417         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 418         int speed = adev->dma_mode - XFER_MW_DMA_0;
 419         int drive_pci = sis_old_port_base(adev);
 420         u8 timing;
 421 
 422         static const u8 udma_bits[]  = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
 423 
 424         pci_read_config_byte(pdev, drive_pci + 1, &timing);
 425 
 426         if (adev->dma_mode < XFER_UDMA_0) {
 427                 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
 428         } else {
 429                 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
 430                 speed = adev->dma_mode - XFER_UDMA_0;
 431                 timing &= ~0x8F;
 432                 timing |= udma_bits[speed];
 433         }
 434         pci_write_config_byte(pdev, drive_pci + 1, timing);
 435 }
 436 
 437 /**
 438  *      sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
 439  *      @ap: Port whose timings we are configuring
 440  *      @adev: Device to program
 441  *
 442  *      Set UDMA/MWDMA mode for device, in host controller PCI config space.
 443  *      Handles early SiS 961 bridges.
 444  *
 445  *      LOCKING:
 446  *      None (inherited from caller).
 447  */
 448 
 449 static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 450 {
 451         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 452         int speed = adev->dma_mode - XFER_MW_DMA_0;
 453         int drive_pci = sis_old_port_base(adev);
 454         u8 timing;
 455         /* Low 4 bits are timing */
 456         static const u8 udma_bits[]  = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
 457 
 458         pci_read_config_byte(pdev, drive_pci + 1, &timing);
 459 
 460         if (adev->dma_mode < XFER_UDMA_0) {
 461                 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
 462         } else {
 463                 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
 464                 speed = adev->dma_mode - XFER_UDMA_0;
 465                 timing &= ~0x8F;
 466                 timing |= udma_bits[speed];
 467         }
 468         pci_write_config_byte(pdev, drive_pci + 1, timing);
 469 }
 470 
 471 /**
 472  *      sis_133_set_dmamode - Initialize host controller PATA DMA timings
 473  *      @ap: Port whose timings we are configuring
 474  *      @adev: Device to program
 475  *
 476  *      Set UDMA/MWDMA mode for device, in host controller PCI config space.
 477  *
 478  *      LOCKING:
 479  *      None (inherited from caller).
 480  */
 481 
 482 static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
 483 {
 484         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 485         int port;
 486         u32 t1;
 487 
 488         port = sis_port_base(adev);
 489         pci_read_config_dword(pdev, port, &t1);
 490 
 491         if (adev->dma_mode < XFER_UDMA_0) {
 492                 /* Recovery << 24 | Act << 16 | Ini << 12, like PIO modes */
 493                 static const u32 timing_u100[] = { 0x19154000, 0x06072000, 0x04062000 };
 494                 static const u32 timing_u133[] = { 0x221C6000, 0x0C0A3000, 0x05093000 };
 495                 int speed = adev->dma_mode - XFER_MW_DMA_0;
 496 
 497                 t1 &= 0xC0C00FFF;
 498                 /* disable UDMA */
 499                 t1 &= ~0x00000004;
 500                 if (t1 & 0x08)
 501                         t1 |= timing_u133[speed];
 502                 else
 503                         t1 |= timing_u100[speed];
 504         } else {
 505                 /* bits 4- cycle time 8 - cvs time */
 506                 static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
 507                 static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
 508                 int speed = adev->dma_mode - XFER_UDMA_0;
 509 
 510                 t1 &= ~0x00000FF0;
 511                 /* enable UDMA */
 512                 t1 |= 0x00000004;
 513                 if (t1 & 0x08)
 514                         t1 |= timing_u133[speed];
 515                 else
 516                         t1 |= timing_u100[speed];
 517         }
 518         pci_write_config_dword(pdev, port, t1);
 519 }
 520 
 521 /**
 522  *      sis_133_mode_filter - mode selection filter
 523  *      @adev: ATA device
 524  *
 525  *      Block UDMA6 on devices that do not support it.
 526  */
 527 
 528 static unsigned long sis_133_mode_filter(struct ata_device *adev, unsigned long mask)
 529 {
 530         struct ata_port *ap = adev->link->ap;
 531         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 532         int port = sis_port_base(adev);
 533         u32 t1;
 534 
 535         pci_read_config_dword(pdev, port, &t1);
 536         /* if ATA133 is disabled, mask it out */
 537         if (!(t1 & 0x08))
 538                 mask &= ~(0xC0 << ATA_SHIFT_UDMA);
 539         return mask;
 540 }
 541 
 542 static struct scsi_host_template sis_sht = {
 543         ATA_BMDMA_SHT(DRV_NAME),
 544 };
 545 
 546 static struct ata_port_operations sis_133_for_sata_ops = {
 547         .inherits               = &ata_bmdma_port_ops,
 548         .set_piomode            = sis_133_set_piomode,
 549         .set_dmamode            = sis_133_set_dmamode,
 550         .cable_detect           = sis_133_cable_detect,
 551 };
 552 
 553 static struct ata_port_operations sis_base_ops = {
 554         .inherits               = &ata_bmdma_port_ops,
 555         .prereset               = sis_pre_reset,
 556 };
 557 
 558 static struct ata_port_operations sis_133_ops = {
 559         .inherits               = &sis_base_ops,
 560         .set_piomode            = sis_133_set_piomode,
 561         .set_dmamode            = sis_133_set_dmamode,
 562         .cable_detect           = sis_133_cable_detect,
 563         .mode_filter            = sis_133_mode_filter,
 564 };
 565 
 566 static struct ata_port_operations sis_133_early_ops = {
 567         .inherits               = &sis_base_ops,
 568         .set_piomode            = sis_100_set_piomode,
 569         .set_dmamode            = sis_133_early_set_dmamode,
 570         .cable_detect           = sis_66_cable_detect,
 571 };
 572 
 573 static struct ata_port_operations sis_100_ops = {
 574         .inherits               = &sis_base_ops,
 575         .set_piomode            = sis_100_set_piomode,
 576         .set_dmamode            = sis_100_set_dmamode,
 577         .cable_detect           = sis_66_cable_detect,
 578 };
 579 
 580 static struct ata_port_operations sis_66_ops = {
 581         .inherits               = &sis_base_ops,
 582         .set_piomode            = sis_old_set_piomode,
 583         .set_dmamode            = sis_66_set_dmamode,
 584         .cable_detect           = sis_66_cable_detect,
 585 };
 586 
 587 static struct ata_port_operations sis_old_ops = {
 588         .inherits               = &sis_base_ops,
 589         .set_piomode            = sis_old_set_piomode,
 590         .set_dmamode            = sis_old_set_dmamode,
 591         .cable_detect           = ata_cable_40wire,
 592 };
 593 
 594 static const struct ata_port_info sis_info = {
 595         .flags          = ATA_FLAG_SLAVE_POSS,
 596         .pio_mask       = ATA_PIO4,
 597         .mwdma_mask     = ATA_MWDMA2,
 598         /* No UDMA */
 599         .port_ops       = &sis_old_ops,
 600 };
 601 static const struct ata_port_info sis_info33 = {
 602         .flags          = ATA_FLAG_SLAVE_POSS,
 603         .pio_mask       = ATA_PIO4,
 604         .mwdma_mask     = ATA_MWDMA2,
 605         .udma_mask      = ATA_UDMA2,
 606         .port_ops       = &sis_old_ops,
 607 };
 608 static const struct ata_port_info sis_info66 = {
 609         .flags          = ATA_FLAG_SLAVE_POSS,
 610         .pio_mask       = ATA_PIO4,
 611         /* No MWDMA */
 612         .udma_mask      = ATA_UDMA4,
 613         .port_ops       = &sis_66_ops,
 614 };
 615 static const struct ata_port_info sis_info100 = {
 616         .flags          = ATA_FLAG_SLAVE_POSS,
 617         .pio_mask       = ATA_PIO4,
 618         /* No MWDMA */
 619         .udma_mask      = ATA_UDMA5,
 620         .port_ops       = &sis_100_ops,
 621 };
 622 static const struct ata_port_info sis_info100_early = {
 623         .flags          = ATA_FLAG_SLAVE_POSS,
 624         .pio_mask       = ATA_PIO4,
 625         /* No MWDMA */
 626         .udma_mask      = ATA_UDMA5,
 627         .port_ops       = &sis_66_ops,
 628 };
 629 static const struct ata_port_info sis_info133 = {
 630         .flags          = ATA_FLAG_SLAVE_POSS,
 631         .pio_mask       = ATA_PIO4,
 632         .mwdma_mask     = ATA_MWDMA2,
 633         .udma_mask      = ATA_UDMA6,
 634         .port_ops       = &sis_133_ops,
 635 };
 636 const struct ata_port_info sis_info133_for_sata = {
 637         .flags          = ATA_FLAG_SLAVE_POSS,
 638         .pio_mask       = ATA_PIO4,
 639         /* No MWDMA */
 640         .udma_mask      = ATA_UDMA6,
 641         .port_ops       = &sis_133_for_sata_ops,
 642 };
 643 static const struct ata_port_info sis_info133_early = {
 644         .flags          = ATA_FLAG_SLAVE_POSS,
 645         .pio_mask       = ATA_PIO4,
 646         /* No MWDMA */
 647         .udma_mask      = ATA_UDMA6,
 648         .port_ops       = &sis_133_early_ops,
 649 };
 650 
 651 /* Privately shared with the SiS180 SATA driver, not for use elsewhere */
 652 EXPORT_SYMBOL_GPL(sis_info133_for_sata);
 653 
 654 static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis)
 655 {
 656         u16 regw;
 657         u8 reg;
 658 
 659         if (sis->info == &sis_info133) {
 660                 pci_read_config_word(pdev, 0x50, &regw);
 661                 if (regw & 0x08)
 662                         pci_write_config_word(pdev, 0x50, regw & ~0x08);
 663                 pci_read_config_word(pdev, 0x52, &regw);
 664                 if (regw & 0x08)
 665                         pci_write_config_word(pdev, 0x52, regw & ~0x08);
 666                 return;
 667         }
 668 
 669         if (sis->info == &sis_info133_early || sis->info == &sis_info100) {
 670                 /* Fix up latency */
 671                 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
 672                 /* Set compatibility bit */
 673                 pci_read_config_byte(pdev, 0x49, &reg);
 674                 if (!(reg & 0x01))
 675                         pci_write_config_byte(pdev, 0x49, reg | 0x01);
 676                 return;
 677         }
 678 
 679         if (sis->info == &sis_info66 || sis->info == &sis_info100_early) {
 680                 /* Fix up latency */
 681                 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
 682                 /* Set compatibility bit */
 683                 pci_read_config_byte(pdev, 0x52, &reg);
 684                 if (!(reg & 0x04))
 685                         pci_write_config_byte(pdev, 0x52, reg | 0x04);
 686                 return;
 687         }
 688 
 689         if (sis->info == &sis_info33) {
 690                 pci_read_config_byte(pdev, PCI_CLASS_PROG, &reg);
 691                 if (( reg & 0x0F ) != 0x00)
 692                         pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0);
 693                 /* Fall through to ATA16 fixup below */
 694         }
 695 
 696         if (sis->info == &sis_info || sis->info == &sis_info33) {
 697                 /* force per drive recovery and active timings
 698                    needed on ATA_33 and below chips */
 699                 pci_read_config_byte(pdev, 0x52, &reg);
 700                 if (!(reg & 0x08))
 701                         pci_write_config_byte(pdev, 0x52, reg|0x08);
 702                 return;
 703         }
 704 
 705         BUG();
 706 }
 707 
 708 /**
 709  *      sis_init_one - Register SiS ATA PCI device with kernel services
 710  *      @pdev: PCI device to register
 711  *      @ent: Entry in sis_pci_tbl matching with @pdev
 712  *
 713  *      Called from kernel PCI layer. We probe for combined mode (sigh),
 714  *      and then hand over control to libata, for it to do the rest.
 715  *
 716  *      LOCKING:
 717  *      Inherited from PCI layer (may sleep).
 718  *
 719  *      RETURNS:
 720  *      Zero on success, or -ERRNO value.
 721  */
 722 
 723 static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
 724 {
 725         const struct ata_port_info *ppi[] = { NULL, NULL };
 726         struct pci_dev *host = NULL;
 727         struct sis_chipset *chipset = NULL;
 728         struct sis_chipset *sets;
 729         int rc;
 730 
 731         static struct sis_chipset sis_chipsets[] = {
 732 
 733                 { 0x0968, &sis_info133 },
 734                 { 0x0966, &sis_info133 },
 735                 { 0x0965, &sis_info133 },
 736                 { 0x0745, &sis_info100 },
 737                 { 0x0735, &sis_info100 },
 738                 { 0x0733, &sis_info100 },
 739                 { 0x0635, &sis_info100 },
 740                 { 0x0633, &sis_info100 },
 741 
 742                 { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */
 743                 { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */
 744 
 745                 { 0x0640, &sis_info66 },
 746                 { 0x0630, &sis_info66 },
 747                 { 0x0620, &sis_info66 },
 748                 { 0x0540, &sis_info66 },
 749                 { 0x0530, &sis_info66 },
 750 
 751                 { 0x5600, &sis_info33 },
 752                 { 0x5598, &sis_info33 },
 753                 { 0x5597, &sis_info33 },
 754                 { 0x5591, &sis_info33 },
 755                 { 0x5582, &sis_info33 },
 756                 { 0x5581, &sis_info33 },
 757 
 758                 { 0x5596, &sis_info },
 759                 { 0x5571, &sis_info },
 760                 { 0x5517, &sis_info },
 761                 { 0x5511, &sis_info },
 762 
 763                 {0}
 764         };
 765         static struct sis_chipset sis133_early = {
 766                 0x0, &sis_info133_early
 767         };
 768         static struct sis_chipset sis133 = {
 769                 0x0, &sis_info133
 770         };
 771         static struct sis_chipset sis100_early = {
 772                 0x0, &sis_info100_early
 773         };
 774         static struct sis_chipset sis100 = {
 775                 0x0, &sis_info100
 776         };
 777 
 778         ata_print_version_once(&pdev->dev, DRV_VERSION);
 779 
 780         rc = pcim_enable_device(pdev);
 781         if (rc)
 782                 return rc;
 783 
 784         /* We have to find the bridge first */
 785         for (sets = &sis_chipsets[0]; sets->device; sets++) {
 786                 host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL);
 787                 if (host != NULL) {
 788                         chipset = sets;                 /* Match found */
 789                         if (sets->device == 0x630) {    /* SIS630 */
 790                                 if (host->revision >= 0x30)     /* 630 ET */
 791                                         chipset = &sis100_early;
 792                         }
 793                         break;
 794                 }
 795         }
 796 
 797         /* Look for concealed bridges */
 798         if (chipset == NULL) {
 799                 /* Second check */
 800                 u32 idemisc;
 801                 u16 trueid;
 802 
 803                 /* Disable ID masking and register remapping then
 804                    see what the real ID is */
 805 
 806                 pci_read_config_dword(pdev, 0x54, &idemisc);
 807                 pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff);
 808                 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
 809                 pci_write_config_dword(pdev, 0x54, idemisc);
 810 
 811                 switch(trueid) {
 812                 case 0x5518:    /* SIS 962/963 */
 813                         dev_info(&pdev->dev,
 814                                  "SiS 962/963 MuTIOL IDE UDMA133 controller\n");
 815                         chipset = &sis133;
 816                         if ((idemisc & 0x40000000) == 0) {
 817                                 pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000);
 818                                 dev_info(&pdev->dev,
 819                                          "Switching to 5513 register mapping\n");
 820                         }
 821                         break;
 822                 case 0x0180:    /* SIS 965/965L */
 823                         chipset = &sis133;
 824                         break;
 825                 case 0x1180:    /* SIS 966/966L */
 826                         chipset = &sis133;
 827                         break;
 828                 }
 829         }
 830 
 831         /* Further check */
 832         if (chipset == NULL) {
 833                 struct pci_dev *lpc_bridge;
 834                 u16 trueid;
 835                 u8 prefctl;
 836                 u8 idecfg;
 837 
 838                 /* Try the second unmasking technique */
 839                 pci_read_config_byte(pdev, 0x4a, &idecfg);
 840                 pci_write_config_byte(pdev, 0x4a, idecfg | 0x10);
 841                 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
 842                 pci_write_config_byte(pdev, 0x4a, idecfg);
 843 
 844                 switch(trueid) {
 845                 case 0x5517:
 846                         lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */
 847                         if (lpc_bridge == NULL)
 848                                 break;
 849                         pci_read_config_byte(pdev, 0x49, &prefctl);
 850                         pci_dev_put(lpc_bridge);
 851 
 852                         if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) {
 853                                 chipset = &sis133_early;
 854                                 break;
 855                         }
 856                         chipset = &sis100;
 857                         break;
 858                 }
 859         }
 860         pci_dev_put(host);
 861 
 862         /* No chipset info, no support */
 863         if (chipset == NULL)
 864                 return -ENODEV;
 865 
 866         ppi[0] = chipset->info;
 867 
 868         sis_fixup(pdev, chipset);
 869 
 870         return ata_pci_bmdma_init_one(pdev, ppi, &sis_sht, chipset, 0);
 871 }
 872 
 873 #ifdef CONFIG_PM_SLEEP
 874 static int sis_reinit_one(struct pci_dev *pdev)
 875 {
 876         struct ata_host *host = pci_get_drvdata(pdev);
 877         int rc;
 878 
 879         rc = ata_pci_device_do_resume(pdev);
 880         if (rc)
 881                 return rc;
 882 
 883         sis_fixup(pdev, host->private_data);
 884 
 885         ata_host_resume(host);
 886         return 0;
 887 }
 888 #endif
 889 
 890 static const struct pci_device_id sis_pci_tbl[] = {
 891         { PCI_VDEVICE(SI, 0x5513), },   /* SiS 5513 */
 892         { PCI_VDEVICE(SI, 0x5518), },   /* SiS 5518 */
 893         { PCI_VDEVICE(SI, 0x1180), },   /* SiS 1180 */
 894 
 895         { }
 896 };
 897 
 898 static struct pci_driver sis_pci_driver = {
 899         .name                   = DRV_NAME,
 900         .id_table               = sis_pci_tbl,
 901         .probe                  = sis_init_one,
 902         .remove                 = ata_pci_remove_one,
 903 #ifdef CONFIG_PM_SLEEP
 904         .suspend                = ata_pci_device_suspend,
 905         .resume                 = sis_reinit_one,
 906 #endif
 907 };
 908 
 909 module_pci_driver(sis_pci_driver);
 910 
 911 MODULE_AUTHOR("Alan Cox");
 912 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
 913 MODULE_LICENSE("GPL");
 914 MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
 915 MODULE_VERSION(DRV_VERSION);