drivers/ata/pata

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
via_cable_override
via_cable_detect
via_pre_reset
via_do_set_mode
via_set_piomode
via_set_dmamode
via_mode_filter
via_tf_load
via_port_start
via_config_fifo
via_fixup
via_init_one
via_reinit_one
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * pata_via.c   - VIA PATA for new ATA layer
   4  *                        (C) 2005-2006 Red Hat Inc
   5  *
   6  *  Documentation
   7  *      Most chipset documentation available under NDA only
   8  *
   9  *  VIA version guide
  10  *      VIA VT82C561    -       early design, uses ata_generic currently
  11  *      VIA VT82C576    -       MWDMA, 33Mhz
  12  *      VIA VT82C586    -       MWDMA, 33Mhz
  13  *      VIA VT82C586a   -       Added UDMA to 33Mhz
  14  *      VIA VT82C586b   -       UDMA33
  15  *      VIA VT82C596a   -       Nonfunctional UDMA66
  16  *      VIA VT82C596b   -       Working UDMA66
  17  *      VIA VT82C686    -       Nonfunctional UDMA66
  18  *      VIA VT82C686a   -       Working UDMA66
  19  *      VIA VT82C686b   -       Updated to UDMA100
  20  *      VIA VT8231      -       UDMA100
  21  *      VIA VT8233      -       UDMA100
  22  *      VIA VT8233a     -       UDMA133
  23  *      VIA VT8233c     -       UDMA100
  24  *      VIA VT8235      -       UDMA133
  25  *      VIA VT8237      -       UDMA133
  26  *      VIA VT8237A     -       UDMA133
  27  *      VIA VT8237S     -       UDMA133
  28  *      VIA VT8251      -       UDMA133
  29  *
  30  *      Most registers remain compatible across chips. Others start reserved
  31  *      and acquire sensible semantics if set to 1 (eg cable detect). A few
  32  *      exceptions exist, notably around the FIFO settings.
  33  *
  34  *      One additional quirk of the VIA design is that like ALi they use few
  35  *      PCI IDs for a lot of chips.
  36  *
  37  *      Based heavily on:
  38  *
  39  * Version 3.38
  40  *
  41  * VIA IDE driver for Linux. Supported southbridges:
  42  *
  43  *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  44  *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  45  *   vt8235, vt8237
  46  *
  47  * Copyright (c) 2000-2002 Vojtech Pavlik
  48  *
  49  * Based on the work of:
  50  *      Michel Aubry
  51  *      Jeff Garzik
  52  *      Andre Hedrick
  53 
  54  */
  55 
  56 #include <linux/kernel.h>
  57 #include <linux/module.h>
  58 #include <linux/pci.h>
  59 #include <linux/blkdev.h>
  60 #include <linux/delay.h>
  61 #include <linux/gfp.h>
  62 #include <scsi/scsi_host.h>
  63 #include <linux/libata.h>
  64 #include <linux/dmi.h>
  65 
  66 #define DRV_NAME "pata_via"
  67 #define DRV_VERSION "0.3.4"
  68 
  69 enum {
  70         VIA_BAD_PREQ    = 0x01, /* Crashes if PREQ# till DDACK# set */
  71         VIA_BAD_CLK66   = 0x02, /* 66 MHz clock doesn't work correctly */
  72         VIA_SET_FIFO    = 0x04, /* Needs to have FIFO split set */
  73         VIA_NO_UNMASK   = 0x08, /* Doesn't work with IRQ unmasking on */
  74         VIA_BAD_ID      = 0x10, /* Has wrong vendor ID (0x1107) */
  75         VIA_BAD_AST     = 0x20, /* Don't touch Address Setup Timing */
  76         VIA_NO_ENABLES  = 0x40, /* Has no enablebits */
  77         VIA_SATA_PATA   = 0x80, /* SATA/PATA combined configuration */
  78 };
  79 
  80 enum {
  81         VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
  82 };
  83 
  84 /*
  85  * VIA SouthBridge chips.
  86  */
  87 
  88 static const struct via_isa_bridge {
  89         const char *name;
  90         u16 id;
  91         u8 rev_min;
  92         u8 rev_max;
  93         u8 udma_mask;
  94         u8 flags;
  95 } via_isa_bridges[] = {
  96         { "vx855",      PCI_DEVICE_ID_VIA_VX855,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  97         { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  98         { "vt8261",     PCI_DEVICE_ID_VIA_8261,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  99         { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 100         { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 101         { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
 102         { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
 103         { "vt6415",     PCI_DEVICE_ID_VIA_6415,     0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
 104         { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 105         { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 106         { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 107         { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 108         { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
 109         { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
 110         { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
 111         { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
 112         { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
 113         { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
 114         { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
 115         { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
 116         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
 117         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
 118         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
 119         { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
 120         { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
 121         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
 122         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 123         { "vtxxxx",     PCI_DEVICE_ID_VIA_ANON,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 124         { NULL }
 125 };
 126 
 127 static const struct dmi_system_id no_atapi_dma_dmi_table[] = {
 128         {
 129                 .ident = "AVERATEC 3200",
 130                 .matches = {
 131                         DMI_MATCH(DMI_BOARD_VENDOR, "AVERATEC"),
 132                         DMI_MATCH(DMI_BOARD_NAME, "3200"),
 133                 },
 134         },
 135         { }
 136 };
 137 
 138 struct via_port {
 139         u8 cached_device;
 140 };
 141 
 142 /*
 143  *      Cable special cases
 144  */
 145 
 146 static const struct dmi_system_id cable_dmi_table[] = {
 147         {
 148                 .ident = "Acer Ferrari 3400",
 149                 .matches = {
 150                         DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
 151                         DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
 152                 },
 153         },
 154         { }
 155 };
 156 
 157 static int via_cable_override(struct pci_dev *pdev)
 158 {
 159         /* Systems by DMI */
 160         if (dmi_check_system(cable_dmi_table))
 161                 return 1;
 162         /* Arima W730-K8/Targa Visionary 811/... */
 163         if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
 164                 return 1;
 165         return 0;
 166 }
 167 
 168 
 169 /**
 170  *      via_cable_detect        -       cable detection
 171  *      @ap: ATA port
 172  *
 173  *      Perform cable detection. Actually for the VIA case the BIOS
 174  *      already did this for us. We read the values provided by the
 175  *      BIOS. If you are using an 8235 in a non-PC configuration you
 176  *      may need to update this code.
 177  *
 178  *      Hotplug also impacts on this.
 179  */
 180 
 181 static int via_cable_detect(struct ata_port *ap) {
 182         const struct via_isa_bridge *config = ap->host->private_data;
 183         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 184         u32 ata66;
 185 
 186         if (via_cable_override(pdev))
 187                 return ATA_CBL_PATA40_SHORT;
 188 
 189         if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
 190                 return ATA_CBL_SATA;
 191 
 192         /* Early chips are 40 wire */
 193         if (config->udma_mask < ATA_UDMA4)
 194                 return ATA_CBL_PATA40;
 195         /* UDMA 66 chips have only drive side logic */
 196         else if (config->udma_mask < ATA_UDMA5)
 197                 return ATA_CBL_PATA_UNK;
 198         /* UDMA 100 or later */
 199         pci_read_config_dword(pdev, 0x50, &ata66);
 200         /* Check both the drive cable reporting bits, we might not have
 201            two drives */
 202         if (ata66 & (0x10100000 >> (16 * ap->port_no)))
 203                 return ATA_CBL_PATA80;
 204         /* Check with ACPI so we can spot BIOS reported SATA bridges */
 205         if (ata_acpi_init_gtm(ap) &&
 206             ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
 207                 return ATA_CBL_PATA80;
 208         return ATA_CBL_PATA40;
 209 }
 210 
 211 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
 212 {
 213         struct ata_port *ap = link->ap;
 214         const struct via_isa_bridge *config = ap->host->private_data;
 215 
 216         if (!(config->flags & VIA_NO_ENABLES)) {
 217                 static const struct pci_bits via_enable_bits[] = {
 218                         { 0x40, 1, 0x02, 0x02 },
 219                         { 0x40, 1, 0x01, 0x01 }
 220                 };
 221                 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 222                 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
 223                         return -ENOENT;
 224         }
 225 
 226         return ata_sff_prereset(link, deadline);
 227 }
 228 
 229 
 230 /**
 231  *      via_do_set_mode -       set transfer mode data
 232  *      @ap: ATA interface
 233  *      @adev: ATA device
 234  *      @mode: ATA mode being programmed
 235  *      @set_ast: Set to program address setup
 236  *      @udma_type: UDMA mode/format of registers
 237  *
 238  *      Program the VIA registers for DMA and PIO modes. Uses the ata timing
 239  *      support in order to compute modes.
 240  *
 241  *      FIXME: Hotplug will require we serialize multiple mode changes
 242  *      on the two channels.
 243  */
 244 
 245 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
 246                             int mode, int set_ast, int udma_type)
 247 {
 248         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 249         struct ata_device *peer = ata_dev_pair(adev);
 250         struct ata_timing t, p;
 251         static int via_clock = 33333;   /* Bus clock in kHZ */
 252         unsigned long T =  1000000000 / via_clock;
 253         unsigned long UT = T;
 254         int ut;
 255         int offset = 3 - (2*ap->port_no) - adev->devno;
 256 
 257         switch (udma_type) {
 258         case ATA_UDMA4:
 259                 UT = T / 2; break;
 260         case ATA_UDMA5:
 261                 UT = T / 3; break;
 262         case ATA_UDMA6:
 263                 UT = T / 4; break;
 264         }
 265 
 266         /* Calculate the timing values we require */
 267         ata_timing_compute(adev, mode, &t, T, UT);
 268 
 269         /* We share 8bit timing so we must merge the constraints */
 270         if (peer) {
 271                 if (peer->pio_mode) {
 272                         ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
 273                         ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
 274                 }
 275         }
 276 
 277         /* Address setup is programmable but breaks on UDMA133 setups */
 278         if (set_ast) {
 279                 u8 setup;       /* 2 bits per drive */
 280                 int shift = 2 * offset;
 281 
 282                 pci_read_config_byte(pdev, 0x4C, &setup);
 283                 setup &= ~(3 << shift);
 284                 setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
 285                 pci_write_config_byte(pdev, 0x4C, setup);
 286         }
 287 
 288         /* Load the PIO mode bits */
 289         pci_write_config_byte(pdev, 0x4F - ap->port_no,
 290                 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
 291         pci_write_config_byte(pdev, 0x48 + offset,
 292                 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
 293 
 294         /* Load the UDMA bits according to type */
 295         switch (udma_type) {
 296         case ATA_UDMA2:
 297         default:
 298                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
 299                 break;
 300         case ATA_UDMA4:
 301                 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
 302                 break;
 303         case ATA_UDMA5:
 304                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
 305                 break;
 306         case ATA_UDMA6:
 307                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
 308                 break;
 309         }
 310 
 311         /* Set UDMA unless device is not UDMA capable */
 312         if (udma_type) {
 313                 u8 udma_etc;
 314 
 315                 pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
 316 
 317                 /* clear transfer mode bit */
 318                 udma_etc &= ~0x20;
 319 
 320                 if (t.udma) {
 321                         /* preserve 80-wire cable detection bit */
 322                         udma_etc &= 0x10;
 323                         udma_etc |= ut;
 324                 }
 325 
 326                 pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
 327         }
 328 }
 329 
 330 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
 331 {
 332         const struct via_isa_bridge *config = ap->host->private_data;
 333         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 334 
 335         via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
 336 }
 337 
 338 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 339 {
 340         const struct via_isa_bridge *config = ap->host->private_data;
 341         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 342 
 343         via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
 344 }
 345 
 346 /**
 347  *      via_mode_filter         -       filter buggy device/mode pairs
 348  *      @dev: ATA device
 349  *      @mask: Mode bitmask
 350  *
 351  *      We need to apply some minimal filtering for old controllers and at least
 352  *      one breed of Transcend SSD. Return the updated mask.
 353  */
 354 
 355 static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
 356 {
 357         struct ata_host *host = dev->link->ap->host;
 358         const struct via_isa_bridge *config = host->private_data;
 359         unsigned char model_num[ATA_ID_PROD_LEN + 1];
 360 
 361         if (config->id == PCI_DEVICE_ID_VIA_82C586_0) {
 362                 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
 363                 if (strcmp(model_num, "TS64GSSD25-M") == 0) {
 364                         ata_dev_warn(dev,
 365         "disabling UDMA mode due to reported lockups with this device\n");
 366                         mask &= ~ ATA_MASK_UDMA;
 367                 }
 368         }
 369 
 370         if (dev->class == ATA_DEV_ATAPI &&
 371             dmi_check_system(no_atapi_dma_dmi_table)) {
 372                 ata_dev_warn(dev, "controller locks up on ATAPI DMA, forcing PIO\n");
 373                 mask &= ATA_MASK_PIO;
 374         }
 375 
 376         return mask;
 377 }
 378 
 379 /**
 380  *      via_tf_load - send taskfile registers to host controller
 381  *      @ap: Port to which output is sent
 382  *      @tf: ATA taskfile register set
 383  *
 384  *      Outputs ATA taskfile to standard ATA host controller.
 385  *
 386  *      Note: This is to fix the internal bug of via chipsets, which
 387  *      will reset the device register after changing the IEN bit on
 388  *      ctl register
 389  */
 390 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
 391 {
 392         struct ata_ioports *ioaddr = &ap->ioaddr;
 393         struct via_port *vp = ap->private_data;
 394         unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
 395         int newctl = 0;
 396 
 397         if (tf->ctl != ap->last_ctl) {
 398                 iowrite8(tf->ctl, ioaddr->ctl_addr);
 399                 ap->last_ctl = tf->ctl;
 400                 ata_wait_idle(ap);
 401                 newctl = 1;
 402         }
 403 
 404         if (tf->flags & ATA_TFLAG_DEVICE) {
 405                 iowrite8(tf->device, ioaddr->device_addr);
 406                 vp->cached_device = tf->device;
 407         } else if (newctl)
 408                 iowrite8(vp->cached_device, ioaddr->device_addr);
 409 
 410         if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
 411                 WARN_ON_ONCE(!ioaddr->ctl_addr);
 412                 iowrite8(tf->hob_feature, ioaddr->feature_addr);
 413                 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
 414                 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
 415                 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
 416                 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
 417                 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
 418                         tf->hob_feature,
 419                         tf->hob_nsect,
 420                         tf->hob_lbal,
 421                         tf->hob_lbam,
 422                         tf->hob_lbah);
 423         }
 424 
 425         if (is_addr) {
 426                 iowrite8(tf->feature, ioaddr->feature_addr);
 427                 iowrite8(tf->nsect, ioaddr->nsect_addr);
 428                 iowrite8(tf->lbal, ioaddr->lbal_addr);
 429                 iowrite8(tf->lbam, ioaddr->lbam_addr);
 430                 iowrite8(tf->lbah, ioaddr->lbah_addr);
 431                 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
 432                         tf->feature,
 433                         tf->nsect,
 434                         tf->lbal,
 435                         tf->lbam,
 436                         tf->lbah);
 437         }
 438 
 439         ata_wait_idle(ap);
 440 }
 441 
 442 static int via_port_start(struct ata_port *ap)
 443 {
 444         struct via_port *vp;
 445         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 446 
 447         int ret = ata_bmdma_port_start(ap);
 448         if (ret < 0)
 449                 return ret;
 450 
 451         vp = devm_kzalloc(&pdev->dev, sizeof(struct via_port), GFP_KERNEL);
 452         if (vp == NULL)
 453                 return -ENOMEM;
 454         ap->private_data = vp;
 455         return 0;
 456 }
 457 
 458 static struct scsi_host_template via_sht = {
 459         ATA_BMDMA_SHT(DRV_NAME),
 460 };
 461 
 462 static struct ata_port_operations via_port_ops = {
 463         .inherits       = &ata_bmdma_port_ops,
 464         .cable_detect   = via_cable_detect,
 465         .set_piomode    = via_set_piomode,
 466         .set_dmamode    = via_set_dmamode,
 467         .prereset       = via_pre_reset,
 468         .sff_tf_load    = via_tf_load,
 469         .port_start     = via_port_start,
 470         .mode_filter    = via_mode_filter,
 471 };
 472 
 473 static struct ata_port_operations via_port_ops_noirq = {
 474         .inherits       = &via_port_ops,
 475         .sff_data_xfer  = ata_sff_data_xfer32,
 476 };
 477 
 478 /**
 479  *      via_config_fifo         -       set up the FIFO
 480  *      @pdev: PCI device
 481  *      @flags: configuration flags
 482  *
 483  *      Set the FIFO properties for this device if necessary. Used both on
 484  *      set up and on and the resume path
 485  */
 486 
 487 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
 488 {
 489         u8 enable;
 490 
 491         /* 0x40 low bits indicate enabled channels */
 492         pci_read_config_byte(pdev, 0x40 , &enable);
 493         enable &= 3;
 494 
 495         if (flags & VIA_SET_FIFO) {
 496                 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
 497                 u8 fifo;
 498 
 499                 pci_read_config_byte(pdev, 0x43, &fifo);
 500 
 501                 /* Clear PREQ# until DDACK# for errata */
 502                 if (flags & VIA_BAD_PREQ)
 503                         fifo &= 0x7F;
 504                 else
 505                         fifo &= 0x9f;
 506                 /* Turn on FIFO for enabled channels */
 507                 fifo |= fifo_setting[enable];
 508                 pci_write_config_byte(pdev, 0x43, fifo);
 509         }
 510 }
 511 
 512 static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config)
 513 {
 514         u32 timing;
 515 
 516         /* Initialise the FIFO for the enabled channels. */
 517         via_config_fifo(pdev, config->flags);
 518 
 519         if (config->udma_mask == ATA_UDMA4) {
 520                 /* The 66 MHz devices require we enable the clock */
 521                 pci_read_config_dword(pdev, 0x50, &timing);
 522                 timing |= 0x80008;
 523                 pci_write_config_dword(pdev, 0x50, timing);
 524         }
 525         if (config->flags & VIA_BAD_CLK66) {
 526                 /* Disable the 66MHz clock on problem devices */
 527                 pci_read_config_dword(pdev, 0x50, &timing);
 528                 timing &= ~0x80008;
 529                 pci_write_config_dword(pdev, 0x50, timing);
 530         }
 531 }
 532 
 533 /**
 534  *      via_init_one            -       discovery callback
 535  *      @pdev: PCI device
 536  *      @id: PCI table info
 537  *
 538  *      A VIA IDE interface has been discovered. Figure out what revision
 539  *      and perform configuration work before handing it to the ATA layer
 540  */
 541 
 542 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 543 {
 544         /* Early VIA without UDMA support */
 545         static const struct ata_port_info via_mwdma_info = {
 546                 .flags = ATA_FLAG_SLAVE_POSS,
 547                 .pio_mask = ATA_PIO4,
 548                 .mwdma_mask = ATA_MWDMA2,
 549                 .port_ops = &via_port_ops
 550         };
 551         /* Ditto with IRQ masking required */
 552         static const struct ata_port_info via_mwdma_info_borked = {
 553                 .flags = ATA_FLAG_SLAVE_POSS,
 554                 .pio_mask = ATA_PIO4,
 555                 .mwdma_mask = ATA_MWDMA2,
 556                 .port_ops = &via_port_ops_noirq,
 557         };
 558         /* VIA UDMA 33 devices (and borked 66) */
 559         static const struct ata_port_info via_udma33_info = {
 560                 .flags = ATA_FLAG_SLAVE_POSS,
 561                 .pio_mask = ATA_PIO4,
 562                 .mwdma_mask = ATA_MWDMA2,
 563                 .udma_mask = ATA_UDMA2,
 564                 .port_ops = &via_port_ops
 565         };
 566         /* VIA UDMA 66 devices */
 567         static const struct ata_port_info via_udma66_info = {
 568                 .flags = ATA_FLAG_SLAVE_POSS,
 569                 .pio_mask = ATA_PIO4,
 570                 .mwdma_mask = ATA_MWDMA2,
 571                 .udma_mask = ATA_UDMA4,
 572                 .port_ops = &via_port_ops
 573         };
 574         /* VIA UDMA 100 devices */
 575         static const struct ata_port_info via_udma100_info = {
 576                 .flags = ATA_FLAG_SLAVE_POSS,
 577                 .pio_mask = ATA_PIO4,
 578                 .mwdma_mask = ATA_MWDMA2,
 579                 .udma_mask = ATA_UDMA5,
 580                 .port_ops = &via_port_ops
 581         };
 582         /* UDMA133 with bad AST (All current 133) */
 583         static const struct ata_port_info via_udma133_info = {
 584                 .flags = ATA_FLAG_SLAVE_POSS,
 585                 .pio_mask = ATA_PIO4,
 586                 .mwdma_mask = ATA_MWDMA2,
 587                 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
 588                 .port_ops = &via_port_ops
 589         };
 590         const struct ata_port_info *ppi[] = { NULL, NULL };
 591         struct pci_dev *isa;
 592         const struct via_isa_bridge *config;
 593         u8 enable;
 594         unsigned long flags = id->driver_data;
 595         int rc;
 596 
 597         ata_print_version_once(&pdev->dev, DRV_VERSION);
 598 
 599         rc = pcim_enable_device(pdev);
 600         if (rc)
 601                 return rc;
 602 
 603         if (flags & VIA_IDFLAG_SINGLE)
 604                 ppi[1] = &ata_dummy_port_info;
 605 
 606         /* To find out how the IDE will behave and what features we
 607            actually have to look at the bridge not the IDE controller */
 608         for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
 609              config++)
 610                 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
 611                         !!(config->flags & VIA_BAD_ID),
 612                         config->id, NULL))) {
 613                         u8 rev = isa->revision;
 614                         pci_dev_put(isa);
 615 
 616                         if ((id->device == 0x0415 || id->device == 0x3164) &&
 617                             (config->id != id->device))
 618                                 continue;
 619 
 620                         if (rev >= config->rev_min && rev <= config->rev_max)
 621                                 break;
 622                 }
 623 
 624         if (!(config->flags & VIA_NO_ENABLES)) {
 625                 /* 0x40 low bits indicate enabled channels */
 626                 pci_read_config_byte(pdev, 0x40 , &enable);
 627                 enable &= 3;
 628                 if (enable == 0)
 629                         return -ENODEV;
 630         }
 631 
 632         /* Clock set up */
 633         switch (config->udma_mask) {
 634         case 0x00:
 635                 if (config->flags & VIA_NO_UNMASK)
 636                         ppi[0] = &via_mwdma_info_borked;
 637                 else
 638                         ppi[0] = &via_mwdma_info;
 639                 break;
 640         case ATA_UDMA2:
 641                 ppi[0] = &via_udma33_info;
 642                 break;
 643         case ATA_UDMA4:
 644                 ppi[0] = &via_udma66_info;
 645                 break;
 646         case ATA_UDMA5:
 647                 ppi[0] = &via_udma100_info;
 648                 break;
 649         case ATA_UDMA6:
 650                 ppi[0] = &via_udma133_info;
 651                 break;
 652         default:
 653                 WARN_ON(1);
 654                 return -ENODEV;
 655         }
 656 
 657         via_fixup(pdev, config);
 658 
 659         /* We have established the device type, now fire it up */
 660         return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0);
 661 }
 662 
 663 #ifdef CONFIG_PM_SLEEP
 664 /**
 665  *      via_reinit_one          -       reinit after resume
 666  *      @pdev; PCI device
 667  *
 668  *      Called when the VIA PATA device is resumed. We must then
 669  *      reconfigure the fifo and other setup we may have altered. In
 670  *      addition the kernel needs to have the resume methods on PCI
 671  *      quirk supported.
 672  */
 673 
 674 static int via_reinit_one(struct pci_dev *pdev)
 675 {
 676         struct ata_host *host = pci_get_drvdata(pdev);
 677         int rc;
 678 
 679         rc = ata_pci_device_do_resume(pdev);
 680         if (rc)
 681                 return rc;
 682 
 683         via_fixup(pdev, host->private_data);
 684 
 685         ata_host_resume(host);
 686         return 0;
 687 }
 688 #endif
 689 
 690 static const struct pci_device_id via[] = {
 691         { PCI_VDEVICE(VIA, 0x0415), },
 692         { PCI_VDEVICE(VIA, 0x0571), },
 693         { PCI_VDEVICE(VIA, 0x0581), },
 694         { PCI_VDEVICE(VIA, 0x1571), },
 695         { PCI_VDEVICE(VIA, 0x3164), },
 696         { PCI_VDEVICE(VIA, 0x5324), },
 697         { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
 698         { PCI_VDEVICE(VIA, 0x9001), VIA_IDFLAG_SINGLE },
 699 
 700         { },
 701 };
 702 
 703 static struct pci_driver via_pci_driver = {
 704         .name           = DRV_NAME,
 705         .id_table       = via,
 706         .probe          = via_init_one,
 707         .remove         = ata_pci_remove_one,
 708 #ifdef CONFIG_PM_SLEEP
 709         .suspend        = ata_pci_device_suspend,
 710         .resume         = via_reinit_one,
 711 #endif
 712 };
 713 
 714 module_pci_driver(via_pci_driver);
 715 
 716 MODULE_AUTHOR("Alan Cox");
 717 MODULE_DESCRIPTION("low-level driver for VIA PATA");
 718 MODULE_LICENSE("GPL");
 719 MODULE_DEVICE_TABLE(pci, via);
 720 MODULE_VERSION(DRV_VERSION);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/ata/pata_via.c

DEFINITIONS
