drivers/staging/rtl8723bs/include/rtl8723b

/* [<][>][^][v][top][bottom][index][help] */
   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7 #ifndef __RTL8723B_CMD_H__
   8 #define __RTL8723B_CMD_H__
   9 
  10 /*  */
  11 /*     H2C CMD DEFINITION    ------------------------------------------------ */
  12 /*  */
  13 
  14 enum h2c_cmd_8723B{
  15         /* Common Class: 000 */
  16         H2C_8723B_RSVD_PAGE = 0x00,
  17         H2C_8723B_MEDIA_STATUS_RPT = 0x01,
  18         H2C_8723B_SCAN_ENABLE = 0x02,
  19         H2C_8723B_KEEP_ALIVE = 0x03,
  20         H2C_8723B_DISCON_DECISION = 0x04,
  21         H2C_8723B_PSD_OFFLOAD = 0x05,
  22         H2C_8723B_AP_OFFLOAD = 0x08,
  23         H2C_8723B_BCN_RSVDPAGE = 0x09,
  24         H2C_8723B_PROBERSP_RSVDPAGE = 0x0A,
  25         H2C_8723B_FCS_RSVDPAGE = 0x10,
  26         H2C_8723B_FCS_INFO = 0x11,
  27         H2C_8723B_AP_WOW_GPIO_CTRL = 0x13,
  28 
  29         /* PoweSave Class: 001 */
  30         H2C_8723B_SET_PWR_MODE = 0x20,
  31         H2C_8723B_PS_TUNING_PARA = 0x21,
  32         H2C_8723B_PS_TUNING_PARA2 = 0x22,
  33         H2C_8723B_P2P_LPS_PARAM = 0x23,
  34         H2C_8723B_P2P_PS_OFFLOAD = 0x24,
  35         H2C_8723B_PS_SCAN_ENABLE = 0x25,
  36         H2C_8723B_SAP_PS_ = 0x26,
  37         H2C_8723B_INACTIVE_PS_ = 0x27, /* Inactive_PS */
  38         H2C_8723B_FWLPS_IN_IPS_ = 0x28,
  39 
  40         /* Dynamic Mechanism Class: 010 */
  41         H2C_8723B_MACID_CFG = 0x40,
  42         H2C_8723B_TXBF = 0x41,
  43         H2C_8723B_RSSI_SETTING = 0x42,
  44         H2C_8723B_AP_REQ_TXRPT = 0x43,
  45         H2C_8723B_INIT_RATE_COLLECT = 0x44,
  46 
  47         /* BT Class: 011 */
  48         H2C_8723B_B_TYPE_TDMA = 0x60,
  49         H2C_8723B_BT_INFO = 0x61,
  50         H2C_8723B_FORCE_BT_TXPWR = 0x62,
  51         H2C_8723B_BT_IGNORE_WLANACT = 0x63,
  52         H2C_8723B_DAC_SWING_VALUE = 0x64,
  53         H2C_8723B_ANT_SEL_RSV = 0x65,
  54         H2C_8723B_WL_OPMODE = 0x66,
  55         H2C_8723B_BT_MP_OPER = 0x67,
  56         H2C_8723B_BT_CONTROL = 0x68,
  57         H2C_8723B_BT_WIFI_CTRL = 0x69,
  58         H2C_8723B_BT_FW_PATCH = 0x6A,
  59         H2C_8723B_BT_WLAN_CALIBRATION = 0x6D,
  60 
  61         /* WOWLAN Class: 100 */
  62         H2C_8723B_WOWLAN = 0x80,
  63         H2C_8723B_REMOTE_WAKE_CTRL = 0x81,
  64         H2C_8723B_AOAC_GLOBAL_INFO = 0x82,
  65         H2C_8723B_AOAC_RSVD_PAGE = 0x83,
  66         H2C_8723B_AOAC_RSVD_PAGE2 = 0x84,
  67         H2C_8723B_D0_SCAN_OFFLOAD_CTRL = 0x85,
  68         H2C_8723B_D0_SCAN_OFFLOAD_INFO = 0x86,
  69         H2C_8723B_CHNL_SWITCH_OFFLOAD = 0x87,
  70 
  71         H2C_8723B_RESET_TSF = 0xC0,
  72         H2C_8723B_MAXID,
  73 };
  74 /*  */
  75 /*     H2C CMD CONTENT    -------------------------------------------------- */
  76 /*  */
  77 /* _RSVDPAGE_LOC_CMD_0x00 */
  78 #define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value)                     SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
  79 #define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value)                                SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value)
  80 #define SET_8723B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value)                     SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value)
  81 #define SET_8723B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value)         SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value)
  82 #define SET_8723B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)      SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value)
  83 
  84 /* _MEDIA_STATUS_RPT_PARM_CMD_0x01 */
  85 #define SET_8723B_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value)                         SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
  86 #define SET_8723B_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value)                      SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
  87 #define SET_8723B_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value)                          SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value)
  88 #define SET_8723B_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value)                      SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value)
  89 
  90 /* _KEEP_ALIVE_CMD_0x03 */
  91 #define SET_8723B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value)                      SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
  92 #define SET_8723B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value)                               SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
  93 #define SET_8723B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value)                    SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
  94 #define SET_8723B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value)                SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value)
  95 
  96 /* _DISCONNECT_DECISION_CMD_0x04 */
  97 #define SET_8723B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value)                 SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
  98 #define SET_8723B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value)                  SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
  99 #define SET_8723B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value)   SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value)
 100 #define SET_8723B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value)    SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value)
 101 
 102 /*  _PWR_MOD_CMD_0x20 */
 103 #define SET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value)                          SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
 104 #define SET_8723B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value)                          SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value)
 105 #define SET_8723B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value)                      SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value)
 106 #define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value)         SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value)
 107 #define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)       SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value)
 108 #define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)                     SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value)
 109 #define SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value)                         SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value)
 110 
 111 #define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd)                                   LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
 112 
 113 /*  _PS_TUNE_PARAM_CMD_0x21 */
 114 #define SET_8723B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value)                   SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
 115 #define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value)                   SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
 116 #define SET_8723B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value)                  SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value)
 117 #define SET_8723B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value)                     SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value)
 118 #define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value)                    SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
 119 
 120 /* _MACID_CFG_CMD_0x40 */
 121 #define SET_8723B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value)            SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
 122 #define SET_8723B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value)             SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value)
 123 #define SET_8723B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value)           SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value)
 124 #define SET_8723B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value)
 125 #define SET_8723B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value)                SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value)
 126 #define SET_8723B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value)           SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value)
 127 #define SET_8723B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value)            SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value)
 128 #define SET_8723B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value)            SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value)
 129 #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
 130 #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
 131 #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value)
 132 #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value)
 133 
 134 /* _RSSI_SETTING_CMD_0x42 */
 135 #define SET_8723B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value)         SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
 136 #define SET_8723B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value)          SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value)
 137 #define SET_8723B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value)            SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
 138 
 139 /*  _AP_REQ_TXRPT_CMD_0x43 */
 140 #define SET_8723B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
 141 #define SET_8723B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value)               SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
 142 
 143 /*  _FORCE_BT_TXPWR_CMD_0x62 */
 144 #define SET_8723B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value)                                                 SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
 145 
 146 /*  _FORCE_BT_MP_OPER_CMD_0x67 */
 147 #define SET_8723B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value)                                                      SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
 148 #define SET_8723B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value)                                                   SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value)
 149 #define SET_8723B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value)                                                      SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
 150 #define SET_8723B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value)                                                   SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value)
 151 #define SET_8723B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value)                                                   SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value)
 152 #define SET_8723B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value)                                                   SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
 153 
 154 /*  _BT_FW_PATCH_0x6A */
 155 #define SET_8723B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value)                                   SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value)
 156 #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value)                                  SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
 157 #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value)                                  SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 158 #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value)                                  SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
 159 #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value)                                  SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 160 
 161 /*  */
 162 /*     Function Statement     -------------------------------------------------- */
 163 /*  */
 164 
 165 /*  host message to firmware cmd */
 166 void rtl8723b_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
 167 void rtl8723b_set_FwJoinBssRpt_cmd(struct adapter *padapter, u8 mstatus);
 168 void rtl8723b_set_rssi_cmd(struct adapter *padapter, u8 *param);
 169 void rtl8723b_Add_RateATid(struct adapter *padapter, u32 bitmap, u8 *arg, u8 rssi_level);
 170 void rtl8723b_fw_try_ap_cmd(struct adapter *padapter, u32 need_ack);
 171 /* s32 rtl8723b_set_lowpwr_lps_cmd(struct adapter *padapter, u8 enable); */
 172 void rtl8723b_set_FwPsTuneParam_cmd(struct adapter *padapter);
 173 void rtl8723b_set_FwMacIdConfig_cmd(struct adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask);
 174 void rtl8723b_set_FwMediaStatusRpt_cmd(struct adapter *padapter, u8 mstatus, u8 macid);
 175 void rtl8723b_download_rsvd_page(struct adapter *padapter, u8 mstatus);
 176 void rtl8723b_download_BTCoex_AP_mode_rsvd_page(struct adapter *padapter);
 177 
 178 void CheckFwRsvdPageContent(struct adapter *padapter);
 179 
 180 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
 181 void rtl8723b_set_wowlan_cmd(struct adapter *padapter, u8 enable);
 182 void rtl8723b_set_ap_wowlan_cmd(struct adapter *padapter, u8 enable);
 183 void SetFwRelatedForWoWLAN8723b(struct adapter *padapter, u8 bHostIsGoingtoSleep);
 184 #endif/* CONFIG_WOWLAN */
 185 
 186 void rtl8723b_set_FwPwrModeInIPS_cmd(struct adapter *padapter, u8 cmd_param);
 187 
 188 s32 FillH2CCmd8723B(struct adapter *padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
 189 
 190 #define FillH2CCmd FillH2CCmd8723B
 191 #endif
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/staging/rtl8723bs/include/rtl8723b_cmd.h

INCLUDED FROM
