1
2
3
4
5
6
7
8 #ifndef __HAL_PG_H__
9 #define __HAL_PG_H__
10
11 #define MAX_RF_PATH 4
12
13
14
15 #define MAX_TX_COUNT 4
16
17
18
19
20
21
22 #define TX_PWR_BY_RATE_NUM_BAND 2
23 #define TX_PWR_BY_RATE_NUM_RF 4
24 #define TX_PWR_BY_RATE_NUM_RATE 84
25 #define MAX_RF_PATH_NUM 2
26 #define MAX_CHNL_GROUP_24G 6
27 #define EEPROM_DEFAULT_BOARD_OPTION 0x00
28
29
30
31 #define EEPROM_TX_PWR_INX_8723B 0x10
32
33 #define EEPROM_DEFAULT_24G_INDEX 0x2D
34 #define EEPROM_DEFAULT_24G_HT20_DIFF 0X02
35 #define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04
36 #define EEPROM_Default_ThermalMeter_8723B 0x18
37 #define EEPROM_Default_CrystalCap_8723B 0x20
38
39 #define EEPROM_ChannelPlan_8723B 0xB8
40 #define EEPROM_XTAL_8723B 0xB9
41 #define EEPROM_THERMAL_METER_8723B 0xBA
42
43 #define EEPROM_RF_BOARD_OPTION_8723B 0xC1
44 #define EEPROM_RF_BT_SETTING_8723B 0xC3
45 #define EEPROM_VERSION_8723B 0xC4
46 #define EEPROM_CustomID_8723B 0xC5
47 #define EEPROM_DEFAULT_DIFF 0XFE
48
49
50 #define EEPROM_MAC_ADDR_8723BS 0x11A
51 #define EEPROM_Voltage_ADDR_8723B 0x8
52 #define RTL_EEPROM_ID 0x8129
53
54 struct TxPowerInfo24G {
55 u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
56 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
57
58 s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
59 s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
60 s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
61 s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
62 };
63
64 enum {
65 Ant_x2 = 0,
66 Ant_x1 = 1
67 };
68
69 enum {
70 BT_RTL8723B = 8,
71 };
72
73 #endif