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7 #ifndef __RTW_RF_H_
8 #define __RTW_RF_H_
9
10 #include <rtw_cmd.h>
11
12 #define OFDM_PHY 1
13 #define MIXED_PHY 2
14 #define CCK_PHY 3
15
16 #define NumRates (13)
17
18
19 #define SHORT_SLOT_TIME 9
20 #define NON_SHORT_SLOT_TIME 20
21
22 #define RTL8711_RF_MAX_SENS 6
23 #define RTL8711_RF_DEF_SENS 4
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29
30 #define MAX_CHANNEL_NUM_2G 14
31 #define MAX_CHANNEL_NUM 14
32
33 #define NUM_REGULATORYS 1
34
35
36 #define USA 0x555320
37 #define EUROPE 0x1
38 #define JAPAN 0x2
39
40 struct regulatory_class {
41 u32 starting_freq;
42 u8 channel_set[MAX_CHANNEL_NUM];
43 u8 channel_cck_power[MAX_CHANNEL_NUM];
44 u8 channel_ofdm_power[MAX_CHANNEL_NUM];
45 u8 txpower_limit;
46 u8 channel_spacing;
47 u8 modem;
48 };
49
50 enum capability {
51 cESS = 0x0001,
52 cIBSS = 0x0002,
53 cPollable = 0x0004,
54 cPollReq = 0x0008,
55 cPrivacy = 0x0010,
56 cShortPreamble = 0x0020,
57 cPBCC = 0x0040,
58 cChannelAgility = 0x0080,
59 cSpectrumMgnt = 0x0100,
60 cQos = 0x0200,
61
62
63 cShortSlotTime = 0x0400,
64 cAPSD = 0x0800,
65 cRM = 0x1000,
66 cDSSS_OFDM = 0x2000,
67 cDelayedBA = 0x4000,
68 cImmediateBA = 0x8000,
69 };
70
71 enum _REG_PREAMBLE_MODE {
72 PREAMBLE_LONG = 1,
73 PREAMBLE_AUTO = 2,
74 PREAMBLE_SHORT = 3,
75 };
76
77 enum _RTL8712_RF_MIMO_CONFIG_ {
78 RTL8712_RFCONFIG_1T = 0x10,
79 RTL8712_RFCONFIG_2T = 0x20,
80 RTL8712_RFCONFIG_1R = 0x01,
81 RTL8712_RFCONFIG_2R = 0x02,
82 RTL8712_RFCONFIG_1T1R = 0x11,
83 RTL8712_RFCONFIG_1T2R = 0x12,
84 RTL8712_RFCONFIG_TURBO = 0x92,
85 RTL8712_RFCONFIG_2T2R = 0x22
86 };
87
88 enum rf90_radio_path {
89 RF90_PATH_A = 0,
90 RF90_PATH_B = 1,
91 RF90_PATH_C = 2,
92 RF90_PATH_D = 3
93 };
94
95
96 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
97 #define HAL_PRIME_CHNL_OFFSET_LOWER 1
98 #define HAL_PRIME_CHNL_OFFSET_UPPER 2
99
100
101
102 enum ht_channel_width {
103 HT_CHANNEL_WIDTH_20 = 0,
104 HT_CHANNEL_WIDTH_40 = 1,
105 HT_CHANNEL_WIDTH_80 = 2,
106 HT_CHANNEL_WIDTH_160 = 3,
107 HT_CHANNEL_WIDTH_10 = 4,
108 };
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113
114 enum ht_extchnl_offset {
115 HT_EXTCHNL_OFFSET_NO_EXT = 0,
116 HT_EXTCHNL_OFFSET_UPPER = 1,
117 HT_EXTCHNL_OFFSET_NO_DEF = 2,
118 HT_EXTCHNL_OFFSET_LOWER = 3,
119 };
120
121
122 enum rt_rf_type_def {
123 RF_1T2R = 0,
124 RF_2T4R = 1,
125 RF_2T2R = 2,
126 RF_1T1R = 3,
127 RF_2T2R_GREEN = 4,
128 RF_819X_MAX_TYPE = 5,
129 };
130
131 u32 rtw_ch2freq(u32 ch);
132
133
134 #endif