root/drivers/staging/rtl8188eu/hal/pwrseq.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7 
   8 #include "pwrseq.h"
   9 #include <rtl8188e_hal.h>
  10 
  11 /* drivers should parse below arrays and do the corresponding actions */
  12 
  13 /* 3 Power on  Array */
  14 struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
  15                                          RTL8188E_TRANS_END_STEPS] = {
  16         RTL8188E_TRANS_CARDEMU_TO_ACT
  17         RTL8188E_TRANS_END
  18 };
  19 
  20 /* 3Radio off Array */
  21 struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  22                                           RTL8188E_TRANS_END_STEPS] = {
  23         RTL8188E_TRANS_ACT_TO_CARDEMU
  24         RTL8188E_TRANS_END
  25 };
  26 
  27 /* 3Card Disable Array */
  28 struct wl_pwr_cfg rtl8188E_card_disable_flow
  29         [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  30          RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  31          RTL8188E_TRANS_END_STEPS] = {
  32                 RTL8188E_TRANS_ACT_TO_CARDEMU
  33                 RTL8188E_TRANS_CARDEMU_TO_CARDDIS
  34                 RTL8188E_TRANS_END
  35 };
  36 
  37 /* 3 Card Enable Array */
  38 struct wl_pwr_cfg rtl8188E_card_enable_flow
  39         [RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  40          RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  41          RTL8188E_TRANS_END_STEPS] = {
  42                 RTL8188E_TRANS_CARDDIS_TO_CARDEMU
  43                 RTL8188E_TRANS_CARDEMU_TO_ACT
  44                 RTL8188E_TRANS_END
  45 };
  46 
  47 /* 3Suspend Array */
  48 struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  49                                         RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
  50                                         RTL8188E_TRANS_END_STEPS] = {
  51         RTL8188E_TRANS_ACT_TO_CARDEMU
  52         RTL8188E_TRANS_CARDEMU_TO_SUS
  53         RTL8188E_TRANS_END
  54 };
  55 
  56 /* 3 Resume Array */
  57 struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  58                                        RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
  59                                        RTL8188E_TRANS_END_STEPS] = {
  60         RTL8188E_TRANS_SUS_TO_CARDEMU
  61         RTL8188E_TRANS_CARDEMU_TO_ACT
  62         RTL8188E_TRANS_END
  63 };
  64 
  65 /* 3HWPDN Array */
  66 struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
  67                                       RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
  68                                       RTL8188E_TRANS_END_STEPS] = {
  69         RTL8188E_TRANS_ACT_TO_CARDEMU
  70         RTL8188E_TRANS_CARDEMU_TO_PDN
  71         RTL8188E_TRANS_END
  72 };
  73 
  74 /* 3 Enter LPS */
  75 struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
  76                                           RTL8188E_TRANS_END_STEPS] = {
  77         /* FW behavior */
  78         RTL8188E_TRANS_ACT_TO_LPS
  79         RTL8188E_TRANS_END
  80 };
  81 
  82 /* 3 Leave LPS */
  83 struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
  84                                           RTL8188E_TRANS_END_STEPS] = {
  85         /* FW behavior */
  86         RTL8188E_TRANS_LPS_TO_ACT
  87         RTL8188E_TRANS_END
  88 };