drivers/staging/rtl8188eu/hal/usb

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This source file includes following definitions.
_ConfigNormalChipOutEP_8188E
HalUsbSetQueuePipeMapping8188EUsb
rtw_hal_chip_configure
rtw_hal_power_on
_InitInterrupt
_InitQueueReservedPage
_InitTxBufferBoundary
_InitPageBoundary
_InitNormalChipRegPriority
_InitNormalChipOneOutEpPriority
_InitNormalChipTwoOutEpPriority
_InitNormalChipThreeOutEpPriority
_InitQueuePriority
_InitNetworkType
_InitTransferPageSize
_InitDriverInfoSize
_InitWMACSetting
_InitAdaptiveCtrl
_InitEDCA
_InitRDGSetting
_InitRxSetting
_InitRetryFunction
usb_AggSettingTxUpdate
usb_AggSettingRxUpdate
InitUsbAggregationSetting
_InitBeaconParameters
_BeaconFunctionEnable
_BBTurnOnBlock
_InitAntenna_Selection
RfOnOffDetect
rtl8188eu_hal_init
CardDisableRTL8188EU
rtl8192cu_hw_power_down
rtl8188eu_hal_deinit
rtw_hal_inirp_init
Hal_EfuseParsePIDVID_8188EU
Hal_EfuseParseMACAddr_8188EU
readAdapterInfo_8188EU
_ReadPROMContent
rtw_hal_read_chip_info
rtl8192cu_trigger_gpio_0
ResumeTxBeacon
StopTxBeacon
hw_var_set_opmode
hw_var_set_macaddr
hw_var_set_bssid
hw_var_set_bcn_func
rtw_hal_set_hwreg
rtw_hal_get_hwreg
rtw_hal_get_def_var
UpdateHalRAMask8188EUsb
beacon_timing_control
rtw_hal_def_value_init
   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7 #define _HCI_HAL_INIT_C_
   8 
   9 #include <osdep_service.h>
  10 #include <drv_types.h>
  11 #include <rtw_efuse.h>
  12 #include <fw.h>
  13 #include <rtl8188e_hal.h>
  14 #include <phy.h>
  15 
  16 #define         HAL_BB_ENABLE           1
  17 
  18 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  19 {
  20         struct hal_data_8188e *haldata = adapt->HalData;
  21 
  22         switch (NumOutPipe) {
  23         case    3:
  24                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  25                 haldata->OutEpNumber = 3;
  26                 break;
  27         case    2:
  28                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  29                 haldata->OutEpNumber = 2;
  30                 break;
  31         case    1:
  32                 haldata->OutEpQueueSel = TX_SELE_HQ;
  33                 haldata->OutEpNumber = 1;
  34                 break;
  35         default:
  36                 break;
  37         }
  38         DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
  39 }
  40 
  41 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  42 {
  43         bool                    result          = false;
  44 
  45         _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  46 
  47         /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  48         if (adapt->HalData->OutEpNumber == 1) {
  49                 if (NumInPipe != 1)
  50                         return result;
  51         }
  52 
  53         /*  All config other than above support one Bulk IN and one Interrupt IN. */
  54 
  55         result = hal_mapping_out_pipe(adapt, NumOutPipe);
  56 
  57         return result;
  58 }
  59 
  60 void rtw_hal_chip_configure(struct adapter *adapt)
  61 {
  62         struct hal_data_8188e *haldata = adapt->HalData;
  63         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  64 
  65         if (pdvobjpriv->ishighspeed)
  66                 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  67         else
  68                 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  69 
  70         haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  71 
  72         haldata->UsbTxAggMode           = 1;
  73         haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  74 
  75         haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  76         haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  77         haldata->UsbRxAggBlockTimeout   = 0x6;
  78         haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  79         haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  80 
  81         HalUsbSetQueuePipeMapping8188EUsb(adapt,
  82                                 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
  83 }
  84 
  85 u32 rtw_hal_power_on(struct adapter *adapt)
  86 {
  87         u16 value16;
  88         /*  HW Power on sequence */
  89         if (adapt->HalData->bMacPwrCtrlOn)
  90                 return _SUCCESS;
  91 
  92         if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
  93                                       Rtl8188E_NIC_PWR_ON_FLOW)) {
  94                 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
  95                 return _FAIL;
  96         }
  97 
  98         /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
  99         /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 100         usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
 101 
 102                 /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 103         value16 = usb_read16(adapt, REG_CR);
 104         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 105                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 106         /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 107 
 108         usb_write16(adapt, REG_CR, value16);
 109         adapt->HalData->bMacPwrCtrlOn = true;
 110 
 111         return _SUCCESS;
 112 }
 113 
 114 /*  Shall USB interface init this? */
 115 static void _InitInterrupt(struct adapter *Adapter)
 116 {
 117         u32 imr, imr_ex;
 118         u8  usb_opt;
 119 
 120         /* HISR write one to clear */
 121         usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 122         /*  HIMR - */
 123         imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 124         usb_write32(Adapter, REG_HIMR_88E, imr);
 125         Adapter->HalData->IntrMask[0] = imr;
 126 
 127         imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 128         usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 129         Adapter->HalData->IntrMask[1] = imr_ex;
 130 
 131         /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 132         /*  0; Use interrupt endpoint to upload interrupt pkt */
 133         /*  1; Use bulk endpoint to upload interrupt pkt, */
 134         usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 135 
 136         if (!adapter_to_dvobj(Adapter)->ishighspeed)
 137                 usb_opt = usb_opt & (~INT_BULK_SEL);
 138         else
 139                 usb_opt = usb_opt | (INT_BULK_SEL);
 140 
 141         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 142 }
 143 
 144 static void _InitQueueReservedPage(struct adapter *Adapter)
 145 {
 146         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 147         u32 numHQ       = 0;
 148         u32 numLQ       = 0;
 149         u32 numNQ       = 0;
 150         u32 numPubQ;
 151         u32 value32;
 152         u8 value8;
 153         bool bWiFiConfig = pregistrypriv->wifi_spec;
 154 
 155         if (bWiFiConfig) {
 156                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_HQ)
 157                         numHQ =  0x29;
 158 
 159                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_LQ)
 160                         numLQ = 0x1C;
 161 
 162                 /*  NOTE: This step shall be proceed before writing REG_RQPN. */
 163                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_NQ)
 164                         numNQ = 0x1C;
 165                 value8 = (u8)_NPQ(numNQ);
 166                 usb_write8(Adapter, REG_RQPN_NPQ, value8);
 167 
 168                 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 169 
 170                 /*  TX DMA */
 171                 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 172                 usb_write32(Adapter, REG_RQPN, value32);
 173         } else {
 174                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 175                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 176                 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 177         }
 178 }
 179 
 180 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 181 {
 182         usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 183         usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 184         usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 185         usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 186         usb_write8(Adapter, REG_TDECTRL + 1, txpktbuf_bndy);
 187 }
 188 
 189 static void _InitPageBoundary(struct adapter *Adapter)
 190 {
 191         /*  RX Page Boundary */
 192         /*  */
 193         u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E - 1;
 194 
 195         usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 196 }
 197 
 198 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 199                                        u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 200                                        u16 hiQ)
 201 {
 202         u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 203 
 204         value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 205                    _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 206                    _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 207 
 208         usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 209 }
 210 
 211 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 212 {
 213         u16 value = 0;
 214 
 215         switch (Adapter->HalData->OutEpQueueSel) {
 216         case TX_SELE_HQ:
 217                 value = QUEUE_HIGH;
 218                 break;
 219         case TX_SELE_LQ:
 220                 value = QUEUE_LOW;
 221                 break;
 222         case TX_SELE_NQ:
 223                 value = QUEUE_NORMAL;
 224                 break;
 225         default:
 226                 break;
 227         }
 228         _InitNormalChipRegPriority(Adapter, value, value, value, value,
 229                                    value, value);
 230 }
 231 
 232 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 233 {
 234         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 235         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 236         u16 valueHi = 0;
 237         u16 valueLow = 0;
 238 
 239         switch (Adapter->HalData->OutEpQueueSel) {
 240         case (TX_SELE_HQ | TX_SELE_LQ):
 241                 valueHi = QUEUE_HIGH;
 242                 valueLow = QUEUE_LOW;
 243                 break;
 244         case (TX_SELE_NQ | TX_SELE_LQ):
 245                 valueHi = QUEUE_NORMAL;
 246                 valueLow = QUEUE_LOW;
 247                 break;
 248         case (TX_SELE_HQ | TX_SELE_NQ):
 249                 valueHi = QUEUE_HIGH;
 250                 valueLow = QUEUE_NORMAL;
 251                 break;
 252         default:
 253                 break;
 254         }
 255 
 256         if (!pregistrypriv->wifi_spec) {
 257                 beQ     = valueLow;
 258                 bkQ     = valueLow;
 259                 viQ     = valueHi;
 260                 voQ     = valueHi;
 261                 mgtQ    = valueHi;
 262                 hiQ     = valueHi;
 263         } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 264                 beQ     = valueLow;
 265                 bkQ     = valueHi;
 266                 viQ     = valueHi;
 267                 voQ     = valueLow;
 268                 mgtQ    = valueHi;
 269                 hiQ     = valueHi;
 270         }
 271         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 272 }
 273 
 274 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 275 {
 276         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 277         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 278 
 279         if (!pregistrypriv->wifi_spec) {/*  typical setting */
 280                 beQ     = QUEUE_LOW;
 281                 bkQ     = QUEUE_LOW;
 282                 viQ     = QUEUE_NORMAL;
 283                 voQ     = QUEUE_HIGH;
 284                 mgtQ    = QUEUE_HIGH;
 285                 hiQ     = QUEUE_HIGH;
 286         } else {/*  for WMM */
 287                 beQ     = QUEUE_LOW;
 288                 bkQ     = QUEUE_NORMAL;
 289                 viQ     = QUEUE_NORMAL;
 290                 voQ     = QUEUE_HIGH;
 291                 mgtQ    = QUEUE_HIGH;
 292                 hiQ     = QUEUE_HIGH;
 293         }
 294         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 295 }
 296 
 297 static void _InitQueuePriority(struct adapter *Adapter)
 298 {
 299         switch (Adapter->HalData->OutEpNumber) {
 300         case 1:
 301                 _InitNormalChipOneOutEpPriority(Adapter);
 302                 break;
 303         case 2:
 304                 _InitNormalChipTwoOutEpPriority(Adapter);
 305                 break;
 306         case 3:
 307                 _InitNormalChipThreeOutEpPriority(Adapter);
 308                 break;
 309         default:
 310                 break;
 311         }
 312 }
 313 
 314 static void _InitNetworkType(struct adapter *Adapter)
 315 {
 316         u32 value32;
 317 
 318         value32 = usb_read32(Adapter, REG_CR);
 319         /*  TODO: use the other function to set network type */
 320         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 321 
 322         usb_write32(Adapter, REG_CR, value32);
 323 }
 324 
 325 static void _InitTransferPageSize(struct adapter *Adapter)
 326 {
 327         /*  Tx page size is always 128. */
 328 
 329         u8 value8;
 330 
 331         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 332         usb_write8(Adapter, REG_PBP, value8);
 333 }
 334 
 335 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 336 {
 337         usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 338 }
 339 
 340 static void _InitWMACSetting(struct adapter *Adapter)
 341 {
 342         struct hal_data_8188e *haldata = Adapter->HalData;
 343 
 344         haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 345                                   RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 346                                   RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 347                                   RCR_APP_MIC | RCR_APP_PHYSTS;
 348 
 349         /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 350         usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 351 
 352         /*  Accept all multicast address */
 353         usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 354         usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 355 }
 356 
 357 static void _InitAdaptiveCtrl(struct adapter *Adapter)
 358 {
 359         u16 value16;
 360         u32 value32;
 361 
 362         /*  Response Rate Set */
 363         value32 = usb_read32(Adapter, REG_RRSR);
 364         value32 &= ~RATE_BITMAP_ALL;
 365         value32 |= RATE_RRSR_CCK_ONLY_1M;
 366         usb_write32(Adapter, REG_RRSR, value32);
 367 
 368         /*  CF-END Threshold */
 369 
 370         /*  SIFS (used in NAV) */
 371         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 372         usb_write16(Adapter, REG_SPEC_SIFS, value16);
 373 
 374         /*  Retry Limit */
 375         value16 = _LRL(0x30) | _SRL(0x30);
 376         usb_write16(Adapter, REG_RL, value16);
 377 }
 378 
 379 static void _InitEDCA(struct adapter *Adapter)
 380 {
 381         /*  Set Spec SIFS (used in NAV) */
 382         usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 383         usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 384 
 385         /*  Set SIFS for CCK */
 386         usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 387 
 388         /*  Set SIFS for OFDM */
 389         usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 390 
 391         /*  TXOP */
 392         usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 393         usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 394         usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 395         usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 396 }
 397 
 398 static void _InitRDGSetting(struct adapter *Adapter)
 399 {
 400         usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 401         usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 402         usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 403 }
 404 
 405 static void _InitRxSetting(struct adapter *Adapter)
 406 {
 407         usb_write32(Adapter, REG_MACID, 0x87654321);
 408         usb_write32(Adapter, 0x0700, 0x87654321);
 409 }
 410 
 411 static void _InitRetryFunction(struct adapter *Adapter)
 412 {
 413         u8 value8;
 414 
 415         value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 416         value8 |= EN_AMPDU_RTY_NEW;
 417         usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 418 
 419         /*  Set ACK timeout */
 420         usb_write8(Adapter, REG_ACKTO, 0x40);
 421 }
 422 
 423 /*-----------------------------------------------------------------------------
 424  * Function:    usb_AggSettingTxUpdate()
 425  *
 426  * Overview:    Separate TX/RX parameters update independent for TP detection and
 427  *                      dynamic TX/RX aggreagtion parameters update.
 428  *
 429  * Input:                       struct adapter *
 430  *
 431  * Output/Return:       NONE
 432  *
 433  * Revised History:
 434  *      When            Who             Remark
 435  *      12/10/2010      MHC             Separate to smaller function.
 436  *
 437  *---------------------------------------------------------------------------
 438  */
 439 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 440 {
 441         struct hal_data_8188e *haldata = Adapter->HalData;
 442         u32 value32;
 443 
 444         if (Adapter->registrypriv.wifi_spec)
 445                 haldata->UsbTxAggMode = false;
 446 
 447         if (haldata->UsbTxAggMode) {
 448                 value32 = usb_read32(Adapter, REG_TDECTRL);
 449                 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 450                 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 451 
 452                 usb_write32(Adapter, REG_TDECTRL, value32);
 453         }
 454 }       /*  usb_AggSettingTxUpdate */
 455 
 456 /*-----------------------------------------------------------------------------
 457  * Function:    usb_AggSettingRxUpdate()
 458  *
 459  * Overview:    Separate TX/RX parameters update independent for TP detection and
 460  *                      dynamic TX/RX aggreagtion parameters update.
 461  *
 462  * Input:                       struct adapter *
 463  *
 464  * Output/Return:       NONE
 465  *
 466  * Revised History:
 467  *      When            Who             Remark
 468  *      12/10/2010      MHC             Separate to smaller function.
 469  *
 470  *---------------------------------------------------------------------------
 471  */
 472 static void usb_AggSettingRxUpdate(struct adapter *Adapter)
 473 {
 474         struct hal_data_8188e *haldata = Adapter->HalData;
 475         u8 valueDMA;
 476         u8 valueUSB;
 477 
 478         valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 479         valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 480 
 481         switch (haldata->UsbRxAggMode) {
 482         case USB_RX_AGG_DMA:
 483                 valueDMA |= RXDMA_AGG_EN;
 484                 valueUSB &= ~USB_AGG_EN;
 485                 break;
 486         case USB_RX_AGG_USB:
 487                 valueDMA &= ~RXDMA_AGG_EN;
 488                 valueUSB |= USB_AGG_EN;
 489                 break;
 490         case USB_RX_AGG_MIX:
 491                 valueDMA |= RXDMA_AGG_EN;
 492                 valueUSB |= USB_AGG_EN;
 493                 break;
 494         case USB_RX_AGG_DISABLE:
 495         default:
 496                 valueDMA &= ~RXDMA_AGG_EN;
 497                 valueUSB &= ~USB_AGG_EN;
 498                 break;
 499         }
 500 
 501         usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 502         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 503 
 504         switch (haldata->UsbRxAggMode) {
 505         case USB_RX_AGG_DMA:
 506                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 507                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, haldata->UsbRxAggPageTimeout);
 508                 break;
 509         case USB_RX_AGG_USB:
 510                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 511                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 512                 break;
 513         case USB_RX_AGG_MIX:
 514                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 515                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 516                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 517                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 518                 break;
 519         case USB_RX_AGG_DISABLE:
 520         default:
 521                 /*  TODO: */
 522                 break;
 523         }
 524 
 525         switch (PBP_128) {
 526         case PBP_128:
 527                 haldata->HwRxPageSize = 128;
 528                 break;
 529         case PBP_64:
 530                 haldata->HwRxPageSize = 64;
 531                 break;
 532         case PBP_256:
 533                 haldata->HwRxPageSize = 256;
 534                 break;
 535         case PBP_512:
 536                 haldata->HwRxPageSize = 512;
 537                 break;
 538         case PBP_1024:
 539                 haldata->HwRxPageSize = 1024;
 540                 break;
 541         default:
 542                 break;
 543         }
 544 }       /*  usb_AggSettingRxUpdate */
 545 
 546 static void InitUsbAggregationSetting(struct adapter *Adapter)
 547 {
 548         /*  Tx aggregation setting */
 549         usb_AggSettingTxUpdate(Adapter);
 550 
 551         /*  Rx aggregation setting */
 552         usb_AggSettingRxUpdate(Adapter);
 553 }
 554 
 555 static void _InitBeaconParameters(struct adapter *Adapter)
 556 {
 557         struct hal_data_8188e *haldata = Adapter->HalData;
 558 
 559         usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 560 
 561         /*  TODO: Remove these magic number */
 562         usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 563         usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 564         usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 565 
 566         /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 567         /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 568         usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 569 
 570         haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
 571         haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
 572         haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL + 2);
 573         haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT + 2);
 574         haldata->RegCR_1 = usb_read8(Adapter, REG_CR + 1);
 575 }
 576 
 577 static void _BeaconFunctionEnable(struct adapter *Adapter,
 578                                   bool Enable, bool Linked)
 579 {
 580         usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
 581 
 582         usb_write8(Adapter, REG_RD_CTRL + 1, 0x6F);
 583 }
 584 
 585 /*  Set CCK and OFDM Block "ON" */
 586 static void _BBTurnOnBlock(struct adapter *Adapter)
 587 {
 588         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 589         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 590 }
 591 
 592 static void _InitAntenna_Selection(struct adapter *Adapter)
 593 {
 594         struct hal_data_8188e *haldata = Adapter->HalData;
 595 
 596         if (haldata->AntDivCfg == 0)
 597                 return;
 598         DBG_88E("==>  %s ....\n", __func__);
 599 
 600         usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
 601         phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
 602 
 603         if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 604                 haldata->CurAntenna = Antenna_A;
 605         else
 606                 haldata->CurAntenna = Antenna_B;
 607         DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
 608 }
 609 
 610 /*-----------------------------------------------------------------------------
 611  * Function:    HwSuspendModeEnable92Cu()
 612  *
 613  * Overview:    HW suspend mode switch.
 614  *
 615  * Input:               NONE
 616  *
 617  * Output:      NONE
 618  *
 619  * Return:      NONE
 620  *
 621  * Revised History:
 622  *      When            Who             Remark
 623  *      08/23/2010      MHC             HW suspend mode switch test..
 624  *---------------------------------------------------------------------------
 625  */
 626 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 627 {
 628         u8 val8;
 629         enum rt_rf_power_state rfpowerstate = rf_off;
 630 
 631         if (adapt->pwrctrlpriv.bHWPowerdown) {
 632                 val8 = usb_read8(adapt, REG_HSISR);
 633                 DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
 634                 rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
 635         } else { /*  rf on/off */
 636                 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG) & ~(BIT(3)));
 637                 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 638                 DBG_88E("GPIO_IN=%02x\n", val8);
 639                 rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
 640         }
 641         return rfpowerstate;
 642 }       /*  HalDetectPwrDownMode */
 643 
 644 u32 rtl8188eu_hal_init(struct adapter *Adapter)
 645 {
 646         u8 value8 = 0;
 647         u16  value16;
 648         u8 txpktbuf_bndy;
 649         u32 status = _SUCCESS;
 650         struct hal_data_8188e *haldata = Adapter->HalData;
 651         struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 652         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 653         unsigned long init_start_time = jiffies;
 654 
 655         #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
 656 
 657         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
 658 
 659         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 660                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 661                         rtl88eu_phy_iq_calibrate(Adapter, true);
 662                 } else {
 663                         rtl88eu_phy_iq_calibrate(Adapter, false);
 664                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 665                 }
 666 
 667                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 668                 rtl88eu_phy_lc_calibrate(Adapter);
 669 
 670                 goto exit;
 671         }
 672 
 673         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
 674         status = rtw_hal_power_on(Adapter);
 675         if (status == _FAIL) {
 676                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
 677                 goto exit;
 678         }
 679 
 680         /*  Save target channel */
 681         haldata->CurrentChannel = 6;/* default set to 6 */
 682 
 683         if (pwrctrlpriv->reg_rfoff)
 684                 pwrctrlpriv->rf_pwrstate = rf_off;
 685 
 686         /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 687         /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 688         /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 689 
 690         if (!pregistrypriv->wifi_spec) {
 691                 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 692         } else {
 693                 /*  for WMM */
 694                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 695         }
 696 
 697         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
 698         _InitQueueReservedPage(Adapter);
 699         _InitQueuePriority(Adapter);
 700         _InitPageBoundary(Adapter);
 701         _InitTransferPageSize(Adapter);
 702 
 703         _InitTxBufferBoundary(Adapter, 0);
 704 
 705         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
 706         if (Adapter->registrypriv.mp_mode == 1) {
 707                 _InitRxSetting(Adapter);
 708                 Adapter->bFWReady = false;
 709         } else {
 710                 status = rtl88eu_download_fw(Adapter);
 711 
 712                 if (status) {
 713                         DBG_88E("%s: Download Firmware failed!!\n", __func__);
 714                         Adapter->bFWReady = false;
 715                         return status;
 716                 }
 717                 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
 718                 Adapter->bFWReady = true;
 719         }
 720         rtl8188e_InitializeFirmwareVars(Adapter);
 721 
 722         rtl88eu_phy_mac_config(Adapter);
 723 
 724         rtl88eu_phy_bb_config(Adapter);
 725 
 726         rtl88eu_phy_rf_config(Adapter);
 727 
 728         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
 729         status = rtl8188e_iol_efuse_patch(Adapter);
 730         if (status == _FAIL) {
 731                 DBG_88E("%s  rtl8188e_iol_efuse_patch failed\n", __func__);
 732                 goto exit;
 733         }
 734 
 735         _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 736 
 737         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
 738         status =  InitLLTTable(Adapter, txpktbuf_bndy);
 739         if (status == _FAIL) {
 740                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
 741                 goto exit;
 742         }
 743 
 744         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
 745         /*  Get Rx PHY status in order to report RSSI and others. */
 746         _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 747 
 748         _InitInterrupt(Adapter);
 749         rtw_hal_set_hwreg(Adapter, HW_VAR_MAC_ADDR,
 750                           Adapter->eeprompriv.mac_addr);
 751         _InitNetworkType(Adapter);/* set msr */
 752         _InitWMACSetting(Adapter);
 753         _InitAdaptiveCtrl(Adapter);
 754         _InitEDCA(Adapter);
 755         _InitRetryFunction(Adapter);
 756         InitUsbAggregationSetting(Adapter);
 757         _InitBeaconParameters(Adapter);
 758         /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 759         /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 760         /*  Enable MACTXEN/MACRXEN block */
 761         value16 = usb_read16(Adapter, REG_CR);
 762         value16 |= (MACTXEN | MACRXEN);
 763         usb_write8(Adapter, REG_CR, value16);
 764 
 765         if (haldata->bRDGEnable)
 766                 _InitRDGSetting(Adapter);
 767 
 768         /* Enable TX Report */
 769         /* Enable Tx Report Timer */
 770         value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 771         usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
 772         /* Set MAX RPT MACID */
 773         usb_write8(Adapter,  REG_TX_RPT_CTRL + 1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 774         /* Tx RPT Timer. Unit: 32us */
 775         usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 776 
 777         usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 778 
 779         usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 780         usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 781 
 782         /* Keep RfRegChnlVal for later use. */
 783         haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 784         haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 785 
 786         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
 787         _BBTurnOnBlock(Adapter);
 788 
 789         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 790         invalidate_cam_all(Adapter);
 791 
 792         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
 793         /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 794         phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 795 
 796 /*  Move by Neo for USB SS to below setp */
 797 /* _RfPowerSave(Adapter); */
 798 
 799         _InitAntenna_Selection(Adapter);
 800 
 801         /*  */
 802         /*  Disable BAR, suggested by Scott */
 803         /*  2010.04.09 add by hpfan */
 804         /*  */
 805         usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 806 
 807         /*  HW SEQ CTRL */
 808         /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 809         usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 810 
 811         if (pregistrypriv->wifi_spec)
 812                 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 813 
 814         /* Nav limit , suggest by scott */
 815         usb_write8(Adapter, 0x652, 0x0);
 816 
 817         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
 818         rtl8188e_InitHalDm(Adapter);
 819 
 820         /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 821         /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 822         /*  call initstruct adapter. May cause some problem?? */
 823         /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 824         /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 825         /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 826         /*  Added by tynli. 2010.03.30. */
 827         pwrctrlpriv->rf_pwrstate = rf_on;
 828 
 829         /*  enable Tx report. */
 830         usb_write8(Adapter,  REG_FWHW_TXQ_CTRL + 1, 0x0F);
 831 
 832         /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 833         usb_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 834 
 835         /* tynli_test_tx_report. */
 836         usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 837 
 838         /* enable tx DMA to drop the redundate data of packet */
 839         usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 840 
 841         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
 842         /*  2010/08/26 MH Merge from 8192CE. */
 843         if (pwrctrlpriv->rf_pwrstate == rf_on) {
 844                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 845                         rtl88eu_phy_iq_calibrate(Adapter, true);
 846                 } else {
 847                         rtl88eu_phy_iq_calibrate(Adapter, false);
 848                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 849                 }
 850 
 851                 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
 852 
 853                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 854 
 855                 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
 856                 rtl88eu_phy_lc_calibrate(Adapter);
 857         }
 858 
 859 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
 860 /*      _InitPABias(Adapter); */
 861         usb_write8(Adapter, REG_USB_HRPWM, 0);
 862 
 863         /* ack for xmit mgmt frames. */
 864         usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
 865 
 866 exit:
 867         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
 868 
 869         DBG_88E("%s in %dms\n", __func__,
 870                 jiffies_to_msecs(jiffies - init_start_time));
 871 
 872         return status;
 873 }
 874 
 875 static void CardDisableRTL8188EU(struct adapter *Adapter)
 876 {
 877         u8 val8;
 878 
 879         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
 880 
 881         /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 882         val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 883         usb_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT(1)));
 884 
 885         /*  stop rx */
 886         usb_write8(Adapter, REG_CR, 0x0);
 887 
 888         /*  Run LPS WL RFOFF flow */
 889         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 890                                  Rtl8188E_NIC_LPS_ENTER_FLOW);
 891 
 892         /*  2. 0x1F[7:0] = 0            turn off RF */
 893 
 894         val8 = usb_read8(Adapter, REG_MCUFWDL);
 895         if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 896                 /*  Reset MCU 0x2[10]=0. */
 897                 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN + 1);
 898                 val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 899                 usb_write8(Adapter, REG_SYS_FUNC_EN + 1, val8);
 900         }
 901 
 902         /*  reset MCU ready status */
 903         usb_write8(Adapter, REG_MCUFWDL, 0);
 904 
 905         /* YJ,add,111212 */
 906         /* Disable 32k */
 907         val8 = usb_read8(Adapter, REG_32K_CTRL);
 908         usb_write8(Adapter, REG_32K_CTRL, val8 & (~BIT(0)));
 909 
 910         /*  Card disable power action flow */
 911         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 912                                  Rtl8188E_NIC_DISABLE_FLOW);
 913 
 914         /*  Reset MCU IO Wrapper */
 915         val8 = usb_read8(Adapter, REG_RSV_CTRL + 1);
 916         usb_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT(3))));
 917         val8 = usb_read8(Adapter, REG_RSV_CTRL + 1);
 918         usb_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT(3));
 919 
 920         /* YJ,test add, 111207. For Power Consumption. */
 921         val8 = usb_read8(Adapter, GPIO_IN);
 922         usb_write8(Adapter, GPIO_OUT, val8);
 923         usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 924 
 925         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 926         usb_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4));
 927         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL + 1);
 928         usb_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F);/* Reg0x43 */
 929         usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 930         Adapter->HalData->bMacPwrCtrlOn = false;
 931         Adapter->bFWReady = false;
 932 }
 933 
 934 static void rtl8192cu_hw_power_down(struct adapter *adapt)
 935 {
 936         /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 937         /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 938 
 939         /*  Enable register area 0x0-0xc. */
 940         usb_write8(adapt, REG_RSV_CTRL, 0x0);
 941         usb_write16(adapt, REG_APS_FSMCO, 0x8812);
 942 }
 943 
 944 u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
 945 {
 946         DBG_88E("==> %s\n", __func__);
 947 
 948         usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
 949         usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
 950 
 951         DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
 952         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 953                 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 954                         rtl8192cu_hw_power_down(Adapter);
 955         } else {
 956                 if (Adapter->hw_init_completed) {
 957                         CardDisableRTL8188EU(Adapter);
 958 
 959                         if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 960                                 rtl8192cu_hw_power_down(Adapter);
 961                 }
 962         }
 963         return _SUCCESS;
 964 }
 965 
 966 u32 rtw_hal_inirp_init(struct adapter *Adapter)
 967 {
 968         u8 i;
 969         struct recv_buf *precvbuf;
 970         uint    status;
 971         struct recv_priv *precvpriv = &Adapter->recvpriv;
 972 
 973         status = _SUCCESS;
 974 
 975         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
 976                  ("===> usb_inirp_init\n"));
 977 
 978         /* issue Rx irp to receive data */
 979         precvbuf = precvpriv->precv_buf;
 980         for (i = 0; i < NR_RECVBUFF; i++) {
 981                 if (!usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf)) {
 982                         RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
 983                         status = _FAIL;
 984                         goto exit;
 985                 }
 986 
 987                 precvbuf++;
 988         }
 989 
 990 exit:
 991 
 992         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
 993 
 994         return status;
 995 }
 996 
 997 /*  */
 998 /*  */
 999 /*      EEPROM/EFUSE Content Parsing */
1000 /*  */
1001 /*  */
1002 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1003 {
1004         struct hal_data_8188e *haldata = adapt->HalData;
1005 
1006         if (!AutoLoadFail) {
1007                 /*  VID, PID */
1008                 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1009                 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1010 
1011                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1012                 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1013                 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1014         } else {
1015                 haldata->EEPROMVID                      = EEPROM_Default_VID;
1016                 haldata->EEPROMPID                      = EEPROM_Default_PID;
1017 
1018                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1019                 haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
1020                 haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
1021         }
1022 
1023         DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1024         DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1025 }
1026 
1027 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1028 {
1029         u16 i;
1030         u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1031         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1032 
1033         if (AutoLoadFail) {
1034                 for (i = 0; i < 6; i++)
1035                         eeprom->mac_addr[i] = sMacAddr[i];
1036         } else {
1037                 /* Read Permanent MAC address */
1038                 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1039         }
1040         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1041                  ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1042                  eeprom->mac_addr));
1043 }
1044 
1045 static void readAdapterInfo_8188EU(struct adapter *adapt)
1046 {
1047         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1048 
1049         /* parse the eeprom/efuse content */
1050         Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1051         Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1052         Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1053 
1054         Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1055         Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1056         Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1057         rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1058         Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1059         Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1060         Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1061         Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1062         Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1063 }
1064 
1065 static void _ReadPROMContent(struct adapter *Adapter)
1066 {
1067         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1068         u8 eeValue;
1069 
1070         /* check system boot selection */
1071         eeValue = usb_read8(Adapter, REG_9346CR);
1072         eeprom->EepromOrEfuse           = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1073         eeprom->bautoload_fail_flag     = (eeValue & EEPROM_EN) ? false : true;
1074 
1075         DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1076                 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1077 
1078         Hal_InitPGData88E(Adapter);
1079         readAdapterInfo_8188EU(Adapter);
1080 }
1081 
1082 void rtw_hal_read_chip_info(struct adapter *Adapter)
1083 {
1084         unsigned long start = jiffies;
1085 
1086         MSG_88E("====> %s\n", __func__);
1087 
1088         _ReadPROMContent(Adapter);
1089 
1090         MSG_88E("<==== %s in %d ms\n", __func__,
1091                 jiffies_to_msecs(jiffies - start));
1092 }
1093 
1094 #define GPIO_DEBUG_PORT_NUM 0
1095 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1096 {
1097 }
1098 
1099 static void ResumeTxBeacon(struct adapter *adapt)
1100 {
1101         struct hal_data_8188e *haldata = adapt->HalData;
1102 
1103         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1104         /*  which should be read from register to a global variable. */
1105 
1106         usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) | BIT(6));
1107         haldata->RegFwHwTxQCtrl |= BIT(6);
1108         usb_write8(adapt, REG_TBTT_PROHIBIT + 1, 0xff);
1109         haldata->RegReg542 |= BIT(0);
1110         usb_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
1111 }
1112 
1113 static void StopTxBeacon(struct adapter *adapt)
1114 {
1115         struct hal_data_8188e *haldata = adapt->HalData;
1116 
1117         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1118         /*  which should be read from register to a global variable. */
1119 
1120         usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
1121         haldata->RegFwHwTxQCtrl &= (~BIT(6));
1122         usb_write8(adapt, REG_TBTT_PROHIBIT + 1, 0x64);
1123         haldata->RegReg542 &= ~(BIT(0));
1124         usb_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
1125 
1126          /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1127 }
1128 
1129 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1130 {
1131         u8 val8;
1132         u8 mode = *((u8 *)val);
1133 
1134         /*  disable Port0 TSF update */
1135         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1136 
1137         /*  set net_type */
1138         val8 = usb_read8(Adapter, MSR) & 0x0c;
1139         val8 |= mode;
1140         usb_write8(Adapter, MSR, val8);
1141 
1142         DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1143 
1144         if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1145                 StopTxBeacon(Adapter);
1146 
1147                 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1148         } else if (mode == _HW_STATE_ADHOC_) {
1149                 ResumeTxBeacon(Adapter);
1150                 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1151         } else if (mode == _HW_STATE_AP_) {
1152                 ResumeTxBeacon(Adapter);
1153 
1154                 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1155 
1156                 /* Set RCR */
1157                 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1158                 /* enable to rx data frame */
1159                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1160                 /* enable to rx ps-poll */
1161                 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1162 
1163                 /* Beacon Control related register for first time */
1164                 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1165 
1166                 usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1167                 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1168                 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1169                 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1170 
1171                 /* reset TSF */
1172                 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1173 
1174                 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1175                 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1176 
1177                 /* enable BCN0 Function for if1 */
1178                 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1179                 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1)));
1180 
1181                 /* dis BCN1 ATIM  WND if if2 is station */
1182                 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1183         }
1184 }
1185 
1186 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1187 {
1188         u8 idx = 0;
1189         u32 reg_macid;
1190 
1191         reg_macid = REG_MACID;
1192 
1193         for (idx = 0; idx < 6; idx++)
1194                 usb_write8(Adapter, (reg_macid + idx), val[idx]);
1195 }
1196 
1197 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1198 {
1199         u8 idx = 0;
1200         u32 reg_bssid;
1201 
1202         reg_bssid = REG_BSSID;
1203 
1204         for (idx = 0; idx < 6; idx++)
1205                 usb_write8(Adapter, (reg_bssid + idx), val[idx]);
1206 }
1207 
1208 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1209 {
1210         u32 bcn_ctrl_reg;
1211 
1212         bcn_ctrl_reg = REG_BCN_CTRL;
1213 
1214         if (*((u8 *)val))
1215                 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1216         else
1217                 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1218 }
1219 
1220 void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1221 {
1222         struct hal_data_8188e *haldata = Adapter->HalData;
1223         struct dm_priv  *pdmpriv = &haldata->dmpriv;
1224         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1225 
1226         switch (variable) {
1227         case HW_VAR_MEDIA_STATUS:
1228                 {
1229                         u8 val8;
1230 
1231                         val8 = usb_read8(Adapter, MSR) & 0x0c;
1232                         val8 |= *((u8 *)val);
1233                         usb_write8(Adapter, MSR, val8);
1234                 }
1235                 break;
1236         case HW_VAR_MEDIA_STATUS1:
1237                 {
1238                         u8 val8;
1239 
1240                         val8 = usb_read8(Adapter, MSR) & 0x03;
1241                         val8 |= *((u8 *)val) << 2;
1242                         usb_write8(Adapter, MSR, val8);
1243                 }
1244                 break;
1245         case HW_VAR_SET_OPMODE:
1246                 hw_var_set_opmode(Adapter, variable, val);
1247                 break;
1248         case HW_VAR_MAC_ADDR:
1249                 hw_var_set_macaddr(Adapter, variable, val);
1250                 break;
1251         case HW_VAR_BSSID:
1252                 hw_var_set_bssid(Adapter, variable, val);
1253                 break;
1254         case HW_VAR_BASIC_RATE:
1255                 {
1256                         u16 BrateCfg = 0;
1257                         u8 RateIndex = 0;
1258 
1259                         /*  2007.01.16, by Emily */
1260                         /*  Select RRSR (in Legacy-OFDM and CCK) */
1261                         /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1262                         /*  We do not use other rates. */
1263                         hal_set_brate_cfg(val, &BrateCfg);
1264                         DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1265 
1266                         /* 2011.03.30 add by Luke Lee */
1267                         /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1268                         /* because CCK 2M has poor TXEVM */
1269                         /* CCK 5.5M & 11M ACK should be enabled for better performance */
1270 
1271                         BrateCfg = (BrateCfg | 0xd) & 0x15d;
1272                         haldata->BasicRateSet = BrateCfg;
1273 
1274                         BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1275                         /*  Set RRSR rate table. */
1276                         usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1277                         usb_write8(Adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff);
1278                         usb_write8(Adapter, REG_RRSR + 2, usb_read8(Adapter, REG_RRSR + 2) & 0xf0);
1279 
1280                         /*  Set RTS initial rate */
1281                         while (BrateCfg > 0x1) {
1282                                 BrateCfg >>= 1;
1283                                 RateIndex++;
1284                         }
1285                         /*  Ziv - Check */
1286                         usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1287                 }
1288                 break;
1289         case HW_VAR_TXPAUSE:
1290                 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1291                 break;
1292         case HW_VAR_BCN_FUNC:
1293                 hw_var_set_bcn_func(Adapter, variable, val);
1294                 break;
1295         case HW_VAR_CORRECT_TSF:
1296                 {
1297                         u64     tsf;
1298                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1299                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1300 
1301                         tsf = pmlmeext->TSFValue - do_div(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval * 1024)) - 1024; /* us */
1302 
1303                         if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
1304                                 StopTxBeacon(Adapter);
1305 
1306                         /* disable related TSF function */
1307                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(3)));
1308 
1309                         usb_write32(Adapter, REG_TSFTR, tsf);
1310                         usb_write32(Adapter, REG_TSFTR + 4, tsf >> 32);
1311 
1312                         /* enable related TSF function */
1313                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1314 
1315                         if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
1316                                 ResumeTxBeacon(Adapter);
1317                 }
1318                 break;
1319         case HW_VAR_CHECK_BSSID:
1320                 if (*((u8 *)val)) {
1321                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1322                 } else {
1323                         u32 val32;
1324 
1325                         val32 = usb_read32(Adapter, REG_RCR);
1326 
1327                         val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1328 
1329                         usb_write32(Adapter, REG_RCR, val32);
1330                 }
1331                 break;
1332         case HW_VAR_MLME_DISCONNECT:
1333                 /* Set RCR to not to receive data frame when NO LINK state */
1334                 /* reject all data frames */
1335                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1336 
1337                 /* reset TSF */
1338                 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1339 
1340                 /* disable update TSF */
1341                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1342                 break;
1343         case HW_VAR_MLME_SITESURVEY:
1344                 if (*((u8 *)val)) { /* under sitesurvey */
1345                         /* config RCR to receive different BSSID & not to receive data frame */
1346                         u32 v = usb_read32(Adapter, REG_RCR);
1347 
1348                         v &= ~(RCR_CBSSID_BCN);
1349                         usb_write32(Adapter, REG_RCR, v);
1350                         /* reject all data frame */
1351                         usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1352 
1353                         /* disable update TSF */
1354                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1355                 } else { /* sitesurvey done */
1356                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1357                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1358 
1359                         if ((is_client_associated_to_ap(Adapter)) ||
1360                             ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) {
1361                                 /* enable to rx data frame */
1362                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1363 
1364                                 /* enable update TSF */
1365                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
1366                         } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
1367                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1368                                 /* enable update TSF */
1369                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
1370                         }
1371 
1372                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN);
1373                 }
1374                 break;
1375         case HW_VAR_MLME_JOIN:
1376                 {
1377                         u8 RetryLimit = 0x30;
1378                         u8 type = *((u8 *)val);
1379                         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1380 
1381                         if (type == 0) { /*  prepare to join */
1382                                 /* enable to rx data frame.Accept all data frame */
1383                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1384 
1385                                 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1386 
1387                                 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1388                                         RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1389                                 else /*  Ad-hoc Mode */
1390                                         RetryLimit = 0x7;
1391                         } else if (type == 1) {
1392                                 /* joinbss_event call back when join res < 0 */
1393                                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1394                         } else if (type == 2) {
1395                                 /* sta add event call back */
1396                                 /* enable update TSF */
1397                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
1398 
1399                                 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
1400                                         RetryLimit = 0x7;
1401                         }
1402                         usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1403                 }
1404                 break;
1405         case HW_VAR_BEACON_INTERVAL:
1406                 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1407                 break;
1408         case HW_VAR_SLOT_TIME:
1409                 {
1410                         u8 u1bAIFS, aSifsTime;
1411                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1412                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1413 
1414                         usb_write8(Adapter, REG_SLOT, val[0]);
1415 
1416                         if (pmlmeinfo->WMM_enable == 0) {
1417                                 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1418                                         aSifsTime = 10;
1419                                 else
1420                                         aSifsTime = 16;
1421 
1422                                 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1423 
1424                                 /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1425                                 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1426                                 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1427                                 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1428                                 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1429                         }
1430                 }
1431                 break;
1432         case HW_VAR_RESP_SIFS:
1433                 /* RESP_SIFS for CCK */
1434                 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1435                 usb_write8(Adapter, REG_R2T_SIFS + 1, val[1]); /* SIFS_R2T_CCK(0x08) */
1436                 /* RESP_SIFS for OFDM */
1437                 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1438                 usb_write8(Adapter, REG_T2T_SIFS + 1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1439                 break;
1440         case HW_VAR_ACK_PREAMBLE:
1441                 {
1442                         u8 regTmp;
1443                         u8 bShortPreamble = *((bool *)val);
1444                         /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1445                         regTmp = (haldata->nCur40MhzPrimeSC) << 5;
1446                         if (bShortPreamble)
1447                                 regTmp |= 0x80;
1448 
1449                         usb_write8(Adapter, REG_RRSR + 2, regTmp);
1450                 }
1451                 break;
1452         case HW_VAR_SEC_CFG:
1453                 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1454                 break;
1455         case HW_VAR_DM_FUNC_OP:
1456                 if (val[0])
1457                         podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1458                 else
1459                         podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1460                 break;
1461         case HW_VAR_DM_FUNC_SET:
1462                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1463                         pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1464                         podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1465                 } else {
1466                         podmpriv->SupportAbility |= *((u32 *)val);
1467                 }
1468                 break;
1469         case HW_VAR_DM_FUNC_CLR:
1470                 podmpriv->SupportAbility &= *((u32 *)val);
1471                 break;
1472         case HW_VAR_CAM_EMPTY_ENTRY:
1473                 {
1474                         u8 ucIndex = *((u8 *)val);
1475                         u8 i;
1476                         u32 ulCommand = 0;
1477                         u32 ulContent = 0;
1478                         u32 ulEncAlgo = CAM_AES;
1479 
1480                         for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1481                                 /*  filled id in CAM config 2 byte */
1482                                 if (i == 0)
1483                                         ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2);
1484                                 else
1485                                         ulContent = 0;
1486                                 /*  polling bit, and No Write enable, and address */
1487                                 ulCommand = CAM_CONTENT_COUNT * ucIndex + i;
1488                                 ulCommand = ulCommand | CAM_POLLINIG |
1489                                             CAM_WRITE;
1490                                 /*  write content 0 is equall to mark invalid */
1491                                 usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1492                                 usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1493                         }
1494                 }
1495                 break;
1496         case HW_VAR_CAM_INVALID_ALL:
1497                 usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1498                 break;
1499         case HW_VAR_CAM_WRITE:
1500                 {
1501                         u32 cmd;
1502                         u32 *cam_val = (u32 *)val;
1503 
1504                         usb_write32(Adapter, WCAMI, cam_val[0]);
1505 
1506                         cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1507                         usb_write32(Adapter, RWCAM, cmd);
1508                 }
1509                 break;
1510         case HW_VAR_AC_PARAM_VO:
1511                 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1512                 break;
1513         case HW_VAR_AC_PARAM_VI:
1514                 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1515                 break;
1516         case HW_VAR_AC_PARAM_BE:
1517                 haldata->AcParam_BE = ((u32 *)(val))[0];
1518                 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1519                 break;
1520         case HW_VAR_AC_PARAM_BK:
1521                 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1522                 break;
1523         case HW_VAR_ACM_CTRL:
1524                 {
1525                         u8 acm_ctrl = *((u8 *)val);
1526                         u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1527 
1528                         if (acm_ctrl > 1)
1529                                 AcmCtrl = AcmCtrl | 0x1;
1530 
1531                         if (acm_ctrl & BIT(3))
1532                                 AcmCtrl |= AcmHw_VoqEn;
1533                         else
1534                                 AcmCtrl &= (~AcmHw_VoqEn);
1535 
1536                         if (acm_ctrl & BIT(2))
1537                                 AcmCtrl |= AcmHw_ViqEn;
1538                         else
1539                                 AcmCtrl &= (~AcmHw_ViqEn);
1540 
1541                         if (acm_ctrl & BIT(1))
1542                                 AcmCtrl |= AcmHw_BeqEn;
1543                         else
1544                                 AcmCtrl &= (~AcmHw_BeqEn);
1545 
1546                         DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1547                         usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1548                 }
1549                 break;
1550         case HW_VAR_AMPDU_MIN_SPACE:
1551                 {
1552                         u8 MinSpacingToSet;
1553                         u8 SecMinSpace;
1554 
1555                         MinSpacingToSet = *((u8 *)val);
1556                         if (MinSpacingToSet <= 7) {
1557                                 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1558                                 case _NO_PRIVACY_:
1559                                 case _AES_:
1560                                         SecMinSpace = 0;
1561                                         break;
1562                                 case _WEP40_:
1563                                 case _WEP104_:
1564                                 case _TKIP_:
1565                                 case _TKIP_WTMIC_:
1566                                         SecMinSpace = 6;
1567                                         break;
1568                                 default:
1569                                         SecMinSpace = 7;
1570                                         break;
1571                                 }
1572                                 if (MinSpacingToSet < SecMinSpace)
1573                                         MinSpacingToSet = SecMinSpace;
1574                                 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1575                         }
1576                 }
1577                 break;
1578         case HW_VAR_AMPDU_FACTOR:
1579                 {
1580                         u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1581                         u8 FactorToSet;
1582                         u8 *pRegToSet;
1583                         u8 index = 0;
1584 
1585                         pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1586                         FactorToSet = *((u8 *)val);
1587                         if (FactorToSet <= 3) {
1588                                 FactorToSet = 1 << (FactorToSet + 2);
1589                                 if (FactorToSet > 0xf)
1590                                         FactorToSet = 0xf;
1591 
1592                                 for (index = 0; index < 4; index++) {
1593                                         if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4))
1594                                                 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4);
1595 
1596                                         if ((pRegToSet[index] & 0x0f) > FactorToSet)
1597                                                 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1598 
1599                                         usb_write8(Adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]);
1600                                 }
1601                         }
1602                 }
1603                 break;
1604         case HW_VAR_RXDMA_AGG_PG_TH:
1605                 {
1606                         u8 threshold = *((u8 *)val);
1607 
1608                         if (threshold == 0)
1609                                 threshold = haldata->UsbRxAggPageCount;
1610                         usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1611                 }
1612                 break;
1613         case HW_VAR_SET_RPWM:
1614                 break;
1615         case HW_VAR_H2C_FW_PWRMODE:
1616                 {
1617                         u8 psmode = (*(u8 *)val);
1618 
1619                         /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1620                         /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1621                         if (psmode != PS_MODE_ACTIVE)
1622                                 ODM_RF_Saving(podmpriv, true);
1623                         rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1624                 }
1625                 break;
1626         case HW_VAR_H2C_FW_JOINBSSRPT:
1627                 {
1628                         u8 mstatus = (*(u8 *)val);
1629 
1630                         rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1631                 }
1632                 break;
1633         case HW_VAR_INITIAL_GAIN:
1634                 {
1635                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1636                         u32 rx_gain = ((u32 *)(val))[0];
1637 
1638                         if (rx_gain == 0xff) {/* restore rx gain */
1639                                 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1640                         } else {
1641                                 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1642                                 ODM_Write_DIG(podmpriv, rx_gain);
1643                         }
1644                 }
1645                 break;
1646         case HW_VAR_TRIGGER_GPIO_0:
1647                 rtl8192cu_trigger_gpio_0(Adapter);
1648                 break;
1649         case HW_VAR_RPT_TIMER_SETTING:
1650                 {
1651                         u16 min_rpt_time = (*(u16 *)val);
1652 
1653                         ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1654                 }
1655                 break;
1656         case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1657                 {
1658                         u8 Optimum_antenna = (*(u8 *)val);
1659                         u8 Ant;
1660                         /* switch antenna to Optimum_antenna */
1661                         if (haldata->CurAntenna !=  Optimum_antenna) {
1662                                 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1663                                 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1664 
1665                                 haldata->CurAntenna = Optimum_antenna;
1666                         }
1667                 }
1668                 break;
1669         case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1670                 haldata->EfuseUsedBytes = *((u16 *)val);
1671                 break;
1672         case HW_VAR_FIFO_CLEARN_UP:
1673                 {
1674                         struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1675                         u8 trycnt = 100;
1676 
1677                         /* pause tx */
1678                         usb_write8(Adapter, REG_TXPAUSE, 0xff);
1679 
1680                         /* keep sn */
1681                         Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1682 
1683                         if (!pwrpriv->bkeepfwalive) {
1684                                 /* RX DMA stop */
1685                                 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM) | RW_RELEASE_EN));
1686                                 do {
1687                                         if (!(usb_read32(Adapter, REG_RXPKT_NUM) & RXDMA_IDLE))
1688                                                 break;
1689                                 } while (trycnt--);
1690                                 if (trycnt == 0)
1691                                         DBG_88E("Stop RX DMA failed......\n");
1692 
1693                                 /* RQPN Load 0 */
1694                                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1695                                 usb_write32(Adapter, REG_RQPN, 0x80000000);
1696                                 mdelay(10);
1697                         }
1698                 }
1699                 break;
1700         case HW_VAR_CHECK_TXBUF:
1701                 break;
1702         case HW_VAR_APFM_ON_MAC:
1703                 haldata->bMacPwrCtrlOn = *val;
1704                 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1705                 break;
1706         case HW_VAR_TX_RPT_MAX_MACID:
1707                 {
1708                         u8 maxMacid = *val;
1709 
1710                         DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid + 1);
1711                         usb_write8(Adapter, REG_TX_RPT_CTRL + 1, maxMacid + 1);
1712                 }
1713                 break;
1714         case HW_VAR_H2C_MEDIA_STATUS_RPT:
1715                 rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
1716                 break;
1717         case HW_VAR_BCN_VALID:
1718                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1719                 usb_write8(Adapter, REG_TDECTRL + 2, usb_read8(Adapter, REG_TDECTRL + 2) | BIT(0));
1720                 break;
1721         default:
1722                 break;
1723         }
1724 }
1725 
1726 void rtw_hal_get_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1727 {
1728         switch (variable) {
1729         case HW_VAR_BASIC_RATE:
1730                 *((u16 *)(val)) = Adapter->HalData->BasicRateSet;
1731                 /* fall through */
1732         case HW_VAR_TXPAUSE:
1733                 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1734                 break;
1735         case HW_VAR_BCN_VALID:
1736                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1737                 val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL + 2)) ? true : false;
1738                 break;
1739         case HW_VAR_FWLPS_RF_ON:
1740                 {
1741                         /* When we halt NIC, we should check if FW LPS is leave. */
1742                         if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1743                                 /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1744                                 /*  because Fw is unload. */
1745                                 val[0] = true;
1746                         } else {
1747                                 u32 valRCR;
1748 
1749                                 valRCR = usb_read32(Adapter, REG_RCR);
1750                                 valRCR &= 0x00070000;
1751                                 if (valRCR)
1752                                         val[0] = false;
1753                                 else
1754                                         val[0] = true;
1755                         }
1756                 }
1757                 break;
1758         case HW_VAR_CURRENT_ANTENNA:
1759                 val[0] = Adapter->HalData->CurAntenna;
1760                 break;
1761         case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1762                 *((u16 *)(val)) = Adapter->HalData->EfuseUsedBytes;
1763                 break;
1764         case HW_VAR_APFM_ON_MAC:
1765                 *val = Adapter->HalData->bMacPwrCtrlOn;
1766                 break;
1767         case HW_VAR_CHK_HI_QUEUE_EMPTY:
1768                 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION) & 0x0000ff00) == 0) ? true : false;
1769                 break;
1770         default:
1771                 break;
1772         }
1773 }
1774 
1775 /*  */
1776 /*      Description: */
1777 /*              Query setting of specified variable. */
1778 /*  */
1779 u8 rtw_hal_get_def_var(struct adapter *Adapter, enum hal_def_variable eVariable,
1780                        void *pValue)
1781 {
1782         struct hal_data_8188e *haldata = Adapter->HalData;
1783         u8 bResult = _SUCCESS;
1784 
1785         switch (eVariable) {
1786         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1787                 {
1788                         struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1789                         struct sta_priv *pstapriv = &Adapter->stapriv;
1790                         struct sta_info *psta;
1791 
1792                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1793                         if (psta)
1794                                 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1795                 }
1796                 break;
1797         case HAL_DEF_IS_SUPPORT_ANT_DIV:
1798                 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1799                 break;
1800         case HAL_DEF_CURRENT_ANTENNA:
1801                 *((u8 *)pValue) = haldata->CurAntenna;
1802                 break;
1803         case HAL_DEF_DRVINFO_SZ:
1804                 *((u32 *)pValue) = DRVINFO_SZ;
1805                 break;
1806         case HAL_DEF_MAX_RECVBUF_SZ:
1807                 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1808                 break;
1809         case HAL_DEF_RX_PACKET_OFFSET:
1810                 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1811                 break;
1812         case HAL_DEF_DBG_DM_FUNC:
1813                 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1814                 break;
1815         case HAL_DEF_RA_DECISION_RATE:
1816                 {
1817                         u8 MacID = *((u8 *)pValue);
1818 
1819                         *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID);
1820                 }
1821                 break;
1822         case HAL_DEF_RA_SGI:
1823                 {
1824                         u8 MacID = *((u8 *)pValue);
1825 
1826                         *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID);
1827                 }
1828                 break;
1829         case HAL_DEF_PT_PWR_STATUS:
1830                 {
1831                         u8 MacID = *((u8 *)pValue);
1832 
1833                         *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID);
1834                 }
1835                 break;
1836         case HW_VAR_MAX_RX_AMPDU_FACTOR:
1837                 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1838                 break;
1839         case HW_DEF_RA_INFO_DUMP:
1840                 {
1841                         u8 entry_id = *((u8 *)pValue);
1842 
1843                         if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1844                                 DBG_88E("============ RA status check ===================\n");
1845                                 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1846                                         entry_id,
1847                                         haldata->odmpriv.RAInfo[entry_id].RateID,
1848                                         haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1849                                         haldata->odmpriv.RAInfo[entry_id].RateSGI,
1850                                         haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1851                                         haldata->odmpriv.RAInfo[entry_id].PTStage);
1852                         }
1853                 }
1854                 break;
1855         case HW_DEF_ODM_DBG_FLAG:
1856                 {
1857                         struct odm_dm_struct *dm_ocm = &haldata->odmpriv;
1858 
1859                         pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1860                 }
1861                 break;
1862         case HAL_DEF_DBG_DUMP_RXPKT:
1863                 *((u8 *)pValue) = haldata->bDumpRxPkt;
1864                 break;
1865         case HAL_DEF_DBG_DUMP_TXPKT:
1866                 *((u8 *)pValue) = haldata->bDumpTxPkt;
1867                 break;
1868         default:
1869                 bResult = _FAIL;
1870                 break;
1871         }
1872 
1873         return bResult;
1874 }
1875 
1876 void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1877 {
1878         u8 init_rate = 0;
1879         u8 networkType, raid;
1880         u32 mask, rate_bitmap;
1881         u8 shortGIrate = false;
1882         int     supportRateNum = 0;
1883         struct sta_info *psta;
1884         struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
1885         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1886         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1887         struct wlan_bssid_ex    *cur_network = &pmlmeinfo->network;
1888 
1889         if (mac_id >= NUM_STA) /* CAM_SIZE */
1890                 return;
1891         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1892         if (!psta)
1893                 return;
1894         switch (mac_id) {
1895         case 0:/*  for infra mode */
1896                 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1897                 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1898                 raid = networktype_to_raid(networkType);
1899                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1900                 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0;
1901                 if (support_short_GI(adapt, &pmlmeinfo->HT_caps))
1902                         shortGIrate = true;
1903                 break;
1904         case 1:/* for broadcast/multicast */
1905                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1906                 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1907                         networkType = WIRELESS_11B;
1908                 else
1909                         networkType = WIRELESS_11G;
1910                 raid = networktype_to_raid(networkType);
1911                 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1912                 break;
1913         default: /* for each sta in IBSS */
1914                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1915                 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
1916                 raid = networktype_to_raid(networkType);
1917                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1918 
1919                 /* todo: support HT in IBSS */
1920                 break;
1921         }
1922 
1923         rate_bitmap = ODM_Get_Rate_Bitmap(odmpriv, mac_id, mask, rssi_level);
1924         DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
1925                 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
1926 
1927         mask &= rate_bitmap;
1928 
1929         init_rate = get_highest_rate_idx(mask) & 0x3f;
1930 
1931         ODM_RA_UpdateRateInfo_8188E(odmpriv, mac_id, raid, mask, shortGIrate);
1932 
1933         /* set ra_id */
1934         psta->raid = raid;
1935         psta->init_rate = init_rate;
1936 }
1937 
1938 void beacon_timing_control(struct adapter *adapt)
1939 {
1940         u32 value32;
1941         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1942         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1943         u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
1944         /* reset TSF, enable update TSF, correcting TSF On Beacon */
1945 
1946         /* BCN interval */
1947         usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
1948         usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
1949 
1950         _InitBeaconParameters(adapt);
1951 
1952         usb_write8(adapt, REG_SLOT, 0x09);
1953 
1954         value32 = usb_read32(adapt, REG_TCR);
1955         value32 &= ~TSFRST;
1956         usb_write32(adapt,  REG_TCR, value32);
1957 
1958         value32 |= TSFRST;
1959         usb_write32(adapt, REG_TCR, value32);
1960 
1961         /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
1962         usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
1963         usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
1964 
1965         _BeaconFunctionEnable(adapt, true, true);
1966 
1967         ResumeTxBeacon(adapt);
1968 
1969         usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
1970 }
1971 
1972 void rtw_hal_def_value_init(struct adapter *adapt)
1973 {
1974         struct hal_data_8188e *haldata = adapt->HalData;
1975         struct pwrctrl_priv *pwrctrlpriv;
1976         u8 i;
1977 
1978         pwrctrlpriv = &adapt->pwrctrlpriv;
1979 
1980         /* init default value */
1981         if (!pwrctrlpriv->bkeepfwalive)
1982                 haldata->LastHMEBoxNum = 0;
1983 
1984         /* init dm default value */
1985         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
1986         haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
1987         haldata->pwrGroupCnt = 0;
1988         haldata->PGMaxGroup = 13;
1989         haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
1990         for (i = 0; i < HP_THERMAL_NUM; i++)
1991                 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
1992 }
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/staging/rtl8188eu/hal/usb_halinit.c

DEFINITIONS
