root/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h

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INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7 #ifndef __RTL8712_FIFOCTRL_REGDEF_H__
   8 #define __RTL8712_FIFOCTRL_REGDEF_H__
   9 
  10 #define RQPN                    (RTL8712_FIFOCTRL_ + 0x00)
  11 #define RXFF_BNDY               (RTL8712_FIFOCTRL_ + 0x0C)
  12 #define RXRPT_BNDY              (RTL8712_FIFOCTRL_ + 0x10)
  13 #define TXPKTBUF_PGBNDY         (RTL8712_FIFOCTRL_ + 0x14)
  14 #define PBP                     (RTL8712_FIFOCTRL_ + 0x15)
  15 #define RX_DRVINFO_SZ           (RTL8712_FIFOCTRL_ + 0x16)
  16 #define TXFF_STATUS             (RTL8712_FIFOCTRL_ + 0x17)
  17 #define RXFF_STATUS             (RTL8712_FIFOCTRL_ + 0x18)
  18 #define TXFF_EMPTY_TH           (RTL8712_FIFOCTRL_ + 0x19)
  19 #define SDIO_RX_BLKSZ           (RTL8712_FIFOCTRL_ + 0x1C)
  20 #define RXDMA_RXCTRL            (RTL8712_FIFOCTRL_ + 0x1D)
  21 #define RXPKT_NUM               (RTL8712_FIFOCTRL_ + 0x1E)
  22 #define RXPKT_NUM_C2H           (RTL8712_FIFOCTRL_ + 0x1F)
  23 #define C2HCMD_UDT_SIZE         (RTL8712_FIFOCTRL_ + 0x20)
  24 #define C2HCMD_UDT_ADDR         (RTL8712_FIFOCTRL_ + 0x22)
  25 #define FIFOPAGE2               (RTL8712_FIFOCTRL_ + 0x24)
  26 #define FIFOPAGE1               (RTL8712_FIFOCTRL_ + 0x28)
  27 #define FW_RSVD_PG_CTRL         (RTL8712_FIFOCTRL_ + 0x30)
  28 #define TXRPTFF_RDPTR           (RTL8712_FIFOCTRL_ + 0x40)
  29 #define TXRPTFF_WTPTR           (RTL8712_FIFOCTRL_ + 0x44)
  30 #define C2HFF_RDPTR             (RTL8712_FIFOCTRL_ + 0x48)
  31 #define C2HFF_WTPTR             (RTL8712_FIFOCTRL_ + 0x4C)
  32 #define RXFF0_RDPTR             (RTL8712_FIFOCTRL_ + 0x50)
  33 #define RXFF0_WTPTR             (RTL8712_FIFOCTRL_ + 0x54)
  34 #define RXFF1_RDPTR             (RTL8712_FIFOCTRL_ + 0x58)
  35 #define RXFF1_WTPTR             (RTL8712_FIFOCTRL_ + 0x5C)
  36 #define RXRPT0FF_RDPTR          (RTL8712_FIFOCTRL_ + 0x60)
  37 #define RXRPT0FF_WTPTR          (RTL8712_FIFOCTRL_ + 0x64)
  38 #define RXRPT1FF_RDPTR          (RTL8712_FIFOCTRL_ + 0x68)
  39 #define RXRPT1FF_WTPTR          (RTL8712_FIFOCTRL_ + 0x6C)
  40 #define RX0PKTNUM               (RTL8712_FIFOCTRL_ + 0x72)
  41 #define RX1PKTNUM               (RTL8712_FIFOCTRL_ + 0x74)
  42 #define RXFLTMAP0               (RTL8712_FIFOCTRL_ + 0x76)
  43 #define RXFLTMAP1               (RTL8712_FIFOCTRL_ + 0x78)
  44 #define RXFLTMAP2               (RTL8712_FIFOCTRL_ + 0x7A)
  45 #define RXFLTMAP3               (RTL8712_FIFOCTRL_ + 0x7c)
  46 #define TBDA                    (RTL8712_FIFOCTRL_ + 0x84)
  47 #define THPDA                   (RTL8712_FIFOCTRL_ + 0x88)
  48 #define TCDA                    (RTL8712_FIFOCTRL_ + 0x8C)
  49 #define TMDA                    (RTL8712_FIFOCTRL_ + 0x90)
  50 #define HDA                     (RTL8712_FIFOCTRL_ + 0x94)
  51 #define TVODA                   (RTL8712_FIFOCTRL_ + 0x98)
  52 #define TVIDA                   (RTL8712_FIFOCTRL_ + 0x9C)
  53 #define TBEDA                   (RTL8712_FIFOCTRL_ + 0xA0)
  54 #define TBKDA                   (RTL8712_FIFOCTRL_ + 0xA4)
  55 #define RCDA                    (RTL8712_FIFOCTRL_ + 0xA8)
  56 #define RDSA                    (RTL8712_FIFOCTRL_ + 0xAC)
  57 #define TXPKT_NUM_CTRL          (RTL8712_FIFOCTRL_ + 0xB0)
  58 #define TXQ_PGADD               (RTL8712_FIFOCTRL_ + 0xB3)
  59 #define TXFF_PG_NUM             (RTL8712_FIFOCTRL_ + 0xB4)
  60 
  61 #endif  /* __RTL8712_FIFOCTRL_REGDEF_H__ */
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