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28 #include "../ni_device_routes.h"
29 #include "all.h"
30
31 struct ni_device_routes ni_pxi_6030e_device_routes = {
32 .device = "pxi-6030e",
33 .routes = (struct ni_route_set[]){
34 {
35 .dest = NI_PFI(0),
36 .src = (int[]){
37 NI_AI_StartTrigger,
38 0,
39 }
40 },
41 {
42 .dest = NI_PFI(1),
43 .src = (int[]){
44 NI_AI_ReferenceTrigger,
45 0,
46 }
47 },
48 {
49 .dest = NI_PFI(2),
50 .src = (int[]){
51 NI_AI_ConvertClock,
52 0,
53 }
54 },
55 {
56 .dest = NI_PFI(3),
57 .src = (int[]){
58 NI_CtrSource(1),
59 0,
60 }
61 },
62 {
63 .dest = NI_PFI(4),
64 .src = (int[]){
65 NI_CtrGate(1),
66 0,
67 }
68 },
69 {
70 .dest = NI_PFI(5),
71 .src = (int[]){
72 NI_AO_SampleClock,
73 0,
74 }
75 },
76 {
77 .dest = NI_PFI(6),
78 .src = (int[]){
79 NI_AO_StartTrigger,
80 0,
81 }
82 },
83 {
84 .dest = NI_PFI(7),
85 .src = (int[]){
86 NI_AI_SampleClock,
87 0,
88 }
89 },
90 {
91 .dest = NI_PFI(8),
92 .src = (int[]){
93 NI_CtrSource(0),
94 0,
95 }
96 },
97 {
98 .dest = NI_PFI(9),
99 .src = (int[]){
100 NI_CtrGate(0),
101 0,
102 }
103 },
104 {
105 .dest = TRIGGER_LINE(0),
106 .src = (int[]){
107 NI_CtrSource(0),
108 NI_CtrGate(0),
109 NI_CtrInternalOutput(0),
110 NI_CtrOut(0),
111 NI_AI_SampleClock,
112 NI_AI_StartTrigger,
113 NI_AI_ReferenceTrigger,
114 NI_AI_ConvertClock,
115 NI_AO_SampleClock,
116 NI_AO_StartTrigger,
117 0,
118 }
119 },
120 {
121 .dest = TRIGGER_LINE(1),
122 .src = (int[]){
123 NI_CtrSource(0),
124 NI_CtrGate(0),
125 NI_CtrInternalOutput(0),
126 NI_CtrOut(0),
127 NI_AI_SampleClock,
128 NI_AI_StartTrigger,
129 NI_AI_ReferenceTrigger,
130 NI_AI_ConvertClock,
131 NI_AO_SampleClock,
132 NI_AO_StartTrigger,
133 0,
134 }
135 },
136 {
137 .dest = TRIGGER_LINE(2),
138 .src = (int[]){
139 NI_CtrSource(0),
140 NI_CtrGate(0),
141 NI_CtrInternalOutput(0),
142 NI_CtrOut(0),
143 NI_AI_SampleClock,
144 NI_AI_StartTrigger,
145 NI_AI_ReferenceTrigger,
146 NI_AI_ConvertClock,
147 NI_AO_SampleClock,
148 NI_AO_StartTrigger,
149 0,
150 }
151 },
152 {
153 .dest = TRIGGER_LINE(3),
154 .src = (int[]){
155 NI_CtrSource(0),
156 NI_CtrGate(0),
157 NI_CtrInternalOutput(0),
158 NI_CtrOut(0),
159 NI_AI_SampleClock,
160 NI_AI_StartTrigger,
161 NI_AI_ReferenceTrigger,
162 NI_AI_ConvertClock,
163 NI_AO_SampleClock,
164 NI_AO_StartTrigger,
165 0,
166 }
167 },
168 {
169 .dest = TRIGGER_LINE(4),
170 .src = (int[]){
171 NI_CtrSource(0),
172 NI_CtrGate(0),
173 NI_CtrInternalOutput(0),
174 NI_CtrOut(0),
175 NI_AI_SampleClock,
176 NI_AI_StartTrigger,
177 NI_AI_ReferenceTrigger,
178 NI_AI_ConvertClock,
179 NI_AO_SampleClock,
180 NI_AO_StartTrigger,
181 0,
182 }
183 },
184 {
185 .dest = TRIGGER_LINE(5),
186 .src = (int[]){
187 NI_CtrSource(0),
188 NI_CtrGate(0),
189 NI_CtrInternalOutput(0),
190 NI_CtrOut(0),
191 NI_AI_SampleClock,
192 NI_AI_StartTrigger,
193 NI_AI_ReferenceTrigger,
194 NI_AI_ConvertClock,
195 NI_AO_SampleClock,
196 NI_AO_StartTrigger,
197 0,
198 }
199 },
200 {
201 .dest = TRIGGER_LINE(7),
202 .src = (int[]){
203 NI_20MHzTimebase,
204 0,
205 }
206 },
207 {
208 .dest = NI_CtrSource(0),
209 .src = (int[]){
210 NI_PFI(0),
211 NI_PFI(1),
212 NI_PFI(2),
213 NI_PFI(3),
214 NI_PFI(4),
215 NI_PFI(5),
216 NI_PFI(6),
217 NI_PFI(7),
218 NI_PFI(8),
219 NI_PFI(9),
220 TRIGGER_LINE(0),
221 TRIGGER_LINE(1),
222 TRIGGER_LINE(2),
223 TRIGGER_LINE(3),
224 TRIGGER_LINE(4),
225 TRIGGER_LINE(5),
226 TRIGGER_LINE(7),
227 NI_MasterTimebase,
228 NI_20MHzTimebase,
229 NI_100kHzTimebase,
230 NI_AnalogComparisonEvent,
231 0,
232 }
233 },
234 {
235 .dest = NI_CtrSource(1),
236 .src = (int[]){
237 NI_PFI(0),
238 NI_PFI(1),
239 NI_PFI(2),
240 NI_PFI(3),
241 NI_PFI(4),
242 NI_PFI(5),
243 NI_PFI(6),
244 NI_PFI(7),
245 NI_PFI(8),
246 NI_PFI(9),
247 TRIGGER_LINE(0),
248 TRIGGER_LINE(1),
249 TRIGGER_LINE(2),
250 TRIGGER_LINE(3),
251 TRIGGER_LINE(4),
252 TRIGGER_LINE(5),
253 TRIGGER_LINE(7),
254 NI_MasterTimebase,
255 NI_20MHzTimebase,
256 NI_100kHzTimebase,
257 NI_AnalogComparisonEvent,
258 0,
259 }
260 },
261 {
262 .dest = NI_CtrGate(0),
263 .src = (int[]){
264 NI_PFI(0),
265 NI_PFI(1),
266 NI_PFI(2),
267 NI_PFI(3),
268 NI_PFI(4),
269 NI_PFI(5),
270 NI_PFI(6),
271 NI_PFI(7),
272 NI_PFI(8),
273 NI_PFI(9),
274 TRIGGER_LINE(0),
275 TRIGGER_LINE(1),
276 TRIGGER_LINE(2),
277 TRIGGER_LINE(3),
278 TRIGGER_LINE(4),
279 TRIGGER_LINE(5),
280 NI_CtrInternalOutput(1),
281 NI_AI_StartTrigger,
282 NI_AI_ReferenceTrigger,
283 NI_AnalogComparisonEvent,
284 0,
285 }
286 },
287 {
288 .dest = NI_CtrGate(1),
289 .src = (int[]){
290 NI_PFI(0),
291 NI_PFI(1),
292 NI_PFI(2),
293 NI_PFI(3),
294 NI_PFI(4),
295 NI_PFI(5),
296 NI_PFI(6),
297 NI_PFI(7),
298 NI_PFI(8),
299 NI_PFI(9),
300 TRIGGER_LINE(0),
301 TRIGGER_LINE(1),
302 TRIGGER_LINE(2),
303 TRIGGER_LINE(3),
304 TRIGGER_LINE(4),
305 TRIGGER_LINE(5),
306 NI_CtrInternalOutput(0),
307 NI_AI_StartTrigger,
308 NI_AI_ReferenceTrigger,
309 NI_AnalogComparisonEvent,
310 0,
311 }
312 },
313 {
314 .dest = NI_CtrOut(0),
315 .src = (int[]){
316 TRIGGER_LINE(0),
317 TRIGGER_LINE(1),
318 TRIGGER_LINE(2),
319 TRIGGER_LINE(3),
320 TRIGGER_LINE(4),
321 TRIGGER_LINE(5),
322 NI_CtrInternalOutput(0),
323 0,
324 }
325 },
326 {
327 .dest = NI_CtrOut(1),
328 .src = (int[]){
329 NI_CtrInternalOutput(1),
330 0,
331 }
332 },
333 {
334 .dest = NI_AI_SampleClock,
335 .src = (int[]){
336 NI_PFI(0),
337 NI_PFI(1),
338 NI_PFI(2),
339 NI_PFI(3),
340 NI_PFI(4),
341 NI_PFI(5),
342 NI_PFI(6),
343 NI_PFI(7),
344 NI_PFI(8),
345 NI_PFI(9),
346 TRIGGER_LINE(0),
347 TRIGGER_LINE(1),
348 TRIGGER_LINE(2),
349 TRIGGER_LINE(3),
350 TRIGGER_LINE(4),
351 TRIGGER_LINE(5),
352 NI_CtrInternalOutput(0),
353 NI_AI_SampleClockTimebase,
354 NI_AnalogComparisonEvent,
355 0,
356 }
357 },
358 {
359 .dest = NI_AI_SampleClockTimebase,
360 .src = (int[]){
361 NI_PFI(0),
362 NI_PFI(1),
363 NI_PFI(2),
364 NI_PFI(3),
365 NI_PFI(4),
366 NI_PFI(5),
367 NI_PFI(6),
368 NI_PFI(7),
369 NI_PFI(8),
370 NI_PFI(9),
371 TRIGGER_LINE(0),
372 TRIGGER_LINE(1),
373 TRIGGER_LINE(2),
374 TRIGGER_LINE(3),
375 TRIGGER_LINE(4),
376 TRIGGER_LINE(5),
377 TRIGGER_LINE(7),
378 NI_MasterTimebase,
379 NI_20MHzTimebase,
380 NI_100kHzTimebase,
381 NI_AnalogComparisonEvent,
382 0,
383 }
384 },
385 {
386 .dest = NI_AI_StartTrigger,
387 .src = (int[]){
388 NI_PFI(0),
389 NI_PFI(1),
390 NI_PFI(2),
391 NI_PFI(3),
392 NI_PFI(4),
393 NI_PFI(5),
394 NI_PFI(6),
395 NI_PFI(7),
396 NI_PFI(8),
397 NI_PFI(9),
398 TRIGGER_LINE(0),
399 TRIGGER_LINE(1),
400 TRIGGER_LINE(2),
401 TRIGGER_LINE(3),
402 TRIGGER_LINE(4),
403 TRIGGER_LINE(5),
404 NI_CtrInternalOutput(0),
405 NI_AnalogComparisonEvent,
406 0,
407 }
408 },
409 {
410 .dest = NI_AI_ReferenceTrigger,
411 .src = (int[]){
412 NI_PFI(0),
413 NI_PFI(1),
414 NI_PFI(2),
415 NI_PFI(3),
416 NI_PFI(4),
417 NI_PFI(5),
418 NI_PFI(6),
419 NI_PFI(7),
420 NI_PFI(8),
421 NI_PFI(9),
422 TRIGGER_LINE(0),
423 TRIGGER_LINE(1),
424 TRIGGER_LINE(2),
425 TRIGGER_LINE(3),
426 TRIGGER_LINE(4),
427 TRIGGER_LINE(5),
428 NI_AnalogComparisonEvent,
429 0,
430 }
431 },
432 {
433 .dest = NI_AI_ConvertClock,
434 .src = (int[]){
435 NI_PFI(0),
436 NI_PFI(1),
437 NI_PFI(2),
438 NI_PFI(3),
439 NI_PFI(4),
440 NI_PFI(5),
441 NI_PFI(6),
442 NI_PFI(7),
443 NI_PFI(8),
444 NI_PFI(9),
445 TRIGGER_LINE(0),
446 TRIGGER_LINE(1),
447 TRIGGER_LINE(2),
448 TRIGGER_LINE(3),
449 TRIGGER_LINE(4),
450 TRIGGER_LINE(5),
451 NI_CtrInternalOutput(0),
452 NI_AI_ConvertClockTimebase,
453 NI_AnalogComparisonEvent,
454 0,
455 }
456 },
457 {
458 .dest = NI_AI_ConvertClockTimebase,
459 .src = (int[]){
460 TRIGGER_LINE(7),
461 NI_AI_SampleClockTimebase,
462 NI_MasterTimebase,
463 NI_20MHzTimebase,
464 0,
465 }
466 },
467 {
468 .dest = NI_AI_PauseTrigger,
469 .src = (int[]){
470 NI_PFI(0),
471 NI_PFI(1),
472 NI_PFI(2),
473 NI_PFI(3),
474 NI_PFI(4),
475 NI_PFI(5),
476 NI_PFI(6),
477 NI_PFI(7),
478 NI_PFI(8),
479 NI_PFI(9),
480 TRIGGER_LINE(0),
481 TRIGGER_LINE(1),
482 TRIGGER_LINE(2),
483 TRIGGER_LINE(3),
484 TRIGGER_LINE(4),
485 TRIGGER_LINE(5),
486 NI_AnalogComparisonEvent,
487 0,
488 }
489 },
490 {
491 .dest = NI_AI_HoldComplete,
492 .src = (int[]){
493 NI_AI_HoldCompleteEvent,
494 0,
495 }
496 },
497 {
498 .dest = NI_AO_SampleClock,
499 .src = (int[]){
500 NI_PFI(0),
501 NI_PFI(1),
502 NI_PFI(2),
503 NI_PFI(3),
504 NI_PFI(4),
505 NI_PFI(5),
506 NI_PFI(6),
507 NI_PFI(7),
508 NI_PFI(8),
509 NI_PFI(9),
510 TRIGGER_LINE(0),
511 TRIGGER_LINE(1),
512 TRIGGER_LINE(2),
513 TRIGGER_LINE(3),
514 TRIGGER_LINE(4),
515 TRIGGER_LINE(5),
516 NI_CtrInternalOutput(1),
517 NI_AO_SampleClockTimebase,
518 NI_AnalogComparisonEvent,
519 0,
520 }
521 },
522 {
523 .dest = NI_AO_SampleClockTimebase,
524 .src = (int[]){
525 NI_PFI(0),
526 NI_PFI(1),
527 NI_PFI(2),
528 NI_PFI(3),
529 NI_PFI(4),
530 NI_PFI(5),
531 NI_PFI(6),
532 NI_PFI(7),
533 NI_PFI(8),
534 NI_PFI(9),
535 TRIGGER_LINE(0),
536 TRIGGER_LINE(1),
537 TRIGGER_LINE(2),
538 TRIGGER_LINE(3),
539 TRIGGER_LINE(4),
540 TRIGGER_LINE(5),
541 TRIGGER_LINE(7),
542 NI_MasterTimebase,
543 NI_20MHzTimebase,
544 NI_100kHzTimebase,
545 NI_AnalogComparisonEvent,
546 0,
547 }
548 },
549 {
550 .dest = NI_AO_StartTrigger,
551 .src = (int[]){
552 NI_PFI(0),
553 NI_PFI(1),
554 NI_PFI(2),
555 NI_PFI(3),
556 NI_PFI(4),
557 NI_PFI(5),
558 NI_PFI(6),
559 NI_PFI(7),
560 NI_PFI(8),
561 NI_PFI(9),
562 TRIGGER_LINE(0),
563 TRIGGER_LINE(1),
564 TRIGGER_LINE(2),
565 TRIGGER_LINE(3),
566 TRIGGER_LINE(4),
567 TRIGGER_LINE(5),
568 NI_AI_StartTrigger,
569 NI_AnalogComparisonEvent,
570 0,
571 }
572 },
573 {
574 .dest = NI_AO_PauseTrigger,
575 .src = (int[]){
576 NI_PFI(0),
577 NI_PFI(1),
578 NI_PFI(2),
579 NI_PFI(3),
580 NI_PFI(4),
581 NI_PFI(5),
582 NI_PFI(6),
583 NI_PFI(7),
584 NI_PFI(8),
585 NI_PFI(9),
586 TRIGGER_LINE(0),
587 TRIGGER_LINE(1),
588 TRIGGER_LINE(2),
589 TRIGGER_LINE(3),
590 TRIGGER_LINE(4),
591 TRIGGER_LINE(5),
592 NI_AnalogComparisonEvent,
593 0,
594 }
595 },
596 {
597 .dest = NI_MasterTimebase,
598 .src = (int[]){
599 TRIGGER_LINE(7),
600 NI_20MHzTimebase,
601 0,
602 }
603 },
604 {
605 .dest = 0,
606 },
607 },
608 };