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28 #include "../ni_device_routes.h"
29 #include "all.h"
30
31 struct ni_device_routes ni_pci_6070e_device_routes = {
32 .device = "pci-6070e",
33 .routes = (struct ni_route_set[]){
34 {
35 .dest = NI_PFI(0),
36 .src = (int[]){
37 NI_AI_StartTrigger,
38 0,
39 }
40 },
41 {
42 .dest = NI_PFI(1),
43 .src = (int[]){
44 NI_AI_ReferenceTrigger,
45 0,
46 }
47 },
48 {
49 .dest = NI_PFI(2),
50 .src = (int[]){
51 NI_AI_ConvertClock,
52 0,
53 }
54 },
55 {
56 .dest = NI_PFI(3),
57 .src = (int[]){
58 NI_CtrSource(1),
59 0,
60 }
61 },
62 {
63 .dest = NI_PFI(4),
64 .src = (int[]){
65 NI_CtrGate(1),
66 0,
67 }
68 },
69 {
70 .dest = NI_PFI(5),
71 .src = (int[]){
72 NI_AO_SampleClock,
73 0,
74 }
75 },
76 {
77 .dest = NI_PFI(6),
78 .src = (int[]){
79 NI_AO_StartTrigger,
80 0,
81 }
82 },
83 {
84 .dest = NI_PFI(7),
85 .src = (int[]){
86 NI_AI_SampleClock,
87 0,
88 }
89 },
90 {
91 .dest = NI_PFI(8),
92 .src = (int[]){
93 NI_CtrSource(0),
94 0,
95 }
96 },
97 {
98 .dest = NI_PFI(9),
99 .src = (int[]){
100 NI_CtrGate(0),
101 0,
102 }
103 },
104 {
105 .dest = TRIGGER_LINE(0),
106 .src = (int[]){
107 NI_CtrSource(0),
108 NI_CtrGate(0),
109 NI_CtrInternalOutput(0),
110 NI_CtrOut(0),
111 NI_AI_SampleClock,
112 NI_AI_StartTrigger,
113 NI_AI_ReferenceTrigger,
114 NI_AI_ConvertClock,
115 NI_AO_SampleClock,
116 NI_AO_StartTrigger,
117 0,
118 }
119 },
120 {
121 .dest = TRIGGER_LINE(1),
122 .src = (int[]){
123 NI_CtrSource(0),
124 NI_CtrGate(0),
125 NI_CtrInternalOutput(0),
126 NI_CtrOut(0),
127 NI_AI_SampleClock,
128 NI_AI_StartTrigger,
129 NI_AI_ReferenceTrigger,
130 NI_AI_ConvertClock,
131 NI_AO_SampleClock,
132 NI_AO_StartTrigger,
133 0,
134 }
135 },
136 {
137 .dest = TRIGGER_LINE(2),
138 .src = (int[]){
139 NI_CtrSource(0),
140 NI_CtrGate(0),
141 NI_CtrInternalOutput(0),
142 NI_CtrOut(0),
143 NI_AI_SampleClock,
144 NI_AI_StartTrigger,
145 NI_AI_ReferenceTrigger,
146 NI_AI_ConvertClock,
147 NI_AO_SampleClock,
148 NI_AO_StartTrigger,
149 0,
150 }
151 },
152 {
153 .dest = TRIGGER_LINE(3),
154 .src = (int[]){
155 NI_CtrSource(0),
156 NI_CtrGate(0),
157 NI_CtrInternalOutput(0),
158 NI_CtrOut(0),
159 NI_AI_SampleClock,
160 NI_AI_StartTrigger,
161 NI_AI_ReferenceTrigger,
162 NI_AI_ConvertClock,
163 NI_AO_SampleClock,
164 NI_AO_StartTrigger,
165 0,
166 }
167 },
168 {
169 .dest = TRIGGER_LINE(4),
170 .src = (int[]){
171 NI_CtrSource(0),
172 NI_CtrGate(0),
173 NI_CtrInternalOutput(0),
174 NI_CtrOut(0),
175 NI_AI_SampleClock,
176 NI_AI_StartTrigger,
177 NI_AI_ReferenceTrigger,
178 NI_AI_ConvertClock,
179 NI_AO_SampleClock,
180 NI_AO_StartTrigger,
181 0,
182 }
183 },
184 {
185 .dest = TRIGGER_LINE(5),
186 .src = (int[]){
187 NI_CtrSource(0),
188 NI_CtrGate(0),
189 NI_CtrInternalOutput(0),
190 NI_CtrOut(0),
191 NI_AI_SampleClock,
192 NI_AI_StartTrigger,
193 NI_AI_ReferenceTrigger,
194 NI_AI_ConvertClock,
195 NI_AO_SampleClock,
196 NI_AO_StartTrigger,
197 0,
198 }
199 },
200 {
201 .dest = TRIGGER_LINE(6),
202 .src = (int[]){
203 NI_CtrSource(0),
204 NI_CtrGate(0),
205 NI_CtrInternalOutput(0),
206 NI_CtrOut(0),
207 NI_AI_SampleClock,
208 NI_AI_StartTrigger,
209 NI_AI_ReferenceTrigger,
210 NI_AI_ConvertClock,
211 NI_AO_SampleClock,
212 NI_AO_StartTrigger,
213 0,
214 }
215 },
216 {
217 .dest = TRIGGER_LINE(7),
218 .src = (int[]){
219 NI_20MHzTimebase,
220 0,
221 }
222 },
223 {
224 .dest = NI_CtrSource(0),
225 .src = (int[]){
226 NI_PFI(0),
227 NI_PFI(1),
228 NI_PFI(2),
229 NI_PFI(3),
230 NI_PFI(4),
231 NI_PFI(5),
232 NI_PFI(6),
233 NI_PFI(7),
234 NI_PFI(8),
235 NI_PFI(9),
236 TRIGGER_LINE(0),
237 TRIGGER_LINE(1),
238 TRIGGER_LINE(2),
239 TRIGGER_LINE(3),
240 TRIGGER_LINE(4),
241 TRIGGER_LINE(5),
242 TRIGGER_LINE(6),
243 TRIGGER_LINE(7),
244 NI_MasterTimebase,
245 NI_20MHzTimebase,
246 NI_100kHzTimebase,
247 NI_AnalogComparisonEvent,
248 0,
249 }
250 },
251 {
252 .dest = NI_CtrSource(1),
253 .src = (int[]){
254 NI_PFI(0),
255 NI_PFI(1),
256 NI_PFI(2),
257 NI_PFI(3),
258 NI_PFI(4),
259 NI_PFI(5),
260 NI_PFI(6),
261 NI_PFI(7),
262 NI_PFI(8),
263 NI_PFI(9),
264 TRIGGER_LINE(0),
265 TRIGGER_LINE(1),
266 TRIGGER_LINE(2),
267 TRIGGER_LINE(3),
268 TRIGGER_LINE(4),
269 TRIGGER_LINE(5),
270 TRIGGER_LINE(6),
271 TRIGGER_LINE(7),
272 NI_MasterTimebase,
273 NI_20MHzTimebase,
274 NI_100kHzTimebase,
275 NI_AnalogComparisonEvent,
276 0,
277 }
278 },
279 {
280 .dest = NI_CtrGate(0),
281 .src = (int[]){
282 NI_PFI(0),
283 NI_PFI(1),
284 NI_PFI(2),
285 NI_PFI(3),
286 NI_PFI(4),
287 NI_PFI(5),
288 NI_PFI(6),
289 NI_PFI(7),
290 NI_PFI(8),
291 NI_PFI(9),
292 TRIGGER_LINE(0),
293 TRIGGER_LINE(1),
294 TRIGGER_LINE(2),
295 TRIGGER_LINE(3),
296 TRIGGER_LINE(4),
297 TRIGGER_LINE(5),
298 TRIGGER_LINE(6),
299 NI_CtrInternalOutput(1),
300 NI_AI_StartTrigger,
301 NI_AI_ReferenceTrigger,
302 NI_AnalogComparisonEvent,
303 0,
304 }
305 },
306 {
307 .dest = NI_CtrGate(1),
308 .src = (int[]){
309 NI_PFI(0),
310 NI_PFI(1),
311 NI_PFI(2),
312 NI_PFI(3),
313 NI_PFI(4),
314 NI_PFI(5),
315 NI_PFI(6),
316 NI_PFI(7),
317 NI_PFI(8),
318 NI_PFI(9),
319 TRIGGER_LINE(0),
320 TRIGGER_LINE(1),
321 TRIGGER_LINE(2),
322 TRIGGER_LINE(3),
323 TRIGGER_LINE(4),
324 TRIGGER_LINE(5),
325 TRIGGER_LINE(6),
326 NI_CtrInternalOutput(0),
327 NI_AI_StartTrigger,
328 NI_AI_ReferenceTrigger,
329 NI_AnalogComparisonEvent,
330 0,
331 }
332 },
333 {
334 .dest = NI_CtrOut(0),
335 .src = (int[]){
336 TRIGGER_LINE(0),
337 TRIGGER_LINE(1),
338 TRIGGER_LINE(2),
339 TRIGGER_LINE(3),
340 TRIGGER_LINE(4),
341 TRIGGER_LINE(5),
342 TRIGGER_LINE(6),
343 NI_CtrInternalOutput(0),
344 0,
345 }
346 },
347 {
348 .dest = NI_CtrOut(1),
349 .src = (int[]){
350 NI_CtrInternalOutput(1),
351 0,
352 }
353 },
354 {
355 .dest = NI_AI_SampleClock,
356 .src = (int[]){
357 NI_PFI(0),
358 NI_PFI(1),
359 NI_PFI(2),
360 NI_PFI(3),
361 NI_PFI(4),
362 NI_PFI(5),
363 NI_PFI(6),
364 NI_PFI(7),
365 NI_PFI(8),
366 NI_PFI(9),
367 TRIGGER_LINE(0),
368 TRIGGER_LINE(1),
369 TRIGGER_LINE(2),
370 TRIGGER_LINE(3),
371 TRIGGER_LINE(4),
372 TRIGGER_LINE(5),
373 TRIGGER_LINE(6),
374 NI_CtrInternalOutput(0),
375 NI_AI_SampleClockTimebase,
376 NI_AnalogComparisonEvent,
377 0,
378 }
379 },
380 {
381 .dest = NI_AI_SampleClockTimebase,
382 .src = (int[]){
383 NI_PFI(0),
384 NI_PFI(1),
385 NI_PFI(2),
386 NI_PFI(3),
387 NI_PFI(4),
388 NI_PFI(5),
389 NI_PFI(6),
390 NI_PFI(7),
391 NI_PFI(8),
392 NI_PFI(9),
393 TRIGGER_LINE(0),
394 TRIGGER_LINE(1),
395 TRIGGER_LINE(2),
396 TRIGGER_LINE(3),
397 TRIGGER_LINE(4),
398 TRIGGER_LINE(5),
399 TRIGGER_LINE(6),
400 TRIGGER_LINE(7),
401 NI_MasterTimebase,
402 NI_20MHzTimebase,
403 NI_100kHzTimebase,
404 NI_AnalogComparisonEvent,
405 0,
406 }
407 },
408 {
409 .dest = NI_AI_StartTrigger,
410 .src = (int[]){
411 NI_PFI(0),
412 NI_PFI(1),
413 NI_PFI(2),
414 NI_PFI(3),
415 NI_PFI(4),
416 NI_PFI(5),
417 NI_PFI(6),
418 NI_PFI(7),
419 NI_PFI(8),
420 NI_PFI(9),
421 TRIGGER_LINE(0),
422 TRIGGER_LINE(1),
423 TRIGGER_LINE(2),
424 TRIGGER_LINE(3),
425 TRIGGER_LINE(4),
426 TRIGGER_LINE(5),
427 TRIGGER_LINE(6),
428 NI_CtrInternalOutput(0),
429 NI_AnalogComparisonEvent,
430 0,
431 }
432 },
433 {
434 .dest = NI_AI_ReferenceTrigger,
435 .src = (int[]){
436 NI_PFI(0),
437 NI_PFI(1),
438 NI_PFI(2),
439 NI_PFI(3),
440 NI_PFI(4),
441 NI_PFI(5),
442 NI_PFI(6),
443 NI_PFI(7),
444 NI_PFI(8),
445 NI_PFI(9),
446 TRIGGER_LINE(0),
447 TRIGGER_LINE(1),
448 TRIGGER_LINE(2),
449 TRIGGER_LINE(3),
450 TRIGGER_LINE(4),
451 TRIGGER_LINE(5),
452 TRIGGER_LINE(6),
453 NI_AnalogComparisonEvent,
454 0,
455 }
456 },
457 {
458 .dest = NI_AI_ConvertClock,
459 .src = (int[]){
460 NI_PFI(0),
461 NI_PFI(1),
462 NI_PFI(2),
463 NI_PFI(3),
464 NI_PFI(4),
465 NI_PFI(5),
466 NI_PFI(6),
467 NI_PFI(7),
468 NI_PFI(8),
469 NI_PFI(9),
470 TRIGGER_LINE(0),
471 TRIGGER_LINE(1),
472 TRIGGER_LINE(2),
473 TRIGGER_LINE(3),
474 TRIGGER_LINE(4),
475 TRIGGER_LINE(5),
476 TRIGGER_LINE(6),
477 NI_CtrInternalOutput(0),
478 NI_AI_ConvertClockTimebase,
479 NI_AnalogComparisonEvent,
480 0,
481 }
482 },
483 {
484 .dest = NI_AI_ConvertClockTimebase,
485 .src = (int[]){
486 TRIGGER_LINE(7),
487 NI_AI_SampleClockTimebase,
488 NI_MasterTimebase,
489 NI_20MHzTimebase,
490 0,
491 }
492 },
493 {
494 .dest = NI_AI_PauseTrigger,
495 .src = (int[]){
496 NI_PFI(0),
497 NI_PFI(1),
498 NI_PFI(2),
499 NI_PFI(3),
500 NI_PFI(4),
501 NI_PFI(5),
502 NI_PFI(6),
503 NI_PFI(7),
504 NI_PFI(8),
505 NI_PFI(9),
506 TRIGGER_LINE(0),
507 TRIGGER_LINE(1),
508 TRIGGER_LINE(2),
509 TRIGGER_LINE(3),
510 TRIGGER_LINE(4),
511 TRIGGER_LINE(5),
512 TRIGGER_LINE(6),
513 NI_AnalogComparisonEvent,
514 0,
515 }
516 },
517 {
518 .dest = NI_AI_HoldComplete,
519 .src = (int[]){
520 NI_AI_HoldCompleteEvent,
521 0,
522 }
523 },
524 {
525 .dest = NI_AO_SampleClock,
526 .src = (int[]){
527 NI_PFI(0),
528 NI_PFI(1),
529 NI_PFI(2),
530 NI_PFI(3),
531 NI_PFI(4),
532 NI_PFI(5),
533 NI_PFI(6),
534 NI_PFI(7),
535 NI_PFI(8),
536 NI_PFI(9),
537 TRIGGER_LINE(0),
538 TRIGGER_LINE(1),
539 TRIGGER_LINE(2),
540 TRIGGER_LINE(3),
541 TRIGGER_LINE(4),
542 TRIGGER_LINE(5),
543 TRIGGER_LINE(6),
544 NI_CtrInternalOutput(1),
545 NI_AO_SampleClockTimebase,
546 NI_AnalogComparisonEvent,
547 0,
548 }
549 },
550 {
551 .dest = NI_AO_SampleClockTimebase,
552 .src = (int[]){
553 NI_PFI(0),
554 NI_PFI(1),
555 NI_PFI(2),
556 NI_PFI(3),
557 NI_PFI(4),
558 NI_PFI(5),
559 NI_PFI(6),
560 NI_PFI(7),
561 NI_PFI(8),
562 NI_PFI(9),
563 TRIGGER_LINE(0),
564 TRIGGER_LINE(1),
565 TRIGGER_LINE(2),
566 TRIGGER_LINE(3),
567 TRIGGER_LINE(4),
568 TRIGGER_LINE(5),
569 TRIGGER_LINE(6),
570 TRIGGER_LINE(7),
571 NI_MasterTimebase,
572 NI_20MHzTimebase,
573 NI_100kHzTimebase,
574 NI_AnalogComparisonEvent,
575 0,
576 }
577 },
578 {
579 .dest = NI_AO_StartTrigger,
580 .src = (int[]){
581 NI_PFI(0),
582 NI_PFI(1),
583 NI_PFI(2),
584 NI_PFI(3),
585 NI_PFI(4),
586 NI_PFI(5),
587 NI_PFI(6),
588 NI_PFI(7),
589 NI_PFI(8),
590 NI_PFI(9),
591 TRIGGER_LINE(0),
592 TRIGGER_LINE(1),
593 TRIGGER_LINE(2),
594 TRIGGER_LINE(3),
595 TRIGGER_LINE(4),
596 TRIGGER_LINE(5),
597 TRIGGER_LINE(6),
598 NI_AI_StartTrigger,
599 NI_AnalogComparisonEvent,
600 0,
601 }
602 },
603 {
604 .dest = NI_AO_PauseTrigger,
605 .src = (int[]){
606 NI_PFI(0),
607 NI_PFI(1),
608 NI_PFI(2),
609 NI_PFI(3),
610 NI_PFI(4),
611 NI_PFI(5),
612 NI_PFI(6),
613 NI_PFI(7),
614 NI_PFI(8),
615 NI_PFI(9),
616 TRIGGER_LINE(0),
617 TRIGGER_LINE(1),
618 TRIGGER_LINE(2),
619 TRIGGER_LINE(3),
620 TRIGGER_LINE(4),
621 TRIGGER_LINE(5),
622 TRIGGER_LINE(6),
623 NI_AnalogComparisonEvent,
624 0,
625 }
626 },
627 {
628 .dest = NI_MasterTimebase,
629 .src = (int[]){
630 TRIGGER_LINE(7),
631 NI_20MHzTimebase,
632 0,
633 }
634 },
635 {
636 .dest = 0,
637 },
638 },
639 };