This source file includes following definitions.
- ad7280a_devaddr
- ad7280_calc_crc8
- ad7280_check_crc
- ad7280_delay
- __ad7280_read32
- ad7280_write
- ad7280_read
- ad7280_read_channel
- ad7280_read_all_channels
- ad7280_sw_power_down
- ad7280_chain_setup
- ad7280_show_balance_sw
- ad7280_store_balance_sw
- ad7280_show_balance_timer
- ad7280_store_balance_timer
- ad7280_voltage_channel_init
- ad7280_temp_channel_init
- ad7280_common_fields_init
- ad7280_total_voltage_channel_init
- ad7280_timestamp_channel_init
- ad7280_init_dev_channels
- ad7280_channel_init
- ad7280_balance_switch_attr_init
- ad7280_balance_timer_attr_init
- ad7280_init_dev_attrs
- ad7280_attr_init
- ad7280_read_channel_config
- ad7280_write_channel_config
- ad7280_event_handler
- ad7280_read_raw
- ad7280_probe
1
2
3
4
5
6
7
8 #include <linux/crc8.h>
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/events.h>
22
23 #include "ad7280a.h"
24
25
26 #define AD7280A_CELL_VOLTAGE_1 0x0
27 #define AD7280A_CELL_VOLTAGE_2 0x1
28 #define AD7280A_CELL_VOLTAGE_3 0x2
29 #define AD7280A_CELL_VOLTAGE_4 0x3
30 #define AD7280A_CELL_VOLTAGE_5 0x4
31 #define AD7280A_CELL_VOLTAGE_6 0x5
32 #define AD7280A_AUX_ADC_1 0x6
33 #define AD7280A_AUX_ADC_2 0x7
34 #define AD7280A_AUX_ADC_3 0x8
35 #define AD7280A_AUX_ADC_4 0x9
36 #define AD7280A_AUX_ADC_5 0xA
37 #define AD7280A_AUX_ADC_6 0xB
38 #define AD7280A_SELF_TEST 0xC
39 #define AD7280A_CONTROL_HB 0xD
40 #define AD7280A_CONTROL_LB 0xE
41 #define AD7280A_CELL_OVERVOLTAGE 0xF
42 #define AD7280A_CELL_UNDERVOLTAGE 0x10
43 #define AD7280A_AUX_ADC_OVERVOLTAGE 0x11
44 #define AD7280A_AUX_ADC_UNDERVOLTAGE 0x12
45 #define AD7280A_ALERT 0x13
46 #define AD7280A_CELL_BALANCE 0x14
47 #define AD7280A_CB1_TIMER 0x15
48 #define AD7280A_CB2_TIMER 0x16
49 #define AD7280A_CB3_TIMER 0x17
50 #define AD7280A_CB4_TIMER 0x18
51 #define AD7280A_CB5_TIMER 0x19
52 #define AD7280A_CB6_TIMER 0x1A
53 #define AD7280A_PD_TIMER 0x1B
54 #define AD7280A_READ 0x1C
55 #define AD7280A_CNVST_CONTROL 0x1D
56
57
58 #define AD7280A_CTRL_HB_CONV_INPUT_ALL 0
59 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6)
60 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7)
61 #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6))
62 #define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0
63 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4)
64 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5)
65 #define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4))
66 #define AD7280A_CTRL_HB_CONV_START_CNVST 0
67 #define AD7280A_CTRL_HB_CONV_START_CS BIT(3)
68 #define AD7280A_CTRL_HB_CONV_AVG_DIS 0
69 #define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1)
70 #define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2)
71 #define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1))
72 #define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1)
73 #define AD7280A_CTRL_HB_PWRDN_SW BIT(0)
74
75 #define AD7280A_CTRL_LB_SWRST BIT(7)
76 #define AD7280A_CTRL_LB_ACQ_TIME_400ns 0
77 #define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5)
78 #define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6)
79 #define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5))
80 #define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5)
81 #define AD7280A_CTRL_LB_MUST_SET BIT(4)
82 #define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3)
83 #define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2)
84 #define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1)
85 #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0)
86
87 #define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6)
88 #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6))
89
90 #define AD7280A_ALL_CELLS (0xAD << 16)
91
92 #define AD7280A_MAX_SPI_CLK_HZ 700000
93 #define AD7280A_MAX_CHAIN 8
94 #define AD7280A_CELLS_PER_DEV 6
95 #define AD7280A_BITS 12
96 #define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \
97 AD7280A_CELL_VOLTAGE_1 + 1)
98
99 #define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \
100 (c))
101 #define AD7280A_CALC_TEMP_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \
102 (c) - AD7280A_CELLS_PER_DEV)
103
104 #define AD7280A_DEVADDR_MASTER 0
105 #define AD7280A_DEVADDR_ALL 0x1F
106
107 static unsigned int ad7280a_devaddr(unsigned int addr)
108 {
109 return ((addr & 0x1) << 4) |
110 ((addr & 0x2) << 3) |
111 (addr & 0x4) |
112 ((addr & 0x8) >> 3) |
113 ((addr & 0x10) >> 4);
114 }
115
116
117
118
119
120
121 #define AD7280A_READ_TXVAL 0xF800030A
122
123
124
125
126
127
128 #define POLYNOM 0x2F
129
130 struct ad7280_state {
131 struct spi_device *spi;
132 struct iio_chan_spec *channels;
133 struct iio_dev_attr *iio_attr;
134 int slave_num;
135 int scan_cnt;
136 int readback_delay_us;
137 unsigned char crc_tab[CRC8_TABLE_SIZE];
138 unsigned char ctrl_hb;
139 unsigned char ctrl_lb;
140 unsigned char cell_threshhigh;
141 unsigned char cell_threshlow;
142 unsigned char aux_threshhigh;
143 unsigned char aux_threshlow;
144 unsigned char cb_mask[AD7280A_MAX_CHAIN];
145 struct mutex lock;
146
147 __be32 buf[2] ____cacheline_aligned;
148 };
149
150 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val)
151 {
152 unsigned char crc;
153
154 crc = crc_tab[val >> 16 & 0xFF];
155 crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
156
157 return crc ^ (val & 0xFF);
158 }
159
160 static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)
161 {
162 unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
163
164 if (crc != ((val >> 2) & 0xFF))
165 return -EIO;
166
167 return 0;
168 }
169
170
171
172
173
174
175
176
177
178 static void ad7280_delay(struct ad7280_state *st)
179 {
180 if (st->readback_delay_us < 50)
181 udelay(st->readback_delay_us);
182 else
183 usleep_range(250, 500);
184 }
185
186 static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)
187 {
188 int ret;
189 struct spi_transfer t = {
190 .tx_buf = &st->buf[0],
191 .rx_buf = &st->buf[1],
192 .len = 4,
193 };
194
195 st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL);
196
197 ret = spi_sync_transfer(st->spi, &t, 1);
198 if (ret)
199 return ret;
200
201 *val = be32_to_cpu(st->buf[1]);
202
203 return 0;
204 }
205
206 static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,
207 unsigned int addr, bool all, unsigned int val)
208 {
209 unsigned int reg = devaddr << 27 | addr << 21 |
210 (val & 0xFF) << 13 | all << 12;
211
212 reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
213 st->buf[0] = cpu_to_be32(reg);
214
215 return spi_write(st->spi, &st->buf[0], 4);
216 }
217
218 static int ad7280_read(struct ad7280_state *st, unsigned int devaddr,
219 unsigned int addr)
220 {
221 int ret;
222 unsigned int tmp;
223
224
225 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
226 AD7280A_CTRL_HB_CONV_INPUT_ALL |
227 AD7280A_CTRL_HB_CONV_RES_READ_NO |
228 st->ctrl_hb);
229 if (ret)
230 return ret;
231
232
233 ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
234 AD7280A_CTRL_HB_CONV_INPUT_ALL |
235 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
236 st->ctrl_hb);
237 if (ret)
238 return ret;
239
240
241 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
242 if (ret)
243 return ret;
244
245 ret = __ad7280_read32(st, &tmp);
246 if (ret)
247 return ret;
248
249 if (ad7280_check_crc(st, tmp))
250 return -EIO;
251
252 if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
253 return -EFAULT;
254
255 return (tmp >> 13) & 0xFF;
256 }
257
258 static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,
259 unsigned int addr)
260 {
261 int ret;
262 unsigned int tmp;
263
264 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
265 if (ret)
266 return ret;
267
268 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
269 AD7280A_CTRL_HB_CONV_INPUT_ALL |
270 AD7280A_CTRL_HB_CONV_RES_READ_NO |
271 st->ctrl_hb);
272 if (ret)
273 return ret;
274
275 ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
276 AD7280A_CTRL_HB_CONV_INPUT_ALL |
277 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
278 AD7280A_CTRL_HB_CONV_START_CS |
279 st->ctrl_hb);
280 if (ret)
281 return ret;
282
283 ad7280_delay(st);
284
285 ret = __ad7280_read32(st, &tmp);
286 if (ret)
287 return ret;
288
289 if (ad7280_check_crc(st, tmp))
290 return -EIO;
291
292 if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
293 return -EFAULT;
294
295 return (tmp >> 11) & 0xFFF;
296 }
297
298 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,
299 unsigned int *array)
300 {
301 int i, ret;
302 unsigned int tmp, sum = 0;
303
304 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
305 AD7280A_CELL_VOLTAGE_1 << 2);
306 if (ret)
307 return ret;
308
309 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
310 AD7280A_CTRL_HB_CONV_INPUT_ALL |
311 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
312 AD7280A_CTRL_HB_CONV_START_CS |
313 st->ctrl_hb);
314 if (ret)
315 return ret;
316
317 ad7280_delay(st);
318
319 for (i = 0; i < cnt; i++) {
320 ret = __ad7280_read32(st, &tmp);
321 if (ret)
322 return ret;
323
324 if (ad7280_check_crc(st, tmp))
325 return -EIO;
326
327 if (array)
328 array[i] = tmp;
329
330 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
331 sum += ((tmp >> 11) & 0xFFF);
332 }
333
334 return sum;
335 }
336
337 static void ad7280_sw_power_down(void *data)
338 {
339 struct ad7280_state *st = data;
340
341 ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
342 AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
343 }
344
345 static int ad7280_chain_setup(struct ad7280_state *st)
346 {
347 unsigned int val, n;
348 int ret;
349
350 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
351 AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
352 AD7280A_CTRL_LB_LOCK_DEV_ADDR |
353 AD7280A_CTRL_LB_MUST_SET |
354 AD7280A_CTRL_LB_SWRST |
355 st->ctrl_lb);
356 if (ret)
357 return ret;
358
359 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
360 AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
361 AD7280A_CTRL_LB_LOCK_DEV_ADDR |
362 AD7280A_CTRL_LB_MUST_SET |
363 st->ctrl_lb);
364 if (ret)
365 goto error_power_down;
366
367 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
368 AD7280A_CONTROL_LB << 2);
369 if (ret)
370 goto error_power_down;
371
372 for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
373 ret = __ad7280_read32(st, &val);
374 if (ret)
375 goto error_power_down;
376
377 if (val == 0)
378 return n - 1;
379
380 if (ad7280_check_crc(st, val)) {
381 ret = -EIO;
382 goto error_power_down;
383 }
384
385 if (n != ad7280a_devaddr(val >> 27)) {
386 ret = -EIO;
387 goto error_power_down;
388 }
389 }
390 ret = -EFAULT;
391
392 error_power_down:
393 ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
394 AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
395
396 return ret;
397 }
398
399 static ssize_t ad7280_show_balance_sw(struct device *dev,
400 struct device_attribute *attr,
401 char *buf)
402 {
403 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
404 struct ad7280_state *st = iio_priv(indio_dev);
405 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
406
407 return sprintf(buf, "%d\n",
408 !!(st->cb_mask[this_attr->address >> 8] &
409 (1 << ((this_attr->address & 0xFF) + 2))));
410 }
411
412 static ssize_t ad7280_store_balance_sw(struct device *dev,
413 struct device_attribute *attr,
414 const char *buf,
415 size_t len)
416 {
417 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
418 struct ad7280_state *st = iio_priv(indio_dev);
419 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
420 bool readin;
421 int ret;
422 unsigned int devaddr, ch;
423
424 ret = strtobool(buf, &readin);
425 if (ret)
426 return ret;
427
428 devaddr = this_attr->address >> 8;
429 ch = this_attr->address & 0xFF;
430
431 mutex_lock(&st->lock);
432 if (readin)
433 st->cb_mask[devaddr] |= 1 << (ch + 2);
434 else
435 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
436
437 ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
438 0, st->cb_mask[devaddr]);
439 mutex_unlock(&st->lock);
440
441 return ret ? ret : len;
442 }
443
444 static ssize_t ad7280_show_balance_timer(struct device *dev,
445 struct device_attribute *attr,
446 char *buf)
447 {
448 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
449 struct ad7280_state *st = iio_priv(indio_dev);
450 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
451 int ret;
452 unsigned int msecs;
453
454 mutex_lock(&st->lock);
455 ret = ad7280_read(st, this_attr->address >> 8,
456 this_attr->address & 0xFF);
457 mutex_unlock(&st->lock);
458
459 if (ret < 0)
460 return ret;
461
462 msecs = (ret >> 3) * 71500;
463
464 return sprintf(buf, "%u\n", msecs);
465 }
466
467 static ssize_t ad7280_store_balance_timer(struct device *dev,
468 struct device_attribute *attr,
469 const char *buf,
470 size_t len)
471 {
472 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
473 struct ad7280_state *st = iio_priv(indio_dev);
474 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
475 unsigned long val;
476 int ret;
477
478 ret = kstrtoul(buf, 10, &val);
479 if (ret)
480 return ret;
481
482 val /= 71500;
483
484 if (val > 31)
485 return -EINVAL;
486
487 mutex_lock(&st->lock);
488 ret = ad7280_write(st, this_attr->address >> 8,
489 this_attr->address & 0xFF,
490 0, (val & 0x1F) << 3);
491 mutex_unlock(&st->lock);
492
493 return ret ? ret : len;
494 }
495
496 static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
497 AD7280A_CELLS_PER_DEV * 2 + 1];
498
499 static const struct attribute_group ad7280_attrs_group = {
500 .attrs = ad7280_attributes,
501 };
502
503 static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i)
504 {
505 chan->type = IIO_VOLTAGE;
506 chan->differential = 1;
507 chan->channel = i;
508 chan->channel2 = chan->channel + 1;
509 }
510
511 static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i)
512 {
513 chan->type = IIO_TEMP;
514 chan->channel = i;
515 }
516
517 static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr,
518 int cnt)
519 {
520 chan->indexed = 1;
521 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
522 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
523 chan->address = addr;
524 chan->scan_index = cnt;
525 chan->scan_type.sign = 'u';
526 chan->scan_type.realbits = 12;
527 chan->scan_type.storagebits = 32;
528 }
529
530 static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan,
531 int cnt, int dev)
532 {
533 chan->type = IIO_VOLTAGE;
534 chan->differential = 1;
535 chan->channel = 0;
536 chan->channel2 = dev * AD7280A_CELLS_PER_DEV;
537 chan->address = AD7280A_ALL_CELLS;
538 chan->indexed = 1;
539 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
540 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
541 chan->scan_index = cnt;
542 chan->scan_type.sign = 'u';
543 chan->scan_type.realbits = 32;
544 chan->scan_type.storagebits = 32;
545 }
546
547 static void ad7280_timestamp_channel_init(struct iio_chan_spec *chan, int cnt)
548 {
549 chan->type = IIO_TIMESTAMP;
550 chan->channel = -1;
551 chan->scan_index = cnt;
552 chan->scan_type.sign = 's';
553 chan->scan_type.realbits = 64;
554 chan->scan_type.storagebits = 64;
555 }
556
557 static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt)
558 {
559 int addr, ch, i;
560 struct iio_chan_spec *chan;
561
562 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++) {
563 chan = &st->channels[*cnt];
564
565 if (ch < AD7280A_AUX_ADC_1) {
566 i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch);
567 ad7280_voltage_channel_init(chan, i);
568 } else {
569 i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch);
570 ad7280_temp_channel_init(chan, i);
571 }
572
573 addr = ad7280a_devaddr(dev) << 8 | ch;
574 ad7280_common_fields_init(chan, addr, *cnt);
575
576 (*cnt)++;
577 }
578 }
579
580 static int ad7280_channel_init(struct ad7280_state *st)
581 {
582 int dev, cnt = 0;
583
584 st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 2,
585 sizeof(*st->channels), GFP_KERNEL);
586 if (!st->channels)
587 return -ENOMEM;
588
589 for (dev = 0; dev <= st->slave_num; dev++)
590 ad7280_init_dev_channels(st, dev, &cnt);
591
592 ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev);
593 cnt++;
594 ad7280_timestamp_channel_init(&st->channels[cnt], cnt);
595
596 return cnt + 1;
597 }
598
599 static int ad7280_balance_switch_attr_init(struct iio_dev_attr *attr,
600 struct device *dev, int addr, int i)
601 {
602 attr->address = addr;
603 attr->dev_attr.attr.mode = 0644;
604 attr->dev_attr.show = ad7280_show_balance_sw;
605 attr->dev_attr.store = ad7280_store_balance_sw;
606 attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL,
607 "in%d-in%d_balance_switch_en",
608 i, i + 1);
609 if (!attr->dev_attr.attr.name)
610 return -ENOMEM;
611
612 return 0;
613 }
614
615 static int ad7280_balance_timer_attr_init(struct iio_dev_attr *attr,
616 struct device *dev, int addr, int i)
617 {
618 attr->address = addr;
619 attr->dev_attr.attr.mode = 0644;
620 attr->dev_attr.show = ad7280_show_balance_timer;
621 attr->dev_attr.store = ad7280_store_balance_timer;
622 attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL,
623 "in%d-in%d_balance_timer",
624 i, i + 1);
625 if (!attr->dev_attr.attr.name)
626 return -ENOMEM;
627
628 return 0;
629 }
630
631 static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt)
632 {
633 int addr, ch, i, ret;
634 struct iio_dev_attr *iio_attr;
635 struct device *sdev = &st->spi->dev;
636
637 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6; ch++) {
638 iio_attr = &st->iio_attr[*cnt];
639 addr = ad7280a_devaddr(dev) << 8 | ch;
640 i = dev * AD7280A_CELLS_PER_DEV + ch;
641
642 ret = ad7280_balance_switch_attr_init(iio_attr, sdev, addr, i);
643 if (ret < 0)
644 return ret;
645
646 ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr;
647
648 (*cnt)++;
649 iio_attr = &st->iio_attr[*cnt];
650 addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER + ch);
651
652 ret = ad7280_balance_timer_attr_init(iio_attr, sdev, addr, i);
653 if (ret < 0)
654 return ret;
655
656 ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr;
657 (*cnt)++;
658 }
659
660 ad7280_attributes[*cnt] = NULL;
661
662 return 0;
663 }
664
665 static int ad7280_attr_init(struct ad7280_state *st)
666 {
667 int dev, cnt = 0, ret;
668
669 st->iio_attr = devm_kcalloc(&st->spi->dev, 2, sizeof(*st->iio_attr) *
670 (st->slave_num + 1) * AD7280A_CELLS_PER_DEV,
671 GFP_KERNEL);
672 if (!st->iio_attr)
673 return -ENOMEM;
674
675 for (dev = 0; dev <= st->slave_num; dev++) {
676 ret = ad7280_init_dev_attrs(st, dev, &cnt);
677 if (ret < 0)
678 return ret;
679 }
680
681 return 0;
682 }
683
684 static ssize_t ad7280_read_channel_config(struct device *dev,
685 struct device_attribute *attr,
686 char *buf)
687 {
688 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
689 struct ad7280_state *st = iio_priv(indio_dev);
690 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
691 unsigned int val;
692
693 switch (this_attr->address) {
694 case AD7280A_CELL_OVERVOLTAGE:
695 val = 1000 + (st->cell_threshhigh * 1568) / 100;
696 break;
697 case AD7280A_CELL_UNDERVOLTAGE:
698 val = 1000 + (st->cell_threshlow * 1568) / 100;
699 break;
700 case AD7280A_AUX_ADC_OVERVOLTAGE:
701 val = (st->aux_threshhigh * 196) / 10;
702 break;
703 case AD7280A_AUX_ADC_UNDERVOLTAGE:
704 val = (st->aux_threshlow * 196) / 10;
705 break;
706 default:
707 return -EINVAL;
708 }
709
710 return sprintf(buf, "%u\n", val);
711 }
712
713 static ssize_t ad7280_write_channel_config(struct device *dev,
714 struct device_attribute *attr,
715 const char *buf,
716 size_t len)
717 {
718 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
719 struct ad7280_state *st = iio_priv(indio_dev);
720 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
721
722 long val;
723 int ret;
724
725 ret = kstrtol(buf, 10, &val);
726 if (ret)
727 return ret;
728
729 switch (this_attr->address) {
730 case AD7280A_CELL_OVERVOLTAGE:
731 case AD7280A_CELL_UNDERVOLTAGE:
732 val = ((val - 1000) * 100) / 1568;
733 break;
734 case AD7280A_AUX_ADC_OVERVOLTAGE:
735 case AD7280A_AUX_ADC_UNDERVOLTAGE:
736 val = (val * 10) / 196;
737 break;
738 default:
739 return -EFAULT;
740 }
741
742 val = clamp(val, 0L, 0xFFL);
743
744 mutex_lock(&st->lock);
745 switch (this_attr->address) {
746 case AD7280A_CELL_OVERVOLTAGE:
747 st->cell_threshhigh = val;
748 break;
749 case AD7280A_CELL_UNDERVOLTAGE:
750 st->cell_threshlow = val;
751 break;
752 case AD7280A_AUX_ADC_OVERVOLTAGE:
753 st->aux_threshhigh = val;
754 break;
755 case AD7280A_AUX_ADC_UNDERVOLTAGE:
756 st->aux_threshlow = val;
757 break;
758 }
759
760 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
761 this_attr->address, 1, val);
762
763 mutex_unlock(&st->lock);
764
765 return ret ? ret : len;
766 }
767
768 static irqreturn_t ad7280_event_handler(int irq, void *private)
769 {
770 struct iio_dev *indio_dev = private;
771 struct ad7280_state *st = iio_priv(indio_dev);
772 unsigned int *channels;
773 int i, ret;
774
775 channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
776 if (!channels)
777 return IRQ_HANDLED;
778
779 ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
780 if (ret < 0)
781 goto out;
782
783 for (i = 0; i < st->scan_cnt; i++) {
784 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
785 if (((channels[i] >> 11) & 0xFFF) >=
786 st->cell_threshhigh) {
787 u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0,
788 IIO_EV_DIR_RISING,
789 IIO_EV_TYPE_THRESH,
790 0, 0, 0);
791 iio_push_event(indio_dev, tmp,
792 iio_get_time_ns(indio_dev));
793 } else if (((channels[i] >> 11) & 0xFFF) <=
794 st->cell_threshlow) {
795 u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0,
796 IIO_EV_DIR_FALLING,
797 IIO_EV_TYPE_THRESH,
798 0, 0, 0);
799 iio_push_event(indio_dev, tmp,
800 iio_get_time_ns(indio_dev));
801 }
802 } else {
803 if (((channels[i] >> 11) & 0xFFF) >=
804 st->aux_threshhigh) {
805 u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
806 IIO_EV_TYPE_THRESH,
807 IIO_EV_DIR_RISING);
808 iio_push_event(indio_dev, tmp,
809 iio_get_time_ns(indio_dev));
810 } else if (((channels[i] >> 11) & 0xFFF) <=
811 st->aux_threshlow) {
812 u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
813 IIO_EV_TYPE_THRESH,
814 IIO_EV_DIR_FALLING);
815 iio_push_event(indio_dev, tmp,
816 iio_get_time_ns(indio_dev));
817 }
818 }
819 }
820
821 out:
822 kfree(channels);
823
824 return IRQ_HANDLED;
825 }
826
827 static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
828 in_voltage-voltage_thresh_low_value,
829 0644,
830 ad7280_read_channel_config,
831 ad7280_write_channel_config,
832 AD7280A_CELL_UNDERVOLTAGE);
833
834 static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
835 in_voltage-voltage_thresh_high_value,
836 0644,
837 ad7280_read_channel_config,
838 ad7280_write_channel_config,
839 AD7280A_CELL_OVERVOLTAGE);
840
841 static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
842 0644,
843 ad7280_read_channel_config,
844 ad7280_write_channel_config,
845 AD7280A_AUX_ADC_UNDERVOLTAGE);
846
847 static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
848 0644,
849 ad7280_read_channel_config,
850 ad7280_write_channel_config,
851 AD7280A_AUX_ADC_OVERVOLTAGE);
852
853 static struct attribute *ad7280_event_attributes[] = {
854 &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
855 &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
856 &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
857 &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
858 NULL,
859 };
860
861 static const struct attribute_group ad7280_event_attrs_group = {
862 .attrs = ad7280_event_attributes,
863 };
864
865 static int ad7280_read_raw(struct iio_dev *indio_dev,
866 struct iio_chan_spec const *chan,
867 int *val,
868 int *val2,
869 long m)
870 {
871 struct ad7280_state *st = iio_priv(indio_dev);
872 int ret;
873
874 switch (m) {
875 case IIO_CHAN_INFO_RAW:
876 mutex_lock(&st->lock);
877 if (chan->address == AD7280A_ALL_CELLS)
878 ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
879 else
880 ret = ad7280_read_channel(st, chan->address >> 8,
881 chan->address & 0xFF);
882 mutex_unlock(&st->lock);
883
884 if (ret < 0)
885 return ret;
886
887 *val = ret;
888
889 return IIO_VAL_INT;
890 case IIO_CHAN_INFO_SCALE:
891 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
892 *val = 4000;
893 else
894 *val = 5000;
895
896 *val2 = AD7280A_BITS;
897 return IIO_VAL_FRACTIONAL_LOG2;
898 }
899 return -EINVAL;
900 }
901
902 static const struct iio_info ad7280_info = {
903 .read_raw = ad7280_read_raw,
904 .event_attrs = &ad7280_event_attrs_group,
905 .attrs = &ad7280_attrs_group,
906 };
907
908 static const struct ad7280_platform_data ad7793_default_pdata = {
909 .acquisition_time = AD7280A_ACQ_TIME_400ns,
910 .conversion_averaging = AD7280A_CONV_AVG_DIS,
911 .thermistor_term_en = true,
912 };
913
914 static int ad7280_probe(struct spi_device *spi)
915 {
916 const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev);
917 struct ad7280_state *st;
918 int ret;
919 const unsigned short t_acq_ns[4] = {465, 1010, 1460, 1890};
920 const unsigned short n_avg[4] = {1, 2, 4, 8};
921 struct iio_dev *indio_dev;
922
923 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
924 if (!indio_dev)
925 return -ENOMEM;
926
927 st = iio_priv(indio_dev);
928 spi_set_drvdata(spi, indio_dev);
929 st->spi = spi;
930 mutex_init(&st->lock);
931
932 if (!pdata)
933 pdata = &ad7793_default_pdata;
934
935 crc8_populate_msb(st->crc_tab, POLYNOM);
936
937 st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
938 st->spi->mode = SPI_MODE_1;
939 spi_setup(st->spi);
940
941 st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
942 st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
943 & 0x3) | (pdata->thermistor_term_en ?
944 AD7280A_CTRL_LB_THERMISTOR_EN : 0);
945
946 ret = ad7280_chain_setup(st);
947 if (ret < 0)
948 return ret;
949
950 st->slave_num = ret;
951 st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
952 st->cell_threshhigh = 0xFF;
953 st->aux_threshhigh = 0xFF;
954
955 ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st);
956 if (ret)
957 return ret;
958
959
960
961
962
963
964
965
966
967 st->readback_delay_us =
968 ((t_acq_ns[pdata->acquisition_time & 0x3] + 695) *
969 (AD7280A_NUM_CH * n_avg[pdata->conversion_averaging & 0x3])) -
970 t_acq_ns[pdata->acquisition_time & 0x3] + st->slave_num * 250;
971
972
973 st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
974 st->readback_delay_us += 5;
975
976 indio_dev->name = spi_get_device_id(spi)->name;
977 indio_dev->dev.parent = &spi->dev;
978 indio_dev->modes = INDIO_DIRECT_MODE;
979
980 ret = ad7280_channel_init(st);
981 if (ret < 0)
982 return ret;
983
984 indio_dev->num_channels = ret;
985 indio_dev->channels = st->channels;
986 indio_dev->info = &ad7280_info;
987
988 ret = ad7280_attr_init(st);
989 if (ret < 0)
990 return ret;
991
992 ret = devm_iio_device_register(&spi->dev, indio_dev);
993 if (ret)
994 return ret;
995
996 if (spi->irq > 0) {
997 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
998 AD7280A_ALERT, 1,
999 AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
1000 if (ret)
1001 return ret;
1002
1003 ret = ad7280_write(st, ad7280a_devaddr(st->slave_num),
1004 AD7280A_ALERT, 0,
1005 AD7280A_ALERT_GEN_STATIC_HIGH |
1006 (pdata->chain_last_alert_ignore & 0xF));
1007 if (ret)
1008 return ret;
1009
1010 ret = devm_request_threaded_irq(&spi->dev, spi->irq,
1011 NULL,
1012 ad7280_event_handler,
1013 IRQF_TRIGGER_FALLING |
1014 IRQF_ONESHOT,
1015 indio_dev->name,
1016 indio_dev);
1017 if (ret)
1018 return ret;
1019 }
1020
1021 return 0;
1022 }
1023
1024 static const struct spi_device_id ad7280_id[] = {
1025 {"ad7280a", 0},
1026 {}
1027 };
1028 MODULE_DEVICE_TABLE(spi, ad7280_id);
1029
1030 static struct spi_driver ad7280_driver = {
1031 .driver = {
1032 .name = "ad7280",
1033 },
1034 .probe = ad7280_probe,
1035 .id_table = ad7280_id,
1036 };
1037 module_spi_driver(ad7280_driver);
1038
1039 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
1040 MODULE_DESCRIPTION("Analog Devices AD7280A");
1041 MODULE_LICENSE("GPL v2");