root/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h

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INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   4  *
   5  * Contact Information: wlanfae <wlanfae@realtek.com>
   6  */
   7 #ifndef _R819XU_PHY_H
   8 #define _R819XU_PHY_H
   9 
  10 #define MAX_DOZE_WAITING_TIMES_9x 64
  11 
  12 #define AGCTAB_ArrayLength                      AGCTAB_ArrayLengthPciE
  13 #define MACPHY_ArrayLength                      MACPHY_ArrayLengthPciE
  14 #define RadioA_ArrayLength                      RadioA_ArrayLengthPciE
  15 #define RadioB_ArrayLength                      RadioB_ArrayLengthPciE
  16 #define MACPHY_Array_PGLength                   MACPHY_Array_PGLengthPciE
  17 #define RadioC_ArrayLength                      RadioC_ArrayLengthPciE
  18 #define RadioD_ArrayLength                      RadioD_ArrayLengthPciE
  19 #define PHY_REGArrayLength                      PHY_REGArrayLengthPciE
  20 #define PHY_REG_1T2RArrayLength                 PHY_REG_1T2RArrayLengthPciE
  21 
  22 #define Rtl819XMACPHY_Array_PG                  Rtl8192PciEMACPHY_Array_PG
  23 #define Rtl819XMACPHY_Array                     Rtl8192PciEMACPHY_Array
  24 #define Rtl819XRadioA_Array                     Rtl8192PciERadioA_Array
  25 #define Rtl819XRadioB_Array                     Rtl8192PciERadioB_Array
  26 #define Rtl819XRadioC_Array                     Rtl8192PciERadioC_Array
  27 #define Rtl819XRadioD_Array                     Rtl8192PciERadioD_Array
  28 #define Rtl819XAGCTAB_Array                     Rtl8192PciEAGCTAB_Array
  29 #define Rtl819XPHY_REGArray                     Rtl8192PciEPHY_REGArray
  30 #define Rtl819XPHY_REG_1T2RArray                Rtl8192PciEPHY_REG_1T2RArray
  31 
  32 extern u32 rtl819XAGCTAB_Array[];
  33 
  34 enum hw90_block {
  35         HW90_BLOCK_MAC = 0,
  36         HW90_BLOCK_PHY0 = 1,
  37         HW90_BLOCK_PHY1 = 2,
  38         HW90_BLOCK_RF = 3,
  39         HW90_BLOCK_MAXIMUM = 4,
  40 };
  41 
  42 enum rf90_radio_path {
  43         RF90_PATH_A = 0,
  44         RF90_PATH_B = 1,
  45         RF90_PATH_C = 2,
  46         RF90_PATH_D = 3,
  47         RF90_PATH_MAX
  48 };
  49 
  50 #define bMaskByte0                0xff
  51 #define bMaskByte1                0xff00
  52 #define bMaskByte2                0xff0000
  53 #define bMaskByte3                0xff000000
  54 #define bMaskHWord                0xffff0000
  55 #define bMaskLWord                0x0000ffff
  56 #define bMaskDWord                0xffffffff
  57 
  58 u8 rtl92e_is_legal_rf_path(struct net_device *dev, u32 eRFPath);
  59 void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr,
  60                        u32 dwBitMask, u32 dwData);
  61 u32 rtl92e_get_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask);
  62 void rtl92e_set_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,
  63                        u32 RegAddr, u32 BitMask, u32 Data);
  64 u32 rtl92e_get_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,
  65                       u32 RegAddr, u32 BitMask);
  66 void rtl92e_config_mac(struct net_device *dev);
  67 bool rtl92e_check_bb_and_rf(struct net_device *dev,
  68                             enum hw90_block CheckBlock,
  69                             enum rf90_radio_path eRFPath);
  70 bool rtl92e_config_bb(struct net_device *dev);
  71 void rtl92e_get_tx_power(struct net_device *dev);
  72 void rtl92e_set_tx_power(struct net_device *dev, u8 channel);
  73 bool rtl92e_config_phy(struct net_device *dev);
  74 u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath);
  75 
  76 u8 rtl92e_set_channel(struct net_device *dev, u8 channel);
  77 void rtl92e_set_bw_mode(struct net_device *dev,
  78                         enum ht_channel_width Bandwidth,
  79                         enum ht_extchnl_offset Offset);
  80 void rtl92e_init_gain(struct net_device *dev, u8 Operation);
  81 
  82 void rtl92e_set_rf_off(struct net_device *dev);
  83 
  84 bool rtl92e_set_rf_power_state(struct net_device *dev,
  85                                enum rt_rf_power_state eRFPowerState);
  86 #define PHY_SetRFPowerState rtl92e_set_rf_power_state
  87 
  88 void rtl92e_scan_op_backup(struct net_device *dev, u8 Operation);
  89 
  90 #endif
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