root/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h

/* [<][>][^][v][top][bottom][index][help] */

INCLUDED FROM


   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   4  *
   5  * Contact Information: wlanfae <wlanfae@realtek.com>
   6  */
   7 #ifndef _R819XU_PHYREG_H
   8 #define _R819XU_PHYREG_H
   9 
  10 
  11 #define RF_DATA                 0x1d4
  12 
  13 #define rPMAC_Reset             0x100
  14 #define rPMAC_TxStart           0x104
  15 #define rPMAC_TxLegacySIG       0x108
  16 #define rPMAC_TxHTSIG1          0x10c
  17 #define rPMAC_TxHTSIG2          0x110
  18 #define rPMAC_PHYDebug          0x114
  19 #define rPMAC_TxPacketNum       0x118
  20 #define rPMAC_TxIdle            0x11c
  21 #define rPMAC_TxMACHeader0      0x120
  22 #define rPMAC_TxMACHeader1      0x124
  23 #define rPMAC_TxMACHeader2      0x128
  24 #define rPMAC_TxMACHeader3      0x12c
  25 #define rPMAC_TxMACHeader4      0x130
  26 #define rPMAC_TxMACHeader5      0x134
  27 #define rPMAC_TxDataType        0x138
  28 #define rPMAC_TxRandomSeed      0x13c
  29 #define rPMAC_CCKPLCPPreamble   0x140
  30 #define rPMAC_CCKPLCPHeader     0x144
  31 #define rPMAC_CCKCRC16          0x148
  32 #define rPMAC_OFDMRxCRC32OK     0x170
  33 #define rPMAC_OFDMRxCRC32Er     0x174
  34 #define rPMAC_OFDMRxParityEr    0x178
  35 #define rPMAC_OFDMRxCRC8Er      0x17c
  36 #define rPMAC_CCKCRxRC16Er      0x180
  37 #define rPMAC_CCKCRxRC32Er      0x184
  38 #define rPMAC_CCKCRxRC32OK      0x188
  39 #define rPMAC_TxStatus          0x18c
  40 
  41 #define MCS_TXAGC               0x340
  42 #define CCK_TXAGC               0x348
  43 
  44 /* Mac block on/off control register */
  45 #define MacBlkCtrl                      0x403
  46 
  47 #define rFPGA0_RFMOD                    0x800 /* RF mode & CCK TxSC */
  48 #define rFPGA0_TxInfo                   0x804
  49 #define rFPGA0_PSDFunction              0x808
  50 #define rFPGA0_TxGainStage              0x80c
  51 #define rFPGA0_RFTiming1                0x810
  52 #define rFPGA0_RFTiming2                0x814
  53 #define rFPGA0_XA_HSSIParameter1        0x820
  54 #define rFPGA0_XA_HSSIParameter2        0x824
  55 #define rFPGA0_XB_HSSIParameter1        0x828
  56 #define rFPGA0_XB_HSSIParameter2        0x82c
  57 #define rFPGA0_XC_HSSIParameter1        0x830
  58 #define rFPGA0_XC_HSSIParameter2        0x834
  59 #define rFPGA0_XD_HSSIParameter1        0x838
  60 #define rFPGA0_XD_HSSIParameter2        0x83c
  61 #define rFPGA0_XA_LSSIParameter         0x840
  62 #define rFPGA0_XB_LSSIParameter         0x844
  63 #define rFPGA0_XC_LSSIParameter         0x848
  64 #define rFPGA0_XD_LSSIParameter         0x84c
  65 #define rFPGA0_RFWakeUpParameter        0x850
  66 #define rFPGA0_RFSleepUpParameter       0x854
  67 #define rFPGA0_XAB_SwitchControl        0x858
  68 #define rFPGA0_XCD_SwitchControl        0x85c
  69 #define rFPGA0_XA_RFInterfaceOE         0x860
  70 #define rFPGA0_XB_RFInterfaceOE         0x864
  71 #define rFPGA0_XC_RFInterfaceOE         0x868
  72 #define rFPGA0_XD_RFInterfaceOE         0x86c
  73 #define rFPGA0_XAB_RFInterfaceSW        0x870
  74 #define rFPGA0_XCD_RFInterfaceSW        0x874
  75 #define rFPGA0_XAB_RFParameter          0x878
  76 #define rFPGA0_XCD_RFParameter          0x87c
  77 #define rFPGA0_AnalogParameter1         0x880
  78 #define rFPGA0_AnalogParameter2         0x884
  79 #define rFPGA0_AnalogParameter3         0x888
  80 #define rFPGA0_AnalogParameter4         0x88c
  81 #define rFPGA0_XA_LSSIReadBack          0x8a0
  82 #define rFPGA0_XB_LSSIReadBack          0x8a4
  83 #define rFPGA0_XC_LSSIReadBack          0x8a8
  84 #define rFPGA0_XD_LSSIReadBack          0x8ac
  85 #define rFPGA0_PSDReport                0x8b4
  86 #define rFPGA0_XAB_RFInterfaceRB        0x8e0
  87 #define rFPGA0_XCD_RFInterfaceRB        0x8e4
  88 
  89 /* Page 9 - RF mode & OFDM TxSC */
  90 #define rFPGA1_RFMOD                    0x900
  91 #define rFPGA1_TxBlock                  0x904
  92 #define rFPGA1_DebugSelect              0x908
  93 #define rFPGA1_TxInfo                   0x90c
  94 
  95 #define rCCK0_System                    0xa00
  96 #define rCCK0_AFESetting                0xa04
  97 #define rCCK0_CCA                       0xa08
  98 /* AGC default value, saturation level */
  99 #define rCCK0_RxAGC1                    0xa0c
 100 #define rCCK0_RxAGC2                    0xa10 /* AGC & DAGC */
 101 #define rCCK0_RxHP                      0xa14
 102 /* Timing recovery & channel estimation threshold */
 103 #define rCCK0_DSPParameter1             0xa18
 104 #define rCCK0_DSPParameter2             0xa1c /* SQ threshold */
 105 #define rCCK0_TxFilter1                 0xa20
 106 #define rCCK0_TxFilter2                 0xa24
 107 #define rCCK0_DebugPort                 0xa28 /* Debug port and TX filter 3 */
 108 #define rCCK0_FalseAlarmReport          0xa2c
 109 #define rCCK0_TRSSIReport               0xa50
 110 #define rCCK0_RxReport                  0xa54
 111 #define rCCK0_FACounterLower            0xa5c
 112 #define rCCK0_FACounterUpper            0xa58
 113 
 114 #define rOFDM0_LSTF                     0xc00
 115 #define rOFDM0_TRxPathEnable            0xc04
 116 #define rOFDM0_TRMuxPar                 0xc08
 117 #define rOFDM0_TRSWIsolation            0xc0c
 118 /* RxIQ DC offset, Rx digital filter, DC notch filter */
 119 #define rOFDM0_XARxAFE                  0xc10
 120 #define rOFDM0_XARxIQImbalance          0xc14 /* RxIQ imbalance matrix */
 121 #define rOFDM0_XBRxAFE                  0xc18
 122 #define rOFDM0_XBRxIQImbalance          0xc1c
 123 #define rOFDM0_XCRxAFE                  0xc20
 124 #define rOFDM0_XCRxIQImbalance          0xc24
 125 #define rOFDM0_XDRxAFE                  0xc28
 126 #define rOFDM0_XDRxIQImbalance          0xc2c
 127 #define rOFDM0_RxDetector1              0xc30 /* PD, BW & SBD */
 128 #define rOFDM0_RxDetector2              0xc34 /* SBD */
 129 #define rOFDM0_RxDetector3              0xc38 /* Frame Sync */
 130 /* PD, SBD, Frame Sync & Short-GI */
 131 #define rOFDM0_RxDetector4              0xc3c
 132 #define rOFDM0_RxDSP                    0xc40 /* Rx Sync Path */
 133 #define rOFDM0_CFOandDAGC               0xc44 /* CFO & DAGC */
 134 #define rOFDM0_CCADropThreshold         0xc48
 135 #define rOFDM0_ECCAThreshold            0xc4c /* Energy CCA */
 136 #define rOFDM0_XAAGCCore1               0xc50
 137 #define rOFDM0_XAAGCCore2               0xc54
 138 #define rOFDM0_XBAGCCore1               0xc58
 139 #define rOFDM0_XBAGCCore2               0xc5c
 140 #define rOFDM0_XCAGCCore1               0xc60
 141 #define rOFDM0_XCAGCCore2               0xc64
 142 #define rOFDM0_XDAGCCore1               0xc68
 143 #define rOFDM0_XDAGCCore2               0xc6c
 144 #define rOFDM0_AGCParameter1            0xc70
 145 #define rOFDM0_AGCParameter2            0xc74
 146 #define rOFDM0_AGCRSSITable             0xc78
 147 #define rOFDM0_HTSTFAGC                 0xc7c
 148 #define rOFDM0_XATxIQImbalance          0xc80
 149 #define rOFDM0_XATxAFE                  0xc84
 150 #define rOFDM0_XBTxIQImbalance          0xc88
 151 #define rOFDM0_XBTxAFE                  0xc8c
 152 #define rOFDM0_XCTxIQImbalance          0xc90
 153 #define rOFDM0_XCTxAFE                  0xc94
 154 #define rOFDM0_XDTxIQImbalance          0xc98
 155 #define rOFDM0_XDTxAFE                  0xc9c
 156 #define rOFDM0_RxHPParameter            0xce0
 157 #define rOFDM0_TxPseudoNoiseWgt         0xce4
 158 #define rOFDM0_FrameSync                0xcf0
 159 #define rOFDM0_DFSReport                0xcf4
 160 #define rOFDM0_TxCoeff1                 0xca4
 161 #define rOFDM0_TxCoeff2                 0xca8
 162 #define rOFDM0_TxCoeff3                 0xcac
 163 #define rOFDM0_TxCoeff4                 0xcb0
 164 #define rOFDM0_TxCoeff5                 0xcb4
 165 #define rOFDM0_TxCoeff6                 0xcb8
 166 
 167 
 168 #define rOFDM1_LSTF                     0xd00
 169 #define rOFDM1_TRxPathEnable            0xd04
 170 #define rOFDM1_CFO                      0xd08
 171 #define rOFDM1_CSI1                     0xd10
 172 #define rOFDM1_SBD                      0xd14
 173 #define rOFDM1_CSI2                     0xd18
 174 #define rOFDM1_CFOTracking              0xd2c
 175 #define rOFDM1_TRxMesaure1              0xd34
 176 #define rOFDM1_IntfDet                  0xd3c
 177 #define rOFDM1_PseudoNoiseStateAB       0xd50
 178 #define rOFDM1_PseudoNoiseStateCD       0xd54
 179 #define rOFDM1_RxPseudoNoiseWgt         0xd58
 180 #define rOFDM_PHYCounter1               0xda0 /* cca, parity fail */
 181 #define rOFDM_PHYCounter2               0xda4 /* rate illegal, crc8 fail */
 182 #define rOFDM_PHYCounter3               0xda8 /* MCS not supported */
 183 #define rOFDM_ShortCFOAB                0xdac
 184 #define rOFDM_ShortCFOCD                0xdb0
 185 #define rOFDM_LongCFOAB                 0xdb4
 186 #define rOFDM_LongCFOCD                 0xdb8
 187 #define rOFDM_TailCFOAB                 0xdbc
 188 #define rOFDM_TailCFOCD                 0xdc0
 189 #define rOFDM_PWMeasure1                0xdc4
 190 #define rOFDM_PWMeasure2                0xdc8
 191 #define rOFDM_BWReport                  0xdcc
 192 #define rOFDM_AGCReport                 0xdd0
 193 #define rOFDM_RxSNR                     0xdd4
 194 #define rOFDM_RxEVMCSI                  0xdd8
 195 #define rOFDM_SIGReport                 0xddc
 196 
 197 #define rTxAGC_Rate18_06                0xe00
 198 #define rTxAGC_Rate54_24                0xe04
 199 #define rTxAGC_CCK_Mcs32                0xe08
 200 #define rTxAGC_Mcs03_Mcs00              0xe10
 201 #define rTxAGC_Mcs07_Mcs04              0xe14
 202 #define rTxAGC_Mcs11_Mcs08              0xe18
 203 #define rTxAGC_Mcs15_Mcs12              0xe1c
 204 
 205 
 206 #define rZebra1_HSSIEnable              0x0
 207 #define rZebra1_TRxEnable1              0x1
 208 #define rZebra1_TRxEnable2              0x2
 209 #define rZebra1_AGC                     0x4
 210 #define rZebra1_ChargePump              0x5
 211 #define rZebra1_Channel                 0x7
 212 #define rZebra1_TxGain                  0x8
 213 #define rZebra1_TxLPF                   0x9
 214 #define rZebra1_RxLPF                   0xb
 215 #define rZebra1_RxHPFCorner             0xc
 216 
 217 /* Zebra 4 */
 218 #define rGlobalCtrl                     0
 219 #define rRTL8256_TxLPF                  19
 220 #define rRTL8256_RxLPF                  11
 221 
 222 /* RTL8258 */
 223 #define rRTL8258_TxLPF                  0x11
 224 #define rRTL8258_RxLPF                  0x13
 225 #define rRTL8258_RSSILPF                0xa
 226 
 227 /* Bit Mask - Page 1*/
 228 #define bBBResetB                       0x100
 229 #define bGlobalResetB                   0x200
 230 #define bOFDMTxStart                    0x4
 231 #define bCCKTxStart                     0x8
 232 #define bCRC32Debug                     0x100
 233 #define bPMACLoopback                   0x10
 234 #define bTxLSIG                         0xffffff
 235 #define bOFDMTxRate                     0xf
 236 #define bOFDMTxReserved                 0x10
 237 #define bOFDMTxLength                   0x1ffe0
 238 #define bOFDMTxParity                   0x20000
 239 #define bTxHTSIG1                       0xffffff
 240 #define bTxHTMCSRate                    0x7f
 241 #define bTxHTBW 0x80
 242 #define bTxHTLength                     0xffff00
 243 #define bTxHTSIG2                       0xffffff
 244 #define bTxHTSmoothing                  0x1
 245 #define bTxHTSounding                   0x2
 246 #define bTxHTReserved                   0x4
 247 #define bTxHTAggreation                 0x8
 248 #define bTxHTSTBC                       0x30
 249 #define bTxHTAdvanceCoding              0x40
 250 #define bTxHTShortGI                    0x80
 251 #define bTxHTNumberHT_LTF               0x300
 252 #define bTxHTCRC8                       0x3fc00
 253 #define bCounterReset                   0x10000
 254 #define bNumOfOFDMTx                    0xffff
 255 #define bNumOfCCKTx                     0xffff0000
 256 #define bTxIdleInterval                 0xffff
 257 #define bOFDMService                    0xffff0000
 258 #define bTxMACHeader                    0xffffffff
 259 #define bTxDataInit                     0xff
 260 #define bTxHTMode                       0x100
 261 #define bTxDataType                     0x30000
 262 #define bTxRandomSeed                   0xffffffff
 263 #define bCCKTxPreamble                  0x1
 264 #define bCCKTxSFD                       0xffff0000
 265 #define bCCKTxSIG                       0xff
 266 #define bCCKTxService                   0xff00
 267 #define bCCKLengthExt                   0x8000
 268 #define bCCKTxLength                    0xffff0000
 269 #define bCCKTxCRC16                     0xffff
 270 #define bCCKTxStatus                    0x1
 271 #define bOFDMTxStatus                   0x2
 272 /* Bit Mask - Page 8 */
 273 #define bRFMOD                          0x1
 274 #define bJapanMode                      0x2
 275 #define bCCKTxSC                        0x30
 276 #define bCCKEn                          0x1000000
 277 #define bOFDMEn                         0x2000000
 278 #define bOFDMRxADCPhase                 0x10000
 279 #define bOFDMTxDACPhase                 0x40000
 280 #define bXATxAGC                        0x3f
 281 #define bXBTxAGC                        0xf00
 282 #define bXCTxAGC                        0xf000
 283 #define bXDTxAGC                        0xf0000
 284 #define bPAStart                        0xf0000000
 285 #define bTRStart                        0x00f00000
 286 #define bRFStart                        0x0000f000
 287 #define bBBStart                        0x000000f0
 288 #define bBBCCKStart                     0x0000000f
 289 /* Bit Mask - rFPGA0_RFTiming2 */
 290 #define bPAEnd                          0xf
 291 #define bTREnd                          0x0f000000
 292 #define bRFEnd                          0x000f0000
 293 /* T2R */
 294 #define bCCAMask                        0x000000f0
 295 #define bR2RCCAMask                     0x00000f00
 296 #define bHSSI_R2TDelay                  0xf8000000
 297 #define bHSSI_T2RDelay                  0xf80000
 298 /* Channel gain at continue TX. */
 299 #define bContTxHSSI                     0x400
 300 #define bIGFromCCK                      0x200
 301 #define bAGCAddress                     0x3f
 302 #define bRxHPTx                         0x7000
 303 #define bRxHPT2R                        0x38000
 304 #define bRxHPCCKIni                     0xc0000
 305 #define bAGCTxCode                      0xc00000
 306 #define bAGCRxCode                      0x300000
 307 #define b3WireDataLength                0x800
 308 #define b3WireAddressLength             0x400
 309 #define b3WireRFPowerDown               0x1
 310 /*#define bHWSISelect                   0x8 */
 311 #define b5GPAPEPolarity                 0x40000000
 312 #define b2GPAPEPolarity                 0x80000000
 313 #define bRFSW_TxDefaultAnt              0x3
 314 #define bRFSW_TxOptionAnt               0x30
 315 #define bRFSW_RxDefaultAnt              0x300
 316 #define bRFSW_RxOptionAnt               0x3000
 317 #define bRFSI_3WireData                 0x1
 318 #define bRFSI_3WireClock                0x2
 319 #define bRFSI_3WireLoad                 0x4
 320 #define bRFSI_3WireRW                   0x8
 321 /* 3-wire total control */
 322 #define bRFSI_3Wire                     0xf
 323 #define bRFSI_RFENV                     0x10
 324 #define bRFSI_TRSW                      0x20
 325 #define bRFSI_TRSWB                     0x40
 326 #define bRFSI_ANTSW                     0x100
 327 #define bRFSI_ANTSWB                    0x200
 328 #define bRFSI_PAPE                      0x400
 329 #define bRFSI_PAPE5G                    0x800
 330 #define bBandSelect                     0x1
 331 #define bHTSIG2_GI                      0x80
 332 #define bHTSIG2_Smoothing               0x01
 333 #define bHTSIG2_Sounding                0x02
 334 #define bHTSIG2_Aggreaton               0x08
 335 #define bHTSIG2_STBC                    0x30
 336 #define bHTSIG2_AdvCoding               0x40
 337 #define bHTSIG2_NumOfHTLTF              0x300
 338 #define bHTSIG2_CRC8                    0x3fc
 339 #define bHTSIG1_MCS                     0x7f
 340 #define bHTSIG1_BandWidth               0x80
 341 #define bHTSIG1_HTLength                0xffff
 342 #define bLSIG_Rate                      0xf
 343 #define bLSIG_Reserved                  0x10
 344 #define bLSIG_Length                    0x1fffe
 345 #define bLSIG_Parity                    0x20
 346 #define bCCKRxPhase                     0x4
 347 #define bLSSIReadAddress                0x3f000000 /* LSSI "read" address */
 348 #define bLSSIReadEdge                   0x80000000 /* LSSI "read" edge signal */
 349 #define bLSSIReadBackData               0xfff
 350 #define bLSSIReadOKFlag                 0x1000
 351 #define bCCKSampleRate                  0x8 /* 0: 44 MHz, 1: 88MHz */
 352 
 353 #define bRegulator0Standby              0x1
 354 #define bRegulatorPLLStandby            0x2
 355 #define bRegulator1Standby              0x4
 356 #define bPLLPowerUp                     0x8
 357 #define bDPLLPowerUp                    0x10
 358 #define bDA10PowerUp                    0x20
 359 #define bAD7PowerUp                     0x200
 360 #define bDA6PowerUp                     0x2000
 361 #define bXtalPowerUp                    0x4000
 362 #define b40MDClkPowerUP                 0x8000
 363 #define bDA6DebugMode                   0x20000
 364 #define bDA6Swing                       0x380000
 365 #define bADClkPhase                     0x4000000
 366 #define b80MClkDelay                    0x18000000
 367 #define bAFEWatchDogEnable              0x20000000
 368 #define bXtalCap                        0x0f000000
 369 #define bXtalCap01                      0xc0000000
 370 #define bXtalCap23                      0x3
 371 #define bXtalCap92x                     0x0f000000
 372 #define bIntDifClkEnable                0x400
 373 #define bExtSigClkEnable                0x800
 374 #define bBandgapMbiasPowerUp            0x10000
 375 #define bAD11SHGain                     0xc0000
 376 #define bAD11InputRange                 0x700000
 377 #define bAD11OPCurrent                  0x3800000
 378 #define bIPathLoopback                  0x4000000
 379 #define bQPathLoopback                  0x8000000
 380 #define bAFELoopback                    0x10000000
 381 #define bDA10Swing                      0x7e0
 382 #define bDA10Reverse                    0x800
 383 #define bDAClkSource                    0x1000
 384 #define bAD7InputRange                  0x6000
 385 #define bAD7Gain                        0x38000
 386 #define bAD7OutputCMMode                0x40000
 387 #define bAD7InputCMMode                 0x380000
 388 #define bAD7Current                     0xc00000
 389 #define bRegulatorAdjust                0x7000000
 390 #define bAD11PowerUpAtTx                0x1
 391 #define bDA10PSAtTx                     0x10
 392 #define bAD11PowerUpAtRx                0x100
 393 #define bDA10PSAtRx                     0x1000
 394 
 395 #define bCCKRxAGCFormat                 0x200
 396 
 397 #define bPSDFFTSamplepPoint             0xc000
 398 #define bPSDAverageNum                  0x3000
 399 #define bIQPathControl                  0xc00
 400 #define bPSDFreq                        0x3ff
 401 #define bPSDAntennaPath                 0x30
 402 #define bPSDIQSwitch                    0x40
 403 #define bPSDRxTrigger                   0x400000
 404 #define bPSDTxTrigger                   0x80000000
 405 #define bPSDSineToneScale               0x7f000000
 406 #define bPSDReport                      0xffff
 407 
 408 /* Page 8 */
 409 #define bOFDMTxSC                       0x30000000
 410 #define bCCKTxOn                        0x1
 411 #define bOFDMTxOn                       0x2
 412 /* Reset debug page and also HWord, LWord */
 413 #define bDebugPage                      0xfff
 414 /* Reset debug page and LWord */
 415 #define bDebugItem                      0xff
 416 #define bAntL                           0x10
 417 #define bAntNonHT                       0x100
 418 #define bAntHT1                         0x1000
 419 #define bAntHT2                         0x10000
 420 #define bAntHT1S1                       0x100000
 421 #define bAntNonHTS1                     0x1000000
 422 
 423 /* Page a */
 424 #define bCCKBBMode                      0x3
 425 #define bCCKTxPowerSaving               0x80
 426 #define bCCKRxPowerSaving               0x40
 427 #define bCCKSideBand                    0x10
 428 #define bCCKScramble                    0x8
 429 #define bCCKAntDiversity                0x8000
 430 #define bCCKCarrierRecovery             0x4000
 431 #define bCCKTxRate                      0x3000
 432 #define bCCKDCCancel                    0x0800
 433 #define bCCKISICancel                   0x0400
 434 #define bCCKMatchFilter                 0x0200
 435 #define bCCKEqualizer                   0x0100
 436 #define bCCKPreambleDetect              0x800000
 437 #define bCCKFastFalseCCA                0x400000
 438 #define bCCKChEstStart                  0x300000
 439 #define bCCKCCACount                    0x080000
 440 #define bCCKcs_lim                      0x070000
 441 #define bCCKBistMode                    0x80000000
 442 #define bCCKCCAMask                     0x40000000
 443 #define bCCKTxDACPhase                  0x4
 444 #define bCCKRxADCPhase                  0x20000000 /* r_rx_clk */
 445 #define bCCKr_cp_mode0                  0x0100
 446 #define bCCKTxDCOffset                  0xf0
 447 #define bCCKRxDCOffset                  0xf
 448 #define bCCKCCAMode                     0xc000
 449 #define bCCKFalseCS_lim                 0x3f00
 450 #define bCCKCS_ratio                    0xc00000
 451 #define bCCKCorgBit_sel                 0x300000
 452 #define bCCKPD_lim                      0x0f0000
 453 #define bCCKNewCCA                      0x80000000
 454 #define bCCKRxHPofIG                    0x8000
 455 #define bCCKRxIG                        0x7f00
 456 #define bCCKLNAPolarity                 0x800000
 457 #define bCCKRx1stGain                   0x7f0000
 458 /* CCK Rx Initial gain polarity */
 459 #define bCCKRFExtend                    0x20000000
 460 #define bCCKRxAGCSatLevel               0x1f000000
 461 #define bCCKRxAGCSatCount               0xe0
 462 /* AGCSAmp_dly */
 463 #define bCCKRxRFSettle                  0x1f
 464 #define bCCKFixedRxAGC                  0x8000
 465 /*#define bCCKRxAGCFormat               0x4000  remove to HSSI register 0x824 */
 466 #define bCCKAntennaPolarity             0x2000
 467 #define bCCKTxFilterType                0x0c00
 468 #define bCCKRxAGCReportType             0x0300
 469 #define bCCKRxDAGCEn                    0x80000000
 470 #define bCCKRxDAGCPeriod                0x20000000
 471 #define bCCKRxDAGCSatLevel              0x1f000000
 472 #define bCCKTimingRecovery              0x800000
 473 #define bCCKTxC0                        0x3f0000
 474 #define bCCKTxC1                        0x3f000000
 475 #define bCCKTxC2                        0x3f
 476 #define bCCKTxC3                        0x3f00
 477 #define bCCKTxC4                        0x3f0000
 478 #define bCCKTxC5                        0x3f000000
 479 #define bCCKTxC6                        0x3f
 480 #define bCCKTxC7                        0x3f00
 481 #define bCCKDebugPort                   0xff0000
 482 #define bCCKDACDebug                    0x0f000000
 483 #define bCCKFalseAlarmEnable            0x8000
 484 #define bCCKFalseAlarmRead              0x4000
 485 #define bCCKTRSSI                       0x7f
 486 #define bCCKRxAGCReport                 0xfe
 487 #define bCCKRxReport_AntSel             0x80000000
 488 #define bCCKRxReport_MFOff              0x40000000
 489 #define bCCKRxRxReport_SQLoss           0x20000000
 490 #define bCCKRxReport_Pktloss            0x10000000
 491 #define bCCKRxReport_Lockedbit          0x08000000
 492 #define bCCKRxReport_RateError          0x04000000
 493 #define bCCKRxReport_RxRate             0x03000000
 494 #define bCCKRxFACounterLower            0xff
 495 #define bCCKRxFACounterUpper            0xff000000
 496 #define bCCKRxHPAGCStart                0xe000
 497 #define bCCKRxHPAGCFinal                0x1c00
 498 
 499 #define bCCKRxFalseAlarmEnable          0x8000
 500 #define bCCKFACounterFreeze             0x4000
 501 
 502 #define bCCKTxPathSel                   0x10000000
 503 #define bCCKDefaultRxPath               0xc000000
 504 #define bCCKOptionRxPath                0x3000000
 505 
 506 /* Page c */
 507 #define bNumOfSTF                       0x3
 508 #define bShift_L                        0xc0
 509 #define bGI_TH                          0xc
 510 #define bRxPathA                        0x1
 511 #define bRxPathB                        0x2
 512 #define bRxPathC                        0x4
 513 #define bRxPathD                        0x8
 514 #define bTxPathA                        0x1
 515 #define bTxPathB                        0x2
 516 #define bTxPathC                        0x4
 517 #define bTxPathD                        0x8
 518 #define bTRSSIFreq                      0x200
 519 #define bADCBackoff                     0x3000
 520 #define bDFIRBackoff                    0xc000
 521 #define bTRSSILatchPhase                0x10000
 522 #define bRxIDCOffset                    0xff
 523 #define bRxQDCOffset                    0xff00
 524 #define bRxDFIRMode                     0x1800000
 525 #define bRxDCNFType                     0xe000000
 526 #define bRXIQImb_A                      0x3ff
 527 #define bRXIQImb_B                      0xfc00
 528 #define bRXIQImb_C                      0x3f0000
 529 #define bRXIQImb_D                      0xffc00000
 530 #define bDC_dc_Notch                    0x60000
 531 #define bRxNBINotch                     0x1f000000
 532 #define bPD_TH                          0xf
 533 #define bPD_TH_Opt2                     0xc000
 534 #define bPWED_TH                        0x700
 535 #define bIfMF_Win_L                     0x800
 536 #define bPD_Option                      0x1000
 537 #define bMF_Win_L                       0xe000
 538 #define bBW_Search_L                    0x30000
 539 #define bwin_enh_L                      0xc0000
 540 #define bBW_TH                          0x700000
 541 #define bED_TH2                         0x3800000
 542 #define bBW_option                      0x4000000
 543 #define bRatio_TH                       0x18000000
 544 #define bWindow_L                       0xe0000000
 545 #define bSBD_Option                     0x1
 546 #define bFrame_TH                       0x1c
 547 #define bFS_Option                      0x60
 548 #define bDC_Slope_check                 0x80
 549 #define bFGuard_Counter_DC_L            0xe00
 550 #define bFrame_Weight_Short             0x7000
 551 #define bSub_Tune                       0xe00000
 552 #define bFrame_DC_Length                0xe000000
 553 #define bSBD_start_offset               0x30000000
 554 #define bFrame_TH_2                     0x7
 555 #define bFrame_GI2_TH                   0x38
 556 #define bGI2_Sync_en                    0x40
 557 #define bSarch_Short_Early              0x300
 558 #define bSarch_Short_Late               0xc00
 559 #define bSarch_GI2_Late                 0x70000
 560 #define bCFOAntSum                      0x1
 561 #define bCFOAcc                         0x2
 562 #define bCFOStartOffset                 0xc
 563 #define bCFOLookBack                    0x70
 564 #define bCFOSumWeight                   0x80
 565 #define bDAGCEnable                     0x10000
 566 #define bTXIQImb_A                      0x3ff
 567 #define bTXIQImb_B                      0xfc00
 568 #define bTXIQImb_C                      0x3f0000
 569 #define bTXIQImb_D                      0xffc00000
 570 #define bTxIDCOffset                    0xff
 571 #define bTxQDCOffset                    0xff00
 572 #define bTxDFIRMode                     0x10000
 573 #define bTxPesudoNoiseOn                0x4000000
 574 #define bTxPesudoNoise_A                0xff
 575 #define bTxPesudoNoise_B                0xff00
 576 #define bTxPesudoNoise_C                0xff0000
 577 #define bTxPesudoNoise_D                0xff000000
 578 #define bCCADropOption                  0x20000
 579 #define bCCADropThres                   0xfff00000
 580 #define bEDCCA_H                        0xf
 581 #define bEDCCA_L                        0xf0
 582 #define bLambda_ED                      0x300
 583 #define bRxInitialGain                  0x7f
 584 #define bRxAntDivEn                     0x80
 585 #define bRxAGCAddressForLNA             0x7f00
 586 #define bRxHighPowerFlow                0x8000
 587 #define bRxAGCFreezeThres               0xc0000
 588 #define bRxFreezeStep_AGC1              0x300000
 589 #define bRxFreezeStep_AGC2              0xc00000
 590 #define bRxFreezeStep_AGC3              0x3000000
 591 #define bRxFreezeStep_AGC0              0xc000000
 592 #define bRxRssi_Cmp_En                  0x10000000
 593 #define bRxQuickAGCEn                   0x20000000
 594 #define bRxAGCFreezeThresMode           0x40000000
 595 #define bRxOverFlowCheckType            0x80000000
 596 #define bRxAGCShift                     0x7f
 597 #define bTRSW_Tri_Only                  0x80
 598 #define bPowerThres                     0x300
 599 #define bRxAGCEn                        0x1
 600 #define bRxAGCTogetherEn                0x2
 601 #define bRxAGCMin                       0x4
 602 #define bRxHP_Ini                       0x7
 603 #define bRxHP_TRLNA                     0x70
 604 #define bRxHP_RSSI                      0x700
 605 #define bRxHP_BBP1                      0x7000
 606 #define bRxHP_BBP2                      0x70000
 607 #define bRxHP_BBP3                      0x700000
 608 /* The threshold for high power */
 609 #define bRSSI_H                         0x7f0000
 610 /* The threshold for ant diversity */
 611 #define bRSSI_Gen                       0x7f000000
 612 #define bRxSettle_TRSW                  0x7
 613 #define bRxSettle_LNA                   0x38
 614 #define bRxSettle_RSSI                  0x1c0
 615 #define bRxSettle_BBP                   0xe00
 616 #define bRxSettle_RxHP                  0x7000
 617 #define bRxSettle_AntSW_RSSI            0x38000
 618 #define bRxSettle_AntSW                 0xc0000
 619 #define bRxProcessTime_DAGC             0x300000
 620 #define bRxSettle_HSSI                  0x400000
 621 #define bRxProcessTime_BBPPW            0x800000
 622 #define bRxAntennaPowerShift            0x3000000
 623 #define bRSSITableSelect                0xc000000
 624 #define bRxHP_Final                     0x7000000
 625 #define bRxHTSettle_BBP                 0x7
 626 #define bRxHTSettle_HSSI                0x8
 627 #define bRxHTSettle_RxHP                0x70
 628 #define bRxHTSettle_BBPPW               0x80
 629 #define bRxHTSettle_Idle                0x300
 630 #define bRxHTSettle_Reserved            0x1c00
 631 #define bRxHTRxHPEn                     0x8000
 632 #define bRxHTAGCFreezeThres             0x30000
 633 #define bRxHTAGCTogetherEn              0x40000
 634 #define bRxHTAGCMin                     0x80000
 635 #define bRxHTAGCEn                      0x100000
 636 #define bRxHTDAGCEn                     0x200000
 637 #define bRxHTRxHP_BBP                   0x1c00000
 638 #define bRxHTRxHP_Final                 0xe0000000
 639 #define bRxPWRatioTH                    0x3
 640 #define bRxPWRatioEn                    0x4
 641 #define bRxMFHold                       0x3800
 642 #define bRxPD_Delay_TH1                 0x38
 643 #define bRxPD_Delay_TH2                 0x1c0
 644 #define bRxPD_DC_COUNT_MAX              0x600
 645 /*#define bRxMF_Hold                    0x3800*/
 646 #define bRxPD_Delay_TH                  0x8000
 647 #define bRxProcess_Delay                0xf0000
 648 #define bRxSearchrange_GI2_Early        0x700000
 649 #define bRxFrame_Guard_Counter_L        0x3800000
 650 #define bRxSGI_Guard_L                  0xc000000
 651 #define bRxSGI_Search_L                 0x30000000
 652 #define bRxSGI_TH                       0xc0000000
 653 #define bDFSCnt0                        0xff
 654 #define bDFSCnt1                        0xff00
 655 #define bDFSFlag                        0xf0000
 656 
 657 #define bMFWeightSum            0x300000
 658 #define bMinIdxTH               0x7f000000
 659 
 660 #define bDAFormat               0x40000
 661 
 662 #define bTxChEmuEnable          0x01000000
 663 
 664 #define bTRSWIsolation_A        0x7f
 665 #define bTRSWIsolation_B        0x7f00
 666 #define bTRSWIsolation_C        0x7f0000
 667 #define bTRSWIsolation_D        0x7f000000
 668 
 669 #define bExtLNAGain             0x7c00
 670 
 671 /* Page d */
 672 #define bSTBCEn                 0x4
 673 #define bAntennaMapping         0x10
 674 #define bNss                    0x20
 675 #define bCFOAntSumD             0x200
 676 #define bPHYCounterReset        0x8000000
 677 #define bCFOReportGet           0x4000000
 678 #define bOFDMContinueTx         0x10000000
 679 #define bOFDMSingleCarrier      0x20000000
 680 #define bOFDMSingleTone         0x40000000
 681 /* #define bRxPath1             0x01
 682  * #define bRxPath2             0x02
 683  * #define bRxPath3             0x04
 684  * #define bRxPath4             0x08
 685  * #define bTxPath1             0x10
 686  * #define bTxPath2             0x20
 687  */
 688 #define bHTDetect               0x100
 689 #define bCFOEn                  0x10000
 690 #define bCFOValue               0xfff00000
 691 #define bSigTone_Re             0x3f
 692 #define bSigTone_Im             0x7f00
 693 #define bCounter_CCA            0xffff
 694 #define bCounter_ParityFail     0xffff0000
 695 #define bCounter_RateIllegal    0xffff
 696 #define bCounter_CRC8Fail       0xffff0000
 697 #define bCounter_MCSNoSupport   0xffff
 698 #define bCounter_FastSync       0xffff
 699 #define bShortCFO               0xfff
 700 #define bShortCFOTLength        12 /* total */
 701 #define bShortCFOFLength        11 /* fraction */
 702 #define bLongCFO                0x7ff
 703 #define bLongCFOTLength         11
 704 #define bLongCFOFLength         11
 705 #define bTailCFO                0x1fff
 706 #define bTailCFOTLength         13
 707 #define bTailCFOFLength         12
 708 
 709 #define bmax_en_pwdB            0xffff
 710 #define bCC_power_dB            0xffff0000
 711 #define bnoise_pwdB             0xffff
 712 #define bPowerMeasTLength       10
 713 #define bPowerMeasFLength       3
 714 #define bRx_HT_BW               0x1
 715 #define bRxSC                   0x6
 716 #define bRx_HT                  0x8
 717 
 718 #define bNB_intf_det_on         0x1
 719 #define bIntf_win_len_cfg       0x30
 720 #define bNB_Intf_TH_cfg         0x1c0
 721 
 722 #define bRFGain                 0x3f
 723 #define bTableSel               0x40
 724 #define bTRSW                   0x80
 725 
 726 #define bRxSNR_A                0xff
 727 #define bRxSNR_B                0xff00
 728 #define bRxSNR_C                0xff0000
 729 #define bRxSNR_D                0xff000000
 730 #define bSNREVMTLength          8
 731 #define bSNREVMFLength          1
 732 
 733 #define bCSI1st                 0xff
 734 #define bCSI2nd                 0xff00
 735 #define bRxEVM1st               0xff0000
 736 #define bRxEVM2nd               0xff000000
 737 
 738 #define bSIGEVM                 0xff
 739 #define bPWDB                   0xff00
 740 #define bSGIEN                  0x10000
 741 
 742 #define bSFactorQAM1            0xf
 743 #define bSFactorQAM2            0xf0
 744 #define bSFactorQAM3            0xf00
 745 #define bSFactorQAM4            0xf000
 746 #define bSFactorQAM5            0xf0000
 747 #define bSFactorQAM6            0xf0000
 748 #define bSFactorQAM7            0xf00000
 749 #define bSFactorQAM8            0xf000000
 750 #define bSFactorQAM9            0xf0000000
 751 #define bCSIScheme              0x100000
 752 
 753 #define bNoiseLvlTopSet         0x3
 754 #define bChSmooth               0x4
 755 #define bChSmoothCfg1           0x38
 756 #define bChSmoothCfg2           0x1c0
 757 #define bChSmoothCfg3           0xe00
 758 #define bChSmoothCfg4           0x7000
 759 #define bMRCMode                0x800000
 760 #define bTHEVMCfg               0x7000000
 761 
 762 #define bLoopFitType            0x1
 763 #define bUpdCFO                 0x40
 764 #define bUpdCFOOffData          0x80
 765 #define bAdvUpdCFO              0x100
 766 #define bAdvTimeCtrl            0x800
 767 #define bUpdClko                0x1000
 768 #define bFC                     0x6000
 769 #define bTrackingMode           0x8000
 770 #define bPhCmpEnable            0x10000
 771 #define bUpdClkoLTF             0x20000
 772 #define bComChCFO               0x40000
 773 #define bCSIEstiMode            0x80000
 774 #define bAdvUpdEqz              0x100000
 775 #define bUChCfg                 0x7000000
 776 #define bUpdEqz                 0x8000000
 777 
 778 /* Page e */
 779 #define bTxAGCRate18_06         0x7f7f7f7f
 780 #define bTxAGCRate54_24         0x7f7f7f7f
 781 #define bTxAGCRateMCS32         0x7f
 782 #define bTxAGCRateCCK           0x7f00
 783 #define bTxAGCRateMCS3_MCS0     0x7f7f7f7f
 784 #define bTxAGCRateMCS7_MCS4     0x7f7f7f7f
 785 #define bTxAGCRateMCS11_MCS8    0x7f7f7f7f
 786 #define bTxAGCRateMCS15_MCS12   0x7f7f7f7f
 787 
 788 #define bRxPesudoNoiseOn        0x20000000 /* Rx Pseduo noise */
 789 #define bRxPesudoNoise_A        0xff
 790 #define bRxPesudoNoise_B        0xff00
 791 #define bRxPesudoNoise_C        0xff0000
 792 #define bRxPesudoNoise_D        0xff000000
 793 #define bPesudoNoiseState_A     0xffff
 794 #define bPesudoNoiseState_B     0xffff0000
 795 #define bPesudoNoiseState_C     0xffff
 796 #define bPesudoNoiseState_D     0xffff0000
 797 
 798 /* RF Zebra 1 */
 799 #define bZebra1_HSSIEnable      0x8
 800 #define bZebra1_TRxControl      0xc00
 801 #define bZebra1_TRxGainSetting  0x07f
 802 #define bZebra1_RxCorner        0xc00
 803 #define bZebra1_TxChargePump    0x38
 804 #define bZebra1_RxChargePump    0x7
 805 #define bZebra1_ChannelNum      0xf80
 806 #define bZebra1_TxLPFBW 0x400
 807 #define bZebra1_RxLPFBW 0x600
 808 
 809 /* Zebra4 */
 810 #define bRTL8256RegModeCtrl1    0x100
 811 #define bRTL8256RegModeCtrl0    0x40
 812 #define bRTL8256_TxLPFBW        0x18
 813 #define bRTL8256_RxLPFBW        0x600
 814 
 815 /* RTL8258 */
 816 #define bRTL8258_TxLPFBW        0xc
 817 #define bRTL8258_RxLPFBW        0xc00
 818 #define bRTL8258_RSSILPFBW      0xc0
 819 
 820 /* byte enable for sb_write */
 821 #define bByte0  0x1
 822 #define bByte1  0x2
 823 #define bByte2  0x4
 824 #define bByte3  0x8
 825 #define bWord0  0x3
 826 #define bWord1  0xc
 827 #define bDWord  0xf
 828 
 829 /* for PutRegsetting & GetRegSetting BitMask */
 830 #define bMaskByte0      0xff
 831 #define bMaskByte1      0xff00
 832 #define bMaskByte2      0xff0000
 833 #define bMaskByte3      0xff000000
 834 #define bMaskHWord      0xffff0000
 835 #define bMaskLWord      0x0000ffff
 836 #define bMaskDWord      0xffffffff
 837 
 838 /* for PutRFRegsetting & GetRFRegSetting BitMask */
 839 #define bMask12Bits     0xfff
 840 
 841 #define bEnable         0x1
 842 #define bDisable        0x0
 843 
 844 #define LeftAntenna     0x0
 845 #define RightAntenna    0x1
 846 
 847 #define tCheckTxStatus          500 /* 500 ms */
 848 #define tUpdateRxCounter        100 /* 100 ms */
 849 
 850 #define rateCCK         0
 851 #define rateOFDM        1
 852 #define rateHT          2
 853 
 854 #define bPMAC_End       0x1ff /* define Register-End */
 855 #define bFPGAPHY0_End   0x8ff
 856 #define bFPGAPHY1_End   0x9ff
 857 #define bCCKPHY0_End    0xaff
 858 #define bOFDMPHY0_End   0xcff
 859 #define bOFDMPHY1_End   0xdff
 860 
 861 
 862 #define bPMACControl    0x0
 863 #define bWMACControl    0x1
 864 #define bWNICControl    0x2
 865 
 866 #define PathA   0x0
 867 #define PathB   0x1
 868 #define PathC   0x2
 869 #define PathD   0x3
 870 
 871 #define rRTL8256RxMixerPole     0xb
 872 #define bZebraRxMixerPole       0x6
 873 #define rRTL8256TxBBOPBias      0x9
 874 #define bRTL8256TxBBOPBias      0x400
 875 #define rRTL8256TxBBBW          19
 876 #define bRTL8256TxBBBW          0x18
 877 
 878 #endif

/* [<][>][^][v][top][bottom][index][help] */