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21 #ifndef __R8192UDM_H__
22 #define __R8192UDM_H__
23
24
25 #define DM_DIG_THRESH_HIGH 40
26 #define DM_DIG_THRESH_LOW 35
27
28 #define DM_DIG_HIGH_PWR_THRESH_HIGH 75
29 #define DM_DIG_HIGH_PWR_THRESH_LOW 70
30
31 #define BW_AUTO_SWITCH_HIGH_LOW 25
32 #define BW_AUTO_SWITCH_LOW_HIGH 30
33
34 #define DM_DIG_BACKOFF 12
35 #define DM_DIG_MAX 0x36
36 #define DM_DIG_MIN 0x1c
37 #define DM_DIG_MIN_NETCORE 0x12
38
39 #define RX_PATH_SELECTION_SS_TH_LOW 30
40 #define RX_PATH_SELECTION_DIFF_TH 18
41
42 #define RATE_ADAPTIVE_TH_HIGH 50
43 #define RATE_ADAPTIVE_TH_LOW_20M 30
44 #define RATE_ADAPTIVE_TH_LOW_40M 10
45 #define VERY_LOW_RSSI 15
46 #define CTS_TO_SELF_TH_VAL 30
47
48
49 #define E_FOR_TX_POWER_TRACK 300
50
51 #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68
52 #define TX_POWER_NEAR_FIELD_THRESH_LOW 62
53
54 #define TX_POWER_ATHEROAP_THRESH_HIGH 78
55 #define TX_POWER_ATHEROAP_THRESH_LOW 72
56
57
58 #define CURRENT_TX_RATE_REG 0x1b8
59 #define INITIAL_TX_RATE_REG 0x1b9
60 #define TX_RETRY_COUNT_REG 0x1ac
61 #define REG_C38_TH 20
62
63
64
65
66 enum dig_algorithm {
67 DIG_ALGO_BY_FALSE_ALARM = 0,
68 DIG_ALGO_BY_RSSI = 1,
69 };
70
71 enum dynamic_init_gain_state {
72 DM_STA_DIG_OFF = 0,
73 DM_STA_DIG_ON,
74 DM_STA_DIG_MAX
75 };
76
77 enum dig_connect {
78 DIG_DISCONNECT = 0,
79 DIG_CONNECT = 1,
80 };
81
82 enum dig_pkt_detection_threshold {
83 DIG_PD_AT_LOW_POWER = 0,
84 DIG_PD_AT_NORMAL_POWER = 1,
85 DIG_PD_AT_HIGH_POWER = 2,
86 };
87
88 enum dig_cck_cs_ratio_state {
89 DIG_CS_RATIO_LOWER = 0,
90 DIG_CS_RATIO_HIGHER = 1,
91 };
92
93
94 struct dig {
95 u8 dig_enable_flag;
96 enum dig_algorithm dig_algorithm;
97 u8 dig_algorithm_switch;
98
99 long rssi_low_thresh;
100 long rssi_high_thresh;
101
102 long rssi_high_power_lowthresh;
103 long rssi_high_power_highthresh;
104
105 enum dynamic_init_gain_state dig_state;
106 enum dynamic_init_gain_state dig_highpwr_state;
107 enum dig_connect cur_connect_state;
108 enum dig_connect pre_connect_state;
109
110 enum dig_pkt_detection_threshold curpd_thstate;
111 enum dig_pkt_detection_threshold prepd_thstate;
112 enum dig_cck_cs_ratio_state curcs_ratio_state;
113 enum dig_cck_cs_ratio_state precs_ratio_state;
114
115 u32 pre_ig_value;
116 u32 cur_ig_value;
117
118 u8 backoff_val;
119 u8 rx_gain_range_min;
120
121 long rssi_val;
122 };
123
124 enum cck_rx_path_method {
125 CCK_RX_VERSION_1 = 0,
126 CCK_RX_VERSION_2 = 1,
127 };
128
129 struct dynamic_rx_path_sel {
130 enum cck_rx_path_method cck_method;
131 u8 cck_rx_path;
132
133 u8 disabled_rf;
134
135 u8 rf_rssi[4];
136 u8 rf_enable_rssi_th[4];
137 long cck_pwdb_sta[4];
138 };
139
140 struct tx_config_cmd {
141 u32 cmd_op;
142 u32 cmd_length;
143 u32 cmd_value;
144 };
145
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147
148
149 extern struct dig dm_digtable;
150 extern u8 dm_shadow[16][256];
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157
158 void init_hal_dm(struct net_device *dev);
159 void deinit_hal_dm(struct net_device *dev);
160 void hal_dm_watchdog(struct net_device *dev);
161 void init_rate_adaptive(struct net_device *dev);
162 void dm_txpower_trackingcallback(struct work_struct *work);
163 void dm_restore_dynamic_mechanism_state(struct net_device *dev);
164 void dm_force_tx_fw_info(struct net_device *dev,
165 u32 force_type, u32 force_value);
166 void dm_init_edca_turbo(struct net_device *dev);
167 void dm_rf_operation_test_callback(unsigned long data);
168 void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
169 void dm_fsync_timer_callback(struct timer_list *t);
170 void dm_cck_txpower_adjust(struct net_device *dev, bool binch14);
171 void dm_shadow_init(struct net_device *dev);
172 void dm_initialize_txpower_tracking(struct net_device *dev);
173
174
175 #endif
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177