root/drivers/staging/rtl8192u/r819xU_phy.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _R819XU_PHY_H
   3 #define _R819XU_PHY_H
   4 
   5 /* Channel switch: The size of command tables for switch channel */
   6 #define MAX_PRECMD_CNT 16
   7 #define MAX_RFDEPENDCMD_CNT 16
   8 #define MAX_POSTCMD_CNT 16
   9 
  10 enum baseband_config_type {
  11         BASEBAND_CONFIG_PHY_REG = 0,                    //Radio Path A
  12         BASEBAND_CONFIG_AGC_TAB = 1,                    //Radio Path B
  13 };
  14 
  15 enum switch_chan_cmd_id {
  16         CMD_ID_END,
  17         CMD_ID_SET_TX_PWR_LEVEL,
  18         CMD_ID_WRITE_PORT_ULONG,
  19         CMD_ID_WRITE_PORT_USHORT,
  20         CMD_ID_WRITE_PORT_UCHAR,
  21         CMD_ID_RF_WRITE_REG,
  22 };
  23 
  24 /* -----------------------Define structure---------------------- */
  25 /* 1. Switch channel related */
  26 struct sw_chnl_cmd {
  27         enum switch_chan_cmd_id cmd_id;
  28         u32                     para_1;
  29         u32                     para_2;
  30         u32                     ms_delay;
  31 } __packed;
  32 
  33 enum hw90_block_e {
  34         HW90_BLOCK_MAC = 0,
  35         HW90_BLOCK_PHY0 = 1,
  36         HW90_BLOCK_PHY1 = 2,
  37         HW90_BLOCK_RF = 3,
  38         HW90_BLOCK_MAXIMUM = 4, /* Never use this */
  39 };
  40 
  41 enum rf90_radio_path_e {
  42         RF90_PATH_A = 0,                        /* Radio Path A */
  43         RF90_PATH_B = 1,                        /* Radio Path B */
  44         RF90_PATH_C = 2,                        /* Radio Path C */
  45         RF90_PATH_D = 3,                        /* Radio Path D */
  46         RF90_PATH_MAX                           /* Max RF number 92 support */
  47 };
  48 
  49 u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev, u32 e_rfpath);
  50 void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr,
  51                       u32 bitmask, u32 data);
  52 u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask);
  53 void rtl8192_phy_SetRFReg(struct net_device *dev,
  54                           enum rf90_radio_path_e e_rfpath,
  55                           u32 reg_addr, u32 bitmask, u32 data);
  56 u32 rtl8192_phy_QueryRFReg(struct net_device *dev,
  57                            enum rf90_radio_path_e e_rfpath,
  58                            u32 reg_addr, u32 bitmask);
  59 void rtl8192_phy_configmac(struct net_device *dev);
  60 u8 rtl8192_phy_checkBBAndRF(struct net_device *dev,
  61                             enum hw90_block_e CheckBlock,
  62                             enum rf90_radio_path_e e_rfpath);
  63 void rtl8192_BBConfig(struct net_device *dev);
  64 void rtl8192_phy_getTxPower(struct net_device *dev);
  65 void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel);
  66 void rtl8192_phy_RFConfig(struct net_device *dev);
  67 void rtl8192_phy_updateInitGain(struct net_device *dev);
  68 u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
  69                                       enum rf90_radio_path_e e_rfpath);
  70 
  71 u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel);
  72 void rtl8192_SetBWMode(struct net_device *dev,
  73                        enum ht_channel_width bandwidth,
  74                        enum ht_extension_chan_offset offset);
  75 void rtl8192_SwChnl_WorkItem(struct net_device *dev);
  76 void rtl8192_SetBWModeWorkItem(struct net_device *dev);
  77 bool rtl8192_SetRFPowerState(struct net_device *dev,
  78                              RT_RF_POWER_STATE eRFPowerState);
  79 void InitialGain819xUsb(struct net_device *dev, u8 Operation);
  80 
  81 void InitialGainOperateWorkItemCallBack(struct work_struct *work);
  82 
  83 #endif